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* [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
@ 2017-11-20 10:20 Chris Wilson
  2017-11-20 10:20 ` [PATCH 2/2] drm/i915: Automatic i915_switch_context for legacy Chris Wilson
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Chris Wilson @ 2017-11-20 10:20 UTC (permalink / raw)
  To: intel-gfx

As the request now may implicitly invoke a context-switch, we should
follow that with a GPU TLB invalidation. Also even before using GGTT, we
should invalidate the TLBs for any updates (as well as the ppgtt
invalidates that are unconditionally applied by execbuf). Since we
almost always require the TLB invalidate, do it unconditionally on
request allocation and so we can remove it from all other paths.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c        |  7 +------
 drivers/gpu/drm/i915/i915_gem_render_state.c      |  4 ----
 drivers/gpu/drm/i915/i915_gem_request.c           | 24 ++++++++++++++++++-----
 drivers/gpu/drm/i915/selftests/huge_pages.c       |  4 ----
 drivers/gpu/drm/i915/selftests/i915_gem_context.c |  4 ----
 drivers/gpu/drm/i915/selftests/i915_gem_request.c | 10 ----------
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c  |  4 ----
 7 files changed, 20 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 53ccb27bfe91..b7895788bc75 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1111,10 +1111,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
 	if (err)
 		goto err_request;
 
-	err = eb->engine->emit_flush(rq, EMIT_INVALIDATE);
-	if (err)
-		goto err_request;
-
 	err = i915_switch_context(rq);
 	if (err)
 		goto err_request;
@@ -1818,8 +1814,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
 	/* Unconditionally flush any chipset caches (for streaming writes). */
 	i915_gem_chipset_flush(eb->i915);
 
-	/* Unconditionally invalidate GPU caches and TLBs. */
-	return eb->engine->emit_flush(eb->request, EMIT_INVALIDATE);
+	return 0;
 }
 
 static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index c2723a06fbb4..f7fc0df251ac 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -208,10 +208,6 @@ int i915_gem_render_state_emit(struct drm_i915_gem_request *rq)
 	if (err)
 		goto err_unpin;
 
-	err = engine->emit_flush(rq, EMIT_INVALIDATE);
-	if (err)
-		goto err_unpin;
-
 	err = engine->emit_bb_start(rq,
 				    so.batch_offset, so.batch_size,
 				    I915_DISPATCH_SECURE);
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index e0d6221022a8..91eae1b20c42 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -703,17 +703,31 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
 	req->reserved_space = MIN_SPACE_FOR_ADD_REQUEST;
 	GEM_BUG_ON(req->reserved_space < engine->emit_breadcrumb_sz);
 
-	ret = engine->request_alloc(req);
-	if (ret)
-		goto err_ctx;
-
-	/* Record the position of the start of the request so that
+	/*
+	 * Record the position of the start of the request so that
 	 * should we detect the updated seqno part-way through the
 	 * GPU processing the request, we never over-estimate the
 	 * position of the head.
 	 */
 	req->head = req->ring->emit;
 
+	/* Unconditionally invalidate GPU caches and TLBs. */
+	ret = engine->emit_flush(req, EMIT_INVALIDATE);
+	if (ret)
+		goto err_ctx;
+
+	ret = engine->request_alloc(req);
+	if (ret) {
+		/*
+		 * Past the point-of-no-return. Since we may have updated
+		 * global state after partially completing the request alloc,
+		 * we need to commit any commands so far emitted in the
+		 * request to the HW.
+		 */
+		__i915_add_request(req, false);
+		return ERR_PTR(ret);
+	}
+
 	/* Check that we didn't interrupt ourselves with a new request */
 	GEM_BUG_ON(req->timeline->seqno != req->fence.seqno);
 	return req;
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 01af540b6ef9..159a2cb68765 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -989,10 +989,6 @@ static int gpu_write(struct i915_vma *vma,
 	i915_vma_unpin(batch);
 	i915_vma_close(batch);
 
-	err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
-	if (err)
-		goto err_request;
-
 	err = i915_switch_context(rq);
 	if (err)
 		goto err_request;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index c82780a9d455..4ff30b9af1fe 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -158,10 +158,6 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
 		goto err_batch;
 	}
 
-	err = engine->emit_flush(rq, EMIT_INVALIDATE);
-	if (err)
-		goto err_request;
-
 	err = i915_switch_context(rq);
 	if (err)
 		goto err_request;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_request.c b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
index 6bce99050e94..d7bf53ff8f84 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
@@ -459,10 +459,6 @@ empty_request(struct intel_engine_cs *engine,
 	if (IS_ERR(request))
 		return request;
 
-	err = engine->emit_flush(request, EMIT_INVALIDATE);
-	if (err)
-		goto out_request;
-
 	err = i915_switch_context(request);
 	if (err)
 		goto out_request;
@@ -675,9 +671,6 @@ static int live_all_engines(void *arg)
 			goto out_request;
 		}
 
-		err = engine->emit_flush(request[id], EMIT_INVALIDATE);
-		GEM_BUG_ON(err);
-
 		err = i915_switch_context(request[id]);
 		GEM_BUG_ON(err);
 
@@ -797,9 +790,6 @@ static int live_sequential_engines(void *arg)
 			}
 		}
 
-		err = engine->emit_flush(request[id], EMIT_INVALIDATE);
-		GEM_BUG_ON(err);
-
 		err = i915_switch_context(request[id]);
 		GEM_BUG_ON(err);
 
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index 71ce06680d66..145bdc26553c 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -114,10 +114,6 @@ static int emit_recurse_batch(struct hang *h,
 	if (err)
 		goto unpin_vma;
 
-	err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
-	if (err)
-		goto unpin_hws;
-
 	err = i915_switch_context(rq);
 	if (err)
 		goto unpin_hws;
-- 
2.15.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] drm/i915: Automatic i915_switch_context for legacy
  2017-11-20 10:20 [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Chris Wilson
@ 2017-11-20 10:20 ` Chris Wilson
  2017-11-20 10:41 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-11-20 10:20 UTC (permalink / raw)
  To: intel-gfx

During request construction, after pinning the context we know whether
or not we have to emit a context switch. So move this common operation
from every caller into i915_gem_request_alloc() itself.

v2: Always submit the request if we emitted some commands during request
construction, as typically it also involves changes in global state.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c                   |  2 +-
 drivers/gpu/drm/i915/i915_gem_context.c           |  7 +------
 drivers/gpu/drm/i915/i915_gem_execbuffer.c        |  8 --------
 drivers/gpu/drm/i915/i915_gem_request.c           |  4 ++++
 drivers/gpu/drm/i915/i915_perf.c                  |  3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c           |  4 ++++
 drivers/gpu/drm/i915/selftests/huge_pages.c       | 10 +++-------
 drivers/gpu/drm/i915/selftests/i915_gem_context.c |  4 ----
 drivers/gpu/drm/i915/selftests/i915_gem_request.c | 10 ----------
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c  |  5 -----
 10 files changed, 14 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 61ba321e9970..e07eb0beef13 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5045,7 +5045,7 @@ static int __intel_engines_record_defaults(struct drm_i915_private *i915)
 			goto out_ctx;
 		}
 
-		err = i915_switch_context(rq);
+		err = 0;
 		if (engine->init_context)
 			err = engine->init_context(rq);
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 2db040695035..c1efbaf02bf2 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -842,8 +842,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
 	struct intel_engine_cs *engine = req->engine;
 
 	lockdep_assert_held(&req->i915->drm.struct_mutex);
-	if (i915_modparams.enable_execlists)
-		return 0;
+	GEM_BUG_ON(i915_modparams.enable_execlists);
 
 	if (!req->ctx->engine[engine->id].state) {
 		struct i915_gem_context *to = req->ctx;
@@ -899,7 +898,6 @@ int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
 
 	for_each_engine(engine, dev_priv, id) {
 		struct drm_i915_gem_request *req;
-		int ret;
 
 		if (engine_has_idle_kernel_context(engine))
 			continue;
@@ -922,10 +920,7 @@ int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
 								 GFP_KERNEL);
 		}
 
-		ret = i915_switch_context(req);
 		i915_add_request(req);
-		if (ret)
-			return ret;
 	}
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index b7895788bc75..14d9e61a1e06 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1111,10 +1111,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
 	if (err)
 		goto err_request;
 
-	err = i915_switch_context(rq);
-	if (err)
-		goto err_request;
-
 	err = eb->engine->emit_bb_start(rq,
 					batch->node.start, PAGE_SIZE,
 					cache->gen > 5 ? 0 : I915_DISPATCH_SECURE);
@@ -1960,10 +1956,6 @@ static int eb_submit(struct i915_execbuffer *eb)
 	if (err)
 		return err;
 
-	err = i915_switch_context(eb->request);
-	if (err)
-		return err;
-
 	if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
 		err = i915_reset_gen7_sol_offsets(eb->request);
 		if (err)
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 91eae1b20c42..86e2346357cf 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -624,6 +624,10 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
 	if (ret)
 		goto err_unpin;
 
+	ret = intel_ring_wait_for_space(ring, MIN_SPACE_FOR_ADD_REQUEST);
+	if (ret)
+		goto err_unreserve;
+
 	/* Move the oldest request to the slab-cache (if not in use!) */
 	req = list_first_entry_or_null(&engine->timeline->requests,
 				       typeof(*req), link);
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 00be015e01df..d8952ff8e6b7 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1726,10 +1726,9 @@ static int gen8_switch_to_updated_kernel_context(struct drm_i915_private *dev_pr
 							 GFP_KERNEL);
 	}
 
-	ret = i915_switch_context(req);
 	i915_add_request(req);
 
-	return ret;
+	return 0;
 }
 
 /*
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 12e734b29463..be98868115bf 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1592,6 +1592,10 @@ static int ring_request_alloc(struct drm_i915_gem_request *request)
 	if (ret)
 		return ret;
 
+	ret = i915_switch_context(request);
+	if (ret)
+		return ret;
+
 	request->reserved_space -= LEGACY_REQUEST_SIZE;
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 159a2cb68765..db7a0a1f2960 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -989,13 +989,9 @@ static int gpu_write(struct i915_vma *vma,
 	i915_vma_unpin(batch);
 	i915_vma_close(batch);
 
-	err = i915_switch_context(rq);
-	if (err)
-		goto err_request;
-
-	err = rq->engine->emit_bb_start(rq,
-					batch->node.start, batch->node.size,
-					flags);
+	err = engine->emit_bb_start(rq,
+				    batch->node.start, batch->node.size,
+				    flags);
 	if (err)
 		goto err_request;
 
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index 4ff30b9af1fe..09340b3c1156 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -158,10 +158,6 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
 		goto err_batch;
 	}
 
-	err = i915_switch_context(rq);
-	if (err)
-		goto err_request;
-
 	flags = 0;
 	if (INTEL_GEN(vm->i915) <= 5)
 		flags |= I915_DISPATCH_SECURE;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_request.c b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
index d7bf53ff8f84..647bf2bbd799 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
@@ -459,10 +459,6 @@ empty_request(struct intel_engine_cs *engine,
 	if (IS_ERR(request))
 		return request;
 
-	err = i915_switch_context(request);
-	if (err)
-		goto out_request;
-
 	err = engine->emit_bb_start(request,
 				    batch->node.start,
 				    batch->node.size,
@@ -671,9 +667,6 @@ static int live_all_engines(void *arg)
 			goto out_request;
 		}
 
-		err = i915_switch_context(request[id]);
-		GEM_BUG_ON(err);
-
 		err = engine->emit_bb_start(request[id],
 					    batch->node.start,
 					    batch->node.size,
@@ -790,9 +783,6 @@ static int live_sequential_engines(void *arg)
 			}
 		}
 
-		err = i915_switch_context(request[id]);
-		GEM_BUG_ON(err);
-
 		err = engine->emit_bb_start(request[id],
 					    batch->node.start,
 					    batch->node.size,
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index 145bdc26553c..1bbb8c46e2d9 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -114,10 +114,6 @@ static int emit_recurse_batch(struct hang *h,
 	if (err)
 		goto unpin_vma;
 
-	err = i915_switch_context(rq);
-	if (err)
-		goto unpin_hws;
-
 	i915_vma_move_to_active(vma, rq, 0);
 	if (!i915_gem_object_has_active_reference(vma->obj)) {
 		i915_gem_object_get(vma->obj);
@@ -169,7 +165,6 @@ static int emit_recurse_batch(struct hang *h,
 
 	err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, flags);
 
-unpin_hws:
 	i915_vma_unpin(hws);
 unpin_vma:
 	i915_vma_unpin(vma);
-- 
2.15.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
  2017-11-20 10:20 [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Chris Wilson
  2017-11-20 10:20 ` [PATCH 2/2] drm/i915: Automatic i915_switch_context for legacy Chris Wilson
@ 2017-11-20 10:41 ` Patchwork
  2017-11-20 11:32 ` ✗ Fi.CI.IGT: warning " Patchwork
  2017-11-20 15:26 ` [PATCH 1/2] " Mika Kuoppala
  3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-11-20 10:41 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
URL   : https://patchwork.freedesktop.org/series/34092/
State : success

== Summary ==

Series 34092v1 series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
https://patchwork.freedesktop.org/api/1.0/series/34092/revisions/1/mbox/

Test gem_exec_reloc:
        Subgroup basic-write-gtt-active:
                fail       -> PASS       (fi-gdg-551) fdo#102582
        Subgroup basic-write-read-active:
                fail       -> PASS       (fi-gdg-551) fdo#102582
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                skip       -> PASS       (fi-hsw-4770r)

fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:442s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:454s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:382s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:534s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:280s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:512s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:509s
fi-byt-j1900     total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  time:498s
fi-byt-n2820     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:496s
fi-cfl-s2        total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:618s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:429s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:266s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:543s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:433s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:440s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:426s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:475s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:461s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:486s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:530s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:478s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:533s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:573s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:455s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:542s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:564s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:519s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:497s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:460s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:560s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:431s

bcf0126fd13f2d0f1b340e1de3b9de265f514098 drm-tip: 2017y-11m-20d-07h-14m-18s UTC integration manifest
965b596c5178 drm/i915: Automatic i915_switch_context for legacy
5bab5a42a1b4 drm/i915: Pull the unconditional GPU cache invalidation into request construction

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7198/
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
  2017-11-20 10:20 [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Chris Wilson
  2017-11-20 10:20 ` [PATCH 2/2] drm/i915: Automatic i915_switch_context for legacy Chris Wilson
  2017-11-20 10:41 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Patchwork
@ 2017-11-20 11:32 ` Patchwork
  2017-11-20 15:26 ` [PATCH 1/2] " Mika Kuoppala
  3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-11-20 11:32 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
URL   : https://patchwork.freedesktop.org/series/34092/
State : warning

== Summary ==

Test kms_flip:
        Subgroup vblank-vs-suspend-interruptible:
                pass       -> SKIP       (shard-hsw) fdo#100368
        Subgroup vblank-vs-dpms-suspend-interruptible:
                pass       -> DMESG-WARN (shard-snb)
Test kms_setmode:
        Subgroup basic:
                fail       -> PASS       (shard-hsw) fdo#99912
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
                pass       -> FAIL       (shard-snb) fdo#101623
Test perf:
        Subgroup blocking:
                fail       -> PASS       (shard-hsw) fdo#102252
Test kms_pipe_crc_basic:
        Subgroup nonblocking-crc-pipe-b-frame-sequence:
                skip       -> PASS       (shard-hsw)

fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-hsw        total:2585 pass:1474 dwarn:1   dfail:1   fail:9   skip:1100 time:9427s
shard-snb        total:2585 pass:1259 dwarn:2   dfail:1   fail:12  skip:1311 time:7965s
Blacklisted hosts:
shard-apl        total:2565 pass:1604 dwarn:2   dfail:0   fail:22  skip:936 time:12880s
shard-kbl        total:2565 pass:1700 dwarn:7   dfail:0   fail:24  skip:833 time:10565s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7198/shards.html
_______________________________________________
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
  2017-11-20 10:20 [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Chris Wilson
                   ` (2 preceding siblings ...)
  2017-11-20 11:32 ` ✗ Fi.CI.IGT: warning " Patchwork
@ 2017-11-20 15:26 ` Mika Kuoppala
  2017-11-20 15:58   ` Chris Wilson
  3 siblings, 1 reply; 6+ messages in thread
From: Mika Kuoppala @ 2017-11-20 15:26 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx

Chris Wilson <chris@chris-wilson.co.uk> writes:

> As the request now may implicitly invoke a context-switch, we should
> follow that with a GPU TLB invalidation. Also even before using GGTT, we

s/follow/preample? As it is the context-switch you are preampling.

Also point that the request allocation will invote a context-switch
but only after next patch.

So with some confusion untangled on these first lines,

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>


> should invalidate the TLBs for any updates (as well as the ppgtt
> invalidates that are unconditionally applied by execbuf). Since we
> almost always require the TLB invalidate, do it unconditionally on
> request allocation and so we can remove it from all other paths.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c        |  7 +------
>  drivers/gpu/drm/i915/i915_gem_render_state.c      |  4 ----
>  drivers/gpu/drm/i915/i915_gem_request.c           | 24 ++++++++++++++++++-----
>  drivers/gpu/drm/i915/selftests/huge_pages.c       |  4 ----
>  drivers/gpu/drm/i915/selftests/i915_gem_context.c |  4 ----
>  drivers/gpu/drm/i915/selftests/i915_gem_request.c | 10 ----------
>  drivers/gpu/drm/i915/selftests/intel_hangcheck.c  |  4 ----
>  7 files changed, 20 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 53ccb27bfe91..b7895788bc75 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1111,10 +1111,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
>  	if (err)
>  		goto err_request;
>  
> -	err = eb->engine->emit_flush(rq, EMIT_INVALIDATE);
> -	if (err)
> -		goto err_request;
> -
>  	err = i915_switch_context(rq);
>  	if (err)
>  		goto err_request;
> @@ -1818,8 +1814,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
>  	/* Unconditionally flush any chipset caches (for streaming writes). */
>  	i915_gem_chipset_flush(eb->i915);
>  
> -	/* Unconditionally invalidate GPU caches and TLBs. */
> -	return eb->engine->emit_flush(eb->request, EMIT_INVALIDATE);
> +	return 0;
>  }
>  
>  static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index c2723a06fbb4..f7fc0df251ac 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -208,10 +208,6 @@ int i915_gem_render_state_emit(struct drm_i915_gem_request *rq)
>  	if (err)
>  		goto err_unpin;
>  
> -	err = engine->emit_flush(rq, EMIT_INVALIDATE);
> -	if (err)
> -		goto err_unpin;
> -
>  	err = engine->emit_bb_start(rq,
>  				    so.batch_offset, so.batch_size,
>  				    I915_DISPATCH_SECURE);
> diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
> index e0d6221022a8..91eae1b20c42 100644
> --- a/drivers/gpu/drm/i915/i915_gem_request.c
> +++ b/drivers/gpu/drm/i915/i915_gem_request.c
> @@ -703,17 +703,31 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
>  	req->reserved_space = MIN_SPACE_FOR_ADD_REQUEST;
>  	GEM_BUG_ON(req->reserved_space < engine->emit_breadcrumb_sz);
>  
> -	ret = engine->request_alloc(req);
> -	if (ret)
> -		goto err_ctx;
> -
> -	/* Record the position of the start of the request so that
> +	/*
> +	 * Record the position of the start of the request so that
>  	 * should we detect the updated seqno part-way through the
>  	 * GPU processing the request, we never over-estimate the
>  	 * position of the head.
>  	 */
>  	req->head = req->ring->emit;
>  
> +	/* Unconditionally invalidate GPU caches and TLBs. */
> +	ret = engine->emit_flush(req, EMIT_INVALIDATE);
> +	if (ret)
> +		goto err_ctx;
> +
> +	ret = engine->request_alloc(req);
> +	if (ret) {
> +		/*
> +		 * Past the point-of-no-return. Since we may have updated
> +		 * global state after partially completing the request alloc,
> +		 * we need to commit any commands so far emitted in the
> +		 * request to the HW.
> +		 */
> +		__i915_add_request(req, false);
> +		return ERR_PTR(ret);
> +	}
> +
>  	/* Check that we didn't interrupt ourselves with a new request */
>  	GEM_BUG_ON(req->timeline->seqno != req->fence.seqno);
>  	return req;
> diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
> index 01af540b6ef9..159a2cb68765 100644
> --- a/drivers/gpu/drm/i915/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
> @@ -989,10 +989,6 @@ static int gpu_write(struct i915_vma *vma,
>  	i915_vma_unpin(batch);
>  	i915_vma_close(batch);
>  
> -	err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
> -	if (err)
> -		goto err_request;
> -
>  	err = i915_switch_context(rq);
>  	if (err)
>  		goto err_request;
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
> index c82780a9d455..4ff30b9af1fe 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
> @@ -158,10 +158,6 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
>  		goto err_batch;
>  	}
>  
> -	err = engine->emit_flush(rq, EMIT_INVALIDATE);
> -	if (err)
> -		goto err_request;
> -
>  	err = i915_switch_context(rq);
>  	if (err)
>  		goto err_request;
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_request.c b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
> index 6bce99050e94..d7bf53ff8f84 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_request.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_request.c
> @@ -459,10 +459,6 @@ empty_request(struct intel_engine_cs *engine,
>  	if (IS_ERR(request))
>  		return request;
>  
> -	err = engine->emit_flush(request, EMIT_INVALIDATE);
> -	if (err)
> -		goto out_request;
> -
>  	err = i915_switch_context(request);
>  	if (err)
>  		goto out_request;
> @@ -675,9 +671,6 @@ static int live_all_engines(void *arg)
>  			goto out_request;
>  		}
>  
> -		err = engine->emit_flush(request[id], EMIT_INVALIDATE);
> -		GEM_BUG_ON(err);
> -
>  		err = i915_switch_context(request[id]);
>  		GEM_BUG_ON(err);
>  
> @@ -797,9 +790,6 @@ static int live_sequential_engines(void *arg)
>  			}
>  		}
>  
> -		err = engine->emit_flush(request[id], EMIT_INVALIDATE);
> -		GEM_BUG_ON(err);
> -
>  		err = i915_switch_context(request[id]);
>  		GEM_BUG_ON(err);
>  
> diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> index 71ce06680d66..145bdc26553c 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> @@ -114,10 +114,6 @@ static int emit_recurse_batch(struct hang *h,
>  	if (err)
>  		goto unpin_vma;
>  
> -	err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
> -	if (err)
> -		goto unpin_hws;
> -
>  	err = i915_switch_context(rq);
>  	if (err)
>  		goto unpin_hws;
> -- 
> 2.15.0
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction
  2017-11-20 15:26 ` [PATCH 1/2] " Mika Kuoppala
@ 2017-11-20 15:58   ` Chris Wilson
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-11-20 15:58 UTC (permalink / raw)
  To: Mika Kuoppala, intel-gfx

Quoting Mika Kuoppala (2017-11-20 15:26:57)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > As the request now may implicitly invoke a context-switch, we should
> > follow that with a GPU TLB invalidation. Also even before using GGTT, we
> 
> s/follow/preample? As it is the context-switch you are preampling.
> 
> Also point that the request allocation will invote a context-switch
> but only after next patch.
> 
> So with some confusion untangled on these first lines,
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

Rewrote the changelog so that the effect of this plus the next patch is
clearer and pushed. Thanks for the review,

Now let's remove some modparams!
-Chris
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^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2017-11-20 15:58 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-11-20 10:20 [PATCH 1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Chris Wilson
2017-11-20 10:20 ` [PATCH 2/2] drm/i915: Automatic i915_switch_context for legacy Chris Wilson
2017-11-20 10:41 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Pull the unconditional GPU cache invalidation into request construction Patchwork
2017-11-20 11:32 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-11-20 15:26 ` [PATCH 1/2] " Mika Kuoppala
2017-11-20 15:58   ` Chris Wilson

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