From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Kuoppala Subject: Re: [patch] drm/i915/mocs: || vs | typo in get_mocs_settings() Date: Mon, 13 Jun 2016 17:40:06 +0300 Message-ID: <87wpltw3sp.fsf@intel.com> References: <20160613065422.GB5993@mwanda> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <20160613065422.GB5993@mwanda> Sender: kernel-janitors-owner@vger.kernel.org To: Dan Carpenter , Daniel Vetter Cc: Jani Nikula , David Airlie , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, kernel-janitors@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org Dan Carpenter writes: > It seems pretty clear that bitwise OR was intended here and not logical > OR. > > Fixes: 6fc29133eafb ('drm/i915/gen9: Add WaDisableSkipCaching') > Signed-off-by: Dan Carpenter Pushed to drm-intel-next-queued. Thanks for patch. -Mika > > diff --git a/drivers/gpu/drm/i915/intel_mocs.c b/drivers/gpu/drm/i915/intel_mocs.c > index 8f96c40..3c1482b 100644 > --- a/drivers/gpu/drm/i915/intel_mocs.c > +++ b/drivers/gpu/drm/i915/intel_mocs.c > @@ -162,7 +162,7 @@ static bool get_mocs_settings(struct drm_i915_private *dev_priv, > > for (i = 0; i < table->size; i++) > if (WARN_ON(table->table[i].l3cc_value & > - (L3_ESC(1) || L3_SCC(0x7)))) > + (L3_ESC(1) | L3_SCC(0x7)))) > return false; > } >