[PATCH 2/4] drm/i915: Use adjusted mode clk for calculating DSI clk

Gaurav K Singh
2015-09-16T09:22:23Z

Earlier, pclk was getting used for calculating DSI clk. For single link
MIPI panels, it will work fine. But for dual link MIPI, since pclk gets
halved, DSI clk will have a wrong value.

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
---
drivers/gpu/drm/i915/intel_dsi_pll.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index bf0f622..a53ccc9 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -468,12 +468,14 @@ static void bxt_dsi_program_clocks(struct drm_device *dev, enum port port)
static bool bxt_configure_dsi_pll(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
+ struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
+ struct drm_display_mode *mode = &intel_crtc->config->base.adjusted_mode;
struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
u8 dsi_ratio;
u32 dsi_clk;
u32 val;

- dsi_clk = dsi_clk_from_pclk(intel_dsi->pclk, intel_dsi->pixel_format,
+ dsi_clk = dsi_clk_from_pclk(mode->clock, intel_dsi->pixel_format,
intel_dsi->lane_count);

/*
--
1.7.9.5