From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eric Anholt Subject: Re: [PATCH] drm/i915: Prefer setting PTE cache age to 3 Date: Fri, 22 Nov 2013 10:38:41 -0800 Message-ID: <87wqk0gu32.fsf@eliezer.anholt.net> References: <1385116673-21675-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1589457243==" Return-path: In-Reply-To: <1385116673-21675-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1589457243== Content-Type: multipart/signed; boundary="=-=-="; micalg=pgp-sha256; protocol="application/pgp-signature" --=-=-= Content-Type: text/plain Chris Wilson writes: > We have conflicting benchmark data that suggest either age 0 or age 3 is > better. However, the earlier benchmark on which we based the switch to > age 0 > > (commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d > Author: Ben Widawsky > Date: Thu Jul 4 11:02:03 2013 -0700 > > drm/i915/hsw: Set correct Haswell PTE encodings) > > actually seems to prefer the default PTE encoding as age 3. Presumably, > this is in part due to the use of MOCS to override the PTE encodings > when appropriate. This bothered me when reviewing the kernel code for hsw. Thanks. Reviewed-by: Eric Anholt Note that userspace doesn't currently set MOCS other than the L3 bit. I'm hoping we end up not having to, since we don't have a WT option in MOCS other than "just listen to the PTEs". --=-=-= Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAEBCAAGBQJSj6SxAAoJELXWKTbR/J7o6boP/0jrThtMuW2WE5OJET6410jZ l38Gsf2O42JowX47yGe2VxZ2ZXLLHRP6YFPGVqDqCB/RpIp+UXTTc3+K9WOI2pIW AiENRWzhFgNUZmMSIE9Wzfxh5Lc7NLl+/jBZl+8RugrXURLSg7iaym/IG6XwjwO1 CTWYxDADAjO+5rjLXaMZ1hYcpXZtnHSxW4JtHn4OeLSHHBelNXtHwdLWNMJEMS37 1giGsBMW6ChvvW4C54odhtbeiddvSpw4ChCW5P0CnO/pnFFNf9wA+38/QcpjnlD3 2qEF5Nss/1RjCPJHHx2+8tbsdgVz1etcxdTJuEvAkb8DBG81v2NlPJTo8M1mC3F+ R5JY+cNh6Yj4Wy3+cAfyNBTm97A5pWoR/vPE5noxKvx7Q99o+9otCfB2g0i3dgBa PU3sAjY1rH5wCXTx4N6q/MDIUw5Rep6zmr8BrqtU5J89Khy2go4LalUhrVbnsIyM lKaSGPGHp5CGw/aVgXOnKW8W3i/YBr9QYkrRYbRcex06pX7ss6rs/1lXLqyv4Yq6 KnP1vD2XLljz1m2XkmBeySLNBVcpTmq6VH+UzQxmEZsF8g8jIJuo1MnyvPM5C3fI kKWl+ccgjmFD5dLgAWb9em/ft5KlOhtpx/Mw5ZEyYOAlH/rSAzFMlBVbVjj0prOA gyJgmtx7WM+aoWM3fZxF =KTEf -----END PGP SIGNATURE----- --=-=-=-- --===============1589457243== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1589457243==--