* [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235
@ 2025-02-25 16:49 Jani Nikula
2025-02-25 16:49 ` [PATCH 01/12] drm/i915/display: remove leftover struct drm_i915_private forward declarations Jani Nikula
` (16 more replies)
0 siblings, 17 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
More of the same.
Jani Nikula (12):
drm/i915/display: remove leftover struct drm_i915_private forward
declarations
drm/i915/debugfs: continue display debugfs struct intel_display
conversion
drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display
drm/i915/snps: convert intel_snps_phy.[ch] to struct intel_display
drm/i915/dkl: convert intel_dkl_phy.[ch] to struct intel_display
drm/i915/drrs: convert intel_drrs.[ch] to struct intel_display
drm/i915/display: convert the M/N functions to struct intel_display
drm/i915/dpt: convert intel_dpt.[ch] interfaces to struct
intel_display
drm/i915/fbc: convert intel_fbc.[ch] to struct intel_display
drm/i915/rps: convert intel_display_rps.[ch] to struct intel_display
drm/i915/ddi: convert intel_wait_ddi_buf_idle() to struct
intel_display
drm/i915/fdi: convert intel_fdi.[ch] to struct intel_display
drivers/gpu/drm/i915/display/intel_atomic.h | 1 -
.../gpu/drm/i915/display/intel_atomic_plane.c | 8 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 11 +-
drivers/gpu/drm/i915/display/intel_ddi.h | 4 +-
.../drm/i915/display/intel_ddi_buf_trans.h | 1 -
drivers/gpu/drm/i915/display/intel_display.c | 102 ++--
drivers/gpu/drm/i915/display/intel_display.h | 8 +-
.../drm/i915/display/intel_display_debugfs.c | 26 +-
.../drm/i915/display/intel_display_debugfs.h | 6 +-
.../drm/i915/display/intel_display_driver.c | 8 +-
.../drm/i915/display/intel_display_power.c | 2 +-
.../gpu/drm/i915/display/intel_display_rps.c | 4 +-
.../gpu/drm/i915/display/intel_display_rps.h | 4 +-
drivers/gpu/drm/i915/display/intel_dkl_phy.c | 8 +-
drivers/gpu/drm/i915/display/intel_dkl_phy.h | 3 +-
drivers/gpu/drm/i915/display/intel_dp.c | 7 +-
drivers/gpu/drm/i915/display/intel_dpt.c | 24 +-
drivers/gpu/drm/i915/display/intel_dpt.h | 7 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 45 +-
drivers/gpu/drm/i915/display/intel_drrs.h | 10 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 113 ++---
drivers/gpu/drm/i915/display/intel_fbc.h | 6 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 464 +++++++++---------
drivers/gpu/drm/i915/display/intel_fdi.h | 16 +-
.../gpu/drm/i915/display/intel_frontbuffer.c | 11 +-
drivers/gpu/drm/i915/display/intel_hdmi.h | 1 -
.../drm/i915/display/intel_modeset_verify.c | 3 +-
drivers/gpu/drm/i915/display/intel_overlay.h | 1 -
.../gpu/drm/i915/display/intel_pch_display.c | 35 +-
drivers/gpu/drm/i915/display/intel_pipe_crc.h | 1 -
drivers/gpu/drm/i915/display/intel_snps_phy.c | 75 ++-
drivers/gpu/drm/i915/display/intel_snps_phy.h | 6 +-
drivers/gpu/drm/i915/display/intel_tdf.h | 6 +-
drivers/gpu/drm/i915/i915_driver.c | 4 +-
drivers/gpu/drm/xe/display/xe_display_rps.c | 2 +-
drivers/gpu/drm/xe/display/xe_tdf.c | 6 +-
36 files changed, 493 insertions(+), 546 deletions(-)
--
2.39.5
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 01/12] drm/i915/display: remove leftover struct drm_i915_private forward declarations
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 02/12] drm/i915/debugfs: continue display debugfs struct intel_display conversion Jani Nikula
` (15 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
A number of unused struct drm_i915_private forward declarations have
been left behind. Remove them.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic.h | 1 -
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h | 1 -
drivers/gpu/drm/i915/display/intel_hdmi.h | 1 -
drivers/gpu/drm/i915/display/intel_overlay.h | 1 -
drivers/gpu/drm/i915/display/intel_pipe_crc.h | 1 -
5 files changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.h b/drivers/gpu/drm/i915/display/intel_atomic.h
index e506f6a87344..a5a7e2906ba8 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic.h
@@ -14,7 +14,6 @@ struct drm_connector_state;
struct drm_crtc;
struct drm_crtc_state;
struct drm_device;
-struct drm_i915_private;
struct drm_property;
struct intel_atomic_state;
struct intel_connector;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index 2133984a572b..29a190390192 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -8,7 +8,6 @@
#include <linux/types.h>
-struct drm_i915_private;
struct intel_encoder;
struct intel_crtc_state;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index d237fe08c3e6..dec2ad7dd8a2 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -14,7 +14,6 @@ enum port;
struct drm_connector;
struct drm_connector_state;
struct drm_encoder;
-struct drm_i915_private;
struct intel_connector;
struct intel_crtc_state;
struct intel_digital_port;
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.h b/drivers/gpu/drm/i915/display/intel_overlay.h
index 45a42fce754e..d259e4c74b03 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.h
+++ b/drivers/gpu/drm/i915/display/intel_overlay.h
@@ -10,7 +10,6 @@
struct drm_device;
struct drm_file;
-struct drm_i915_private;
struct drm_printer;
struct intel_display;
struct intel_overlay;
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.h b/drivers/gpu/drm/i915/display/intel_pipe_crc.h
index 43012b189415..6ddcea38488b 100644
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.h
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.h
@@ -9,7 +9,6 @@
#include <linux/types.h>
struct drm_crtc;
-struct drm_i915_private;
struct intel_crtc;
#ifdef CONFIG_DEBUG_FS
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 02/12] drm/i915/debugfs: continue display debugfs struct intel_display conversion
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
2025-02-25 16:49 ` [PATCH 01/12] drm/i915/display: remove leftover struct drm_i915_private forward declarations Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 03/12] drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display Jani Nikula
` (14 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Nudge intel_display_debugfs.[ch] conversion to struct intel_display
forward.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../drm/i915/display/intel_display_debugfs.c | 26 +++++++------------
.../drm/i915/display/intel_display_debugfs.h | 6 ++---
.../drm/i915/display/intel_display_driver.c | 2 +-
3 files changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 9de7e512c0ab..7ee90cd8ed2d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -49,11 +49,6 @@ static struct intel_display *node_to_intel_display(struct drm_info_node *node)
return to_intel_display(node->minor->dev);
}
-static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
-{
- return to_i915(node->minor->dev);
-}
-
static int intel_display_caps(struct seq_file *m, void *data)
{
struct intel_display *display = node_to_intel_display(m->private);
@@ -85,8 +80,8 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
static int i915_sr_status(struct seq_file *m, void *unused)
{
- struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct intel_display *display = node_to_intel_display(m->private);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
intel_wakeref_t wakeref;
bool sr_enabled = false;
@@ -102,7 +97,7 @@ static int i915_sr_status(struct seq_file *m, void *unused)
else if (display->platform.i915gm)
sr_enabled = intel_de_read(display, INSTPM) & INSTPM_SELF_EN;
else if (display->platform.pineview)
- sr_enabled = intel_de_read(display, DSPFW3(dev_priv)) & PINEVIEW_SELF_REFRESH_EN;
+ sr_enabled = intel_de_read(display, DSPFW3(display)) & PINEVIEW_SELF_REFRESH_EN;
else if (display->platform.valleyview || display->platform.cherryview)
sr_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
@@ -157,8 +152,7 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
static int i915_power_domain_info(struct seq_file *m, void *unused)
{
- struct drm_i915_private *i915 = node_to_i915(m->private);
- struct intel_display *display = &i915->display;
+ struct intel_display *display = node_to_intel_display(m->private);
intel_display_power_debug(display, m);
@@ -588,7 +582,7 @@ static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
static int i915_display_info(struct seq_file *m, void *unused)
{
struct intel_display *display = node_to_intel_display(m->private);
- struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
struct drm_connector *connector;
struct drm_connector_list_iter conn_iter;
@@ -713,14 +707,13 @@ intel_lpsp_power_well_enabled(struct intel_display *display,
static int i915_lpsp_status(struct seq_file *m, void *unused)
{
struct intel_display *display = node_to_intel_display(m->private);
- struct drm_i915_private *i915 = node_to_i915(m->private);
bool lpsp_enabled = false;
if (DISPLAY_VER(display) >= 13 || IS_DISPLAY_VER(display, 9, 10)) {
lpsp_enabled = !intel_lpsp_power_well_enabled(display, SKL_DISP_PW_2);
} else if (IS_DISPLAY_VER(display, 11, 12)) {
lpsp_enabled = !intel_lpsp_power_well_enabled(display, ICL_DISP_PW_3);
- } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
+ } else if (display->platform.haswell || display->platform.broadwell) {
lpsp_enabled = !intel_lpsp_power_well_enabled(display, HSW_DISP_PW_GLOBAL);
} else {
seq_puts(m, "LPSP: not supported\n");
@@ -836,10 +829,10 @@ static const struct drm_info_list intel_display_debugfs_list[] = {
{"i915_lpsp_status", i915_lpsp_status, 0},
};
-void intel_display_debugfs_register(struct drm_i915_private *i915)
+void intel_display_debugfs_register(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
- struct drm_minor *minor = i915->drm.primary;
+ struct drm_i915_private *i915 = to_i915(display->drm);
+ struct drm_minor *minor = display->drm->primary;
debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root,
display, &i915_fifo_underrun_reset_ops);
@@ -865,7 +858,6 @@ static int i915_lpsp_capability_show(struct seq_file *m, void *data)
struct intel_connector *connector = m->private;
struct intel_display *display = to_intel_display(connector);
struct intel_encoder *encoder = intel_attached_encoder(connector);
- struct drm_i915_private *i915 = to_i915(connector->base.dev);
int connector_type = connector->base.connector_type;
bool lpsp_capable = false;
@@ -892,7 +884,7 @@ static int i915_lpsp_capability_show(struct seq_file *m, void *data)
(connector_type == DRM_MODE_CONNECTOR_DSI ||
connector_type == DRM_MODE_CONNECTOR_eDP ||
connector_type == DRM_MODE_CONNECTOR_DisplayPort));
- else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
+ else if (display->platform.haswell || display->platform.broadwell)
lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.h b/drivers/gpu/drm/i915/display/intel_display_debugfs.h
index e1f479b7acd1..82af2f608111 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.h
@@ -6,16 +6,16 @@
#ifndef __INTEL_DISPLAY_DEBUGFS_H__
#define __INTEL_DISPLAY_DEBUGFS_H__
-struct drm_i915_private;
struct intel_connector;
struct intel_crtc;
+struct intel_display;
#ifdef CONFIG_DEBUG_FS
-void intel_display_debugfs_register(struct drm_i915_private *i915);
+void intel_display_debugfs_register(struct intel_display *display);
void intel_connector_debugfs_add(struct intel_connector *connector);
void intel_crtc_debugfs_add(struct intel_crtc *crtc);
#else
-static inline void intel_display_debugfs_register(struct drm_i915_private *i915) {}
+static inline void intel_display_debugfs_register(struct intel_display *display) {}
static inline void intel_connector_debugfs_add(struct intel_connector *connector) {}
static inline void intel_crtc_debugfs_add(struct intel_crtc *crtc) {}
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index b72b07329fbf..aa394f574575 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -550,7 +550,7 @@ void intel_display_driver_register(struct intel_display *display)
intel_audio_register(display);
- intel_display_debugfs_register(i915);
+ intel_display_debugfs_register(display);
/*
* We need to coordinate the hotplugs with the asynchronous
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 03/12] drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
2025-02-25 16:49 ` [PATCH 01/12] drm/i915/display: remove leftover struct drm_i915_private forward declarations Jani Nikula
2025-02-25 16:49 ` [PATCH 02/12] drm/i915/debugfs: continue display debugfs struct intel_display conversion Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 04/12] drm/i915/snps: convert intel_snps_phy.[ch] " Jani Nikula
` (13 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the intel_tdf.[ch] glue to struct intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_frontbuffer.c | 2 +-
drivers/gpu/drm/i915/display/intel_tdf.h | 6 +++---
drivers/gpu/drm/xe/display/xe_tdf.c | 6 ++++--
4 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 065fdf6dbb88..1536a4a4f824 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7425,7 +7425,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
intel_atomic_commit_fence_wait(state);
- intel_td_flush(dev_priv);
+ intel_td_flush(display);
intel_atomic_prepare_plane_clear_colors(state);
diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 26128c610cb4..2fa4b0bf27c3 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -98,7 +98,7 @@ static void frontbuffer_flush(struct drm_i915_private *i915,
trace_intel_frontbuffer_flush(display, frontbuffer_bits, origin);
might_sleep();
- intel_td_flush(i915);
+ intel_td_flush(display);
intel_drrs_flush(i915, frontbuffer_bits);
intel_psr_flush(display, frontbuffer_bits, origin);
intel_fbc_flush(i915, frontbuffer_bits, origin);
diff --git a/drivers/gpu/drm/i915/display/intel_tdf.h b/drivers/gpu/drm/i915/display/intel_tdf.h
index 353cde21f6c2..0862c2bfd9cd 100644
--- a/drivers/gpu/drm/i915/display/intel_tdf.h
+++ b/drivers/gpu/drm/i915/display/intel_tdf.h
@@ -14,12 +14,12 @@
* the display flip, since display engine is never coherent with CPU/GPU caches.
*/
-struct drm_i915_private;
+struct intel_display;
#ifdef I915
-static inline void intel_td_flush(struct drm_i915_private *i915) {}
+static inline void intel_td_flush(struct intel_display *display) {}
#else
-void intel_td_flush(struct drm_i915_private *i915);
+void intel_td_flush(struct intel_display *display);
#endif
#endif
diff --git a/drivers/gpu/drm/xe/display/xe_tdf.c b/drivers/gpu/drm/xe/display/xe_tdf.c
index 2c0d4e144e09..2a7fccbeb1d5 100644
--- a/drivers/gpu/drm/xe/display/xe_tdf.c
+++ b/drivers/gpu/drm/xe/display/xe_tdf.c
@@ -7,7 +7,9 @@
#include "intel_display_types.h"
#include "intel_tdf.h"
-void intel_td_flush(struct drm_i915_private *i915)
+void intel_td_flush(struct intel_display *display)
{
- xe_device_td_flush(i915);
+ struct xe_device *xe = to_xe_device(display->drm);
+
+ xe_device_td_flush(xe);
}
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 04/12] drm/i915/snps: convert intel_snps_phy.[ch] to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (2 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 03/12] drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 05/12] drm/i915/dkl: convert intel_dkl_phy.[ch] " Jani Nikula
` (12 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the intel_snps_phy.[ch] to struct intel_display. Also
convert the very much related intel_phy_is_snps() helper.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 8 +-
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
.../drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/display/intel_snps_phy.c | 75 +++++++++----------
drivers/gpu/drm/i915/display/intel_snps_phy.h | 6 +-
6 files changed, 47 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 8c8b53414da6..5b13f8e02fa9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5139,7 +5139,7 @@ void intel_ddi_init(struct intel_display *display,
return;
}
- if (intel_phy_is_snps(dev_priv, phy) &&
+ if (intel_phy_is_snps(display, phy) &&
dev_priv->display.snps.phy_failed_calibration & BIT(phy)) {
drm_dbg_kms(&dev_priv->drm,
"SNPS PHY %c failed to calibrate, proceeding anyway\n",
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1536a4a4f824..46fb8e088c15 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1925,13 +1925,13 @@ bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy)
}
/* Prefer intel_encoder_is_snps() */
-bool intel_phy_is_snps(struct drm_i915_private *dev_priv, enum phy phy)
+bool intel_phy_is_snps(struct intel_display *display, enum phy phy)
{
/*
* For DG2, and for DG2 only, all four "combo" ports and the TC1 port
* (PHY E) use Synopsis PHYs. See intel_phy_is_tc().
*/
- return IS_DG2(dev_priv) && phy > PHY_NONE && phy <= PHY_E;
+ return display->platform.dg2 && phy > PHY_NONE && phy <= PHY_E;
}
/* Prefer intel_encoder_to_phy() */
@@ -1980,9 +1980,9 @@ bool intel_encoder_is_combo(struct intel_encoder *encoder)
bool intel_encoder_is_snps(struct intel_encoder *encoder)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
- return intel_phy_is_snps(i915, intel_encoder_to_phy(encoder));
+ return intel_phy_is_snps(display, intel_encoder_to_phy(encoder));
}
bool intel_encoder_is_tc(struct intel_encoder *encoder)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index e58daefc978e..91f01e81a8f0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -466,7 +466,7 @@ void intel_encoder_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state);
bool intel_phy_is_combo(struct intel_display *display, enum phy phy);
bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy);
-bool intel_phy_is_snps(struct drm_i915_private *dev_priv, enum phy phy);
+bool intel_phy_is_snps(struct intel_display *display, enum phy phy);
enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
enum port port);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 396930937d98..122384c4abc8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1684,7 +1684,7 @@ static void icl_display_core_init(struct intel_display *display,
/* 8. Ensure PHYs have completed calibration and adaptation */
if (display->platform.dg2)
- intel_snps_phy_wait_for_calibration(dev_priv);
+ intel_snps_phy_wait_for_calibration(display);
/* 9. XE2_HPD: Program CHICKEN_MISC_2 before any cursor or planes are enabled */
if (DISPLAY_VERx100(display) == 1401)
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index 353221d3e29f..b9acd9fe160c 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -5,8 +5,8 @@
#include <linux/math.h>
-#include "i915_drv.h"
#include "i915_reg.h"
+#include "i915_utils.h"
#include "intel_ddi.h"
#include "intel_ddi_buf_trans.h"
#include "intel_de.h"
@@ -27,12 +27,12 @@
* since it is not handled by the shared DPLL framework as on other platforms.
*/
-void intel_snps_phy_wait_for_calibration(struct drm_i915_private *i915)
+void intel_snps_phy_wait_for_calibration(struct intel_display *display)
{
enum phy phy;
for_each_phy_masked(phy, ~0) {
- if (!intel_phy_is_snps(i915, phy))
+ if (!intel_phy_is_snps(display, phy))
continue;
/*
@@ -40,16 +40,16 @@ void intel_snps_phy_wait_for_calibration(struct drm_i915_private *i915)
* which phy was affected and skip setup of the corresponding
* output later.
*/
- if (intel_de_wait_for_clear(i915, DG2_PHY_MISC(phy),
+ if (intel_de_wait_for_clear(display, DG2_PHY_MISC(phy),
DG2_PHY_DP_TX_ACK_MASK, 25))
- i915->display.snps.phy_failed_calibration |= BIT(phy);
+ display->snps.phy_failed_calibration |= BIT(phy);
}
}
void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder,
bool enable)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
enum phy phy = intel_encoder_to_phy(encoder);
u32 val;
@@ -58,20 +58,20 @@ void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder,
val = REG_FIELD_PREP(SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR,
enable ? 2 : 3);
- intel_de_rmw(i915, SNPS_PHY_TX_REQ(phy),
+ intel_de_rmw(display, SNPS_PHY_TX_REQ(phy),
SNPS_PHY_TX_REQ_LN_DIS_PWR_STATE_PSR, val);
}
void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
const struct intel_ddi_buf_trans *trans;
enum phy phy = intel_encoder_to_phy(encoder);
int n_entries, ln;
trans = encoder->get_buf_trans(encoder, crtc_state, &n_entries);
- if (drm_WARN_ON_ONCE(&dev_priv->drm, !trans))
+ if (drm_WARN_ON_ONCE(display->drm, !trans))
return;
for (ln = 0; ln < 4; ln++) {
@@ -82,7 +82,7 @@ void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder,
val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_PRE, trans->entries[level].snps.pre_cursor);
val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_POST, trans->entries[level].snps.post_cursor);
- intel_de_write(dev_priv, SNPS_PHY_TX_EQ(ln, phy), val);
+ intel_de_write(display, SNPS_PHY_TX_EQ(ln, phy), val);
}
}
@@ -1817,7 +1817,7 @@ int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state,
void intel_mpllb_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
const struct intel_mpllb_state *pll_state = &crtc_state->dpll_hw_state.mpllb;
enum phy phy = intel_encoder_to_phy(encoder);
i915_reg_t enable_reg = (phy <= PHY_D ?
@@ -1827,13 +1827,13 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
* 3. Software programs the following PLL registers for the desired
* frequency.
*/
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_CP(phy), pll_state->mpllb_cp);
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV(phy), pll_state->mpllb_div);
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV2(phy), pll_state->mpllb_div2);
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCEN(phy), pll_state->mpllb_sscen);
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_SSCSTEP(phy), pll_state->mpllb_sscstep);
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN1(phy), pll_state->mpllb_fracn1);
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_FRACN2(phy), pll_state->mpllb_fracn2);
+ intel_de_write(display, SNPS_PHY_MPLLB_CP(phy), pll_state->mpllb_cp);
+ intel_de_write(display, SNPS_PHY_MPLLB_DIV(phy), pll_state->mpllb_div);
+ intel_de_write(display, SNPS_PHY_MPLLB_DIV2(phy), pll_state->mpllb_div2);
+ intel_de_write(display, SNPS_PHY_MPLLB_SSCEN(phy), pll_state->mpllb_sscen);
+ intel_de_write(display, SNPS_PHY_MPLLB_SSCSTEP(phy), pll_state->mpllb_sscstep);
+ intel_de_write(display, SNPS_PHY_MPLLB_FRACN1(phy), pll_state->mpllb_fracn1);
+ intel_de_write(display, SNPS_PHY_MPLLB_FRACN2(phy), pll_state->mpllb_fracn2);
/*
* 4. If the frequency will result in a change to the voltage
@@ -1844,7 +1844,7 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
*/
/* 5. Software sets DPLL_ENABLE [PLL Enable] to "1". */
- intel_de_rmw(dev_priv, enable_reg, 0, PLL_ENABLE);
+ intel_de_rmw(display, enable_reg, 0, PLL_ENABLE);
/*
* 9. Software sets SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "1". This
@@ -1853,7 +1853,7 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
* PLL because that will start the PLL before it has sampled the
* divider values.
*/
- intel_de_write(dev_priv, SNPS_PHY_MPLLB_DIV(phy),
+ intel_de_write(display, SNPS_PHY_MPLLB_DIV(phy),
pll_state->mpllb_div | SNPS_PHY_MPLLB_FORCE_EN);
/*
@@ -1861,8 +1861,8 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
* is locked at new settings. This register bit is sampling PHY
* dp_mpllb_state interface signal.
*/
- if (intel_de_wait_for_set(dev_priv, enable_reg, PLL_LOCK, 5))
- drm_dbg_kms(&dev_priv->drm, "Port %c PLL not locked\n", phy_name(phy));
+ if (intel_de_wait_for_set(display, enable_reg, PLL_LOCK, 5))
+ drm_dbg_kms(display->drm, "Port %c PLL not locked\n", phy_name(phy));
/*
* 11. If the frequency will result in a change to the voltage
@@ -1875,7 +1875,7 @@ void intel_mpllb_enable(struct intel_encoder *encoder,
void intel_mpllb_disable(struct intel_encoder *encoder)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
enum phy phy = intel_encoder_to_phy(encoder);
i915_reg_t enable_reg = (phy <= PHY_D ?
DG2_PLL_ENABLE(phy) : MG_PLL_ENABLE(0));
@@ -1889,20 +1889,20 @@ void intel_mpllb_disable(struct intel_encoder *encoder)
*/
/* 2. Software programs DPLL_ENABLE [PLL Enable] to "0" */
- intel_de_rmw(i915, enable_reg, PLL_ENABLE, 0);
+ intel_de_rmw(display, enable_reg, PLL_ENABLE, 0);
/*
* 4. Software programs SNPS_PHY_MPLLB_DIV dp_mpllb_force_en to "0".
* This will allow the PLL to stop running.
*/
- intel_de_rmw(i915, SNPS_PHY_MPLLB_DIV(phy), SNPS_PHY_MPLLB_FORCE_EN, 0);
+ intel_de_rmw(display, SNPS_PHY_MPLLB_DIV(phy), SNPS_PHY_MPLLB_FORCE_EN, 0);
/*
* 5. Software polls DPLL_ENABLE [PLL Lock] for PHY acknowledgment
* (dp_txX_ack) that the new transmitter setting request is completed.
*/
- if (intel_de_wait_for_clear(i915, enable_reg, PLL_LOCK, 5))
- drm_err(&i915->drm, "Port %c PLL not locked\n", phy_name(phy));
+ if (intel_de_wait_for_clear(display, enable_reg, PLL_LOCK, 5))
+ drm_err(display->drm, "Port %c PLL not locked\n", phy_name(phy));
/*
* 6. If the frequency will result in a change to the voltage
@@ -1947,16 +1947,16 @@ int intel_mpllb_calc_port_clock(struct intel_encoder *encoder,
void intel_mpllb_readout_hw_state(struct intel_encoder *encoder,
struct intel_mpllb_state *pll_state)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
enum phy phy = intel_encoder_to_phy(encoder);
- pll_state->mpllb_cp = intel_de_read(dev_priv, SNPS_PHY_MPLLB_CP(phy));
- pll_state->mpllb_div = intel_de_read(dev_priv, SNPS_PHY_MPLLB_DIV(phy));
- pll_state->mpllb_div2 = intel_de_read(dev_priv, SNPS_PHY_MPLLB_DIV2(phy));
- pll_state->mpllb_sscen = intel_de_read(dev_priv, SNPS_PHY_MPLLB_SSCEN(phy));
- pll_state->mpllb_sscstep = intel_de_read(dev_priv, SNPS_PHY_MPLLB_SSCSTEP(phy));
- pll_state->mpllb_fracn1 = intel_de_read(dev_priv, SNPS_PHY_MPLLB_FRACN1(phy));
- pll_state->mpllb_fracn2 = intel_de_read(dev_priv, SNPS_PHY_MPLLB_FRACN2(phy));
+ pll_state->mpllb_cp = intel_de_read(display, SNPS_PHY_MPLLB_CP(phy));
+ pll_state->mpllb_div = intel_de_read(display, SNPS_PHY_MPLLB_DIV(phy));
+ pll_state->mpllb_div2 = intel_de_read(display, SNPS_PHY_MPLLB_DIV2(phy));
+ pll_state->mpllb_sscen = intel_de_read(display, SNPS_PHY_MPLLB_SSCEN(phy));
+ pll_state->mpllb_sscstep = intel_de_read(display, SNPS_PHY_MPLLB_SSCSTEP(phy));
+ pll_state->mpllb_fracn1 = intel_de_read(display, SNPS_PHY_MPLLB_FRACN1(phy));
+ pll_state->mpllb_fracn2 = intel_de_read(display, SNPS_PHY_MPLLB_FRACN2(phy));
/*
* REF_CONTROL is under firmware control and never programmed by the
@@ -1964,7 +1964,7 @@ void intel_mpllb_readout_hw_state(struct intel_encoder *encoder,
* only tells us the expected value for one field in this register,
* so we'll only read out those specific bits here.
*/
- pll_state->ref_control = intel_de_read(dev_priv, SNPS_PHY_REF_CONTROL(phy)) &
+ pll_state->ref_control = intel_de_read(display, SNPS_PHY_REF_CONTROL(phy)) &
SNPS_PHY_REF_CONTROL_REF_RANGE;
/*
@@ -1980,14 +1980,13 @@ void intel_mpllb_state_verify(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct intel_mpllb_state mpllb_hw_state = {};
const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->dpll_hw_state.mpllb;
struct intel_encoder *encoder;
- if (!IS_DG2(i915))
+ if (!display->platform.dg2)
return;
if (!new_crtc_state->hw.active)
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h
index 1dd564ed9fa8..7f96da22d028 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h
@@ -8,15 +8,15 @@
#include <linux/types.h>
-struct drm_i915_private;
+enum phy;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
+struct intel_display;
struct intel_encoder;
struct intel_mpllb_state;
-enum phy;
-void intel_snps_phy_wait_for_calibration(struct drm_i915_private *dev_priv);
+void intel_snps_phy_wait_for_calibration(struct intel_display *display);
void intel_snps_phy_update_psr_power_state(struct intel_encoder *encoder,
bool enable);
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 05/12] drm/i915/dkl: convert intel_dkl_phy.[ch] to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (3 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 04/12] drm/i915/snps: convert intel_snps_phy.[ch] " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 06/12] drm/i915/drrs: convert intel_drrs.[ch] " Jani Nikula
` (11 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert intel_dkl_phy.[ch] to struct intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dkl_phy.c | 8 +++-----
drivers/gpu/drm/i915/display/intel_dkl_phy.h | 3 +--
3 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index aa394f574575..f22672ed556a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -194,7 +194,7 @@ void intel_display_driver_early_probe(struct intel_display *display)
mutex_init(&display->hdcp.hdcp_mutex);
intel_display_irq_init(i915);
- intel_dkl_phy_init(i915);
+ intel_dkl_phy_init(display);
intel_color_init_hooks(display);
intel_init_cdclk_hooks(display);
intel_audio_hooks_init(display);
diff --git a/drivers/gpu/drm/i915/display/intel_dkl_phy.c b/drivers/gpu/drm/i915/display/intel_dkl_phy.c
index 0920f78f182e..79601f43d4a0 100644
--- a/drivers/gpu/drm/i915/display/intel_dkl_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_dkl_phy.c
@@ -3,8 +3,6 @@
* Copyright © 2022 Intel Corporation
*/
-#include "i915_drv.h"
-
#include "intel_de.h"
#include "intel_display.h"
#include "intel_dkl_phy.h"
@@ -12,11 +10,11 @@
/**
* intel_dkl_phy_init - initialize Dekel PHY
- * @i915: i915 device instance
+ * @display: display device instance
*/
-void intel_dkl_phy_init(struct drm_i915_private *i915)
+void intel_dkl_phy_init(struct intel_display *display)
{
- spin_lock_init(&i915->display.dkl.phy_lock);
+ spin_lock_init(&display->dkl.phy_lock);
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_dkl_phy.h b/drivers/gpu/drm/i915/display/intel_dkl_phy.h
index 1d96e6be657c..ccb445c0022b 100644
--- a/drivers/gpu/drm/i915/display/intel_dkl_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_dkl_phy.h
@@ -10,10 +10,9 @@
#include "intel_dkl_phy_regs.h"
-struct drm_i915_private;
struct intel_display;
-void intel_dkl_phy_init(struct drm_i915_private *i915);
+void intel_dkl_phy_init(struct intel_display *display);
u32
intel_dkl_phy_read(struct intel_display *display, struct intel_dkl_phy_reg reg);
void
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 06/12] drm/i915/drrs: convert intel_drrs.[ch] to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (4 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 05/12] drm/i915/dkl: convert intel_dkl_phy.[ch] " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 07/12] drm/i915/display: convert the M/N functions " Jani Nikula
` (10 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_drrs.[ch] to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 39 +++++++++----------
drivers/gpu/drm/i915/display/intel_drrs.h | 10 ++---
.../gpu/drm/i915/display/intel_frontbuffer.c | 4 +-
4 files changed, 28 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 03ca2e02ab02..bf96433d63c3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2912,7 +2912,7 @@ static bool can_enable_drrs(struct intel_connector *connector,
const struct intel_crtc_state *pipe_config,
const struct drm_display_mode *downclock_mode)
{
- struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ struct intel_display *display = to_intel_display(connector);
if (pipe_config->vrr.enable)
return false;
@@ -2930,7 +2930,7 @@ static bool can_enable_drrs(struct intel_connector *connector,
if (pipe_config->has_pch_encoder)
return false;
- if (!intel_cpu_transcoder_has_drrs(i915, pipe_config->cpu_transcoder))
+ if (!intel_cpu_transcoder_has_drrs(display, pipe_config->cpu_transcoder))
return false;
return downclock_mode &&
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 0fec01b79b23..bf420400b505 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -65,10 +65,10 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
return str[drrs_type];
}
-bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
+bool intel_cpu_transcoder_has_drrs(struct intel_display *display,
enum transcoder cpu_transcoder)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
if (HAS_DOUBLE_BUFFERED_M_N(display))
return true;
@@ -80,16 +80,16 @@ static void
intel_drrs_set_refresh_rate_pipeconf(struct intel_crtc *crtc,
enum drrs_refresh_rate refresh_rate)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum transcoder cpu_transcoder = crtc->drrs.cpu_transcoder;
u32 bit;
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ if (display->platform.valleyview || display->platform.cherryview)
bit = TRANSCONF_REFRESH_RATE_ALT_VLV;
else
bit = TRANSCONF_REFRESH_RATE_ALT_ILK;
- intel_de_rmw(dev_priv, TRANSCONF(dev_priv, cpu_transcoder),
+ intel_de_rmw(display, TRANSCONF(display, cpu_transcoder),
bit, refresh_rate == DRRS_REFRESH_RATE_LOW ? bit : 0);
}
@@ -132,13 +132,13 @@ static void intel_drrs_schedule_work(struct intel_crtc *crtc)
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
unsigned int frontbuffer_bits;
frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
- for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc,
+ for_each_intel_crtc_in_pipe_mask(display->drm, crtc,
crtc_state->joiner_pipes)
frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
@@ -222,13 +222,13 @@ static void intel_drrs_downclock_work(struct work_struct *work)
mutex_unlock(&crtc->drrs.mutex);
}
-static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv,
+static void intel_drrs_frontbuffer_update(struct intel_display *display,
unsigned int all_frontbuffer_bits,
bool invalidate)
{
struct intel_crtc *crtc;
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
unsigned int frontbuffer_bits;
mutex_lock(&crtc->drrs.mutex);
@@ -262,7 +262,7 @@ static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv,
/**
* intel_drrs_invalidate - Disable Idleness DRRS
- * @dev_priv: i915 device
+ * @display: display device
* @frontbuffer_bits: frontbuffer plane tracking bits
*
* This function gets called everytime rendering on the given planes start.
@@ -270,15 +270,15 @@ static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv,
*
* Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
*/
-void intel_drrs_invalidate(struct drm_i915_private *dev_priv,
+void intel_drrs_invalidate(struct intel_display *display,
unsigned int frontbuffer_bits)
{
- intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, true);
+ intel_drrs_frontbuffer_update(display, frontbuffer_bits, true);
}
/**
* intel_drrs_flush - Restart Idleness DRRS
- * @dev_priv: i915 device
+ * @display: display device
* @frontbuffer_bits: frontbuffer plane tracking bits
*
* This function gets called every time rendering on the given planes has
@@ -288,10 +288,10 @@ void intel_drrs_invalidate(struct drm_i915_private *dev_priv,
*
* Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
*/
-void intel_drrs_flush(struct drm_i915_private *dev_priv,
+void intel_drrs_flush(struct intel_display *display,
unsigned int frontbuffer_bits)
{
- intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, false);
+ intel_drrs_frontbuffer_update(display, frontbuffer_bits, false);
}
/**
@@ -312,7 +312,7 @@ void intel_drrs_crtc_init(struct intel_crtc *crtc)
static int intel_drrs_debugfs_status_show(struct seq_file *m, void *unused)
{
struct intel_crtc *crtc = m->private;
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *crtc_state;
int ret;
@@ -325,7 +325,7 @@ static int intel_drrs_debugfs_status_show(struct seq_file *m, void *unused)
mutex_lock(&crtc->drrs.mutex);
seq_printf(m, "DRRS capable: %s\n",
- str_yes_no(intel_cpu_transcoder_has_drrs(i915,
+ str_yes_no(intel_cpu_transcoder_has_drrs(display,
crtc_state->cpu_transcoder)));
seq_printf(m, "DRRS enabled: %s\n",
@@ -353,7 +353,7 @@ DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_status);
static int intel_drrs_debugfs_ctl_set(void *data, u64 val)
{
struct intel_crtc *crtc = data;
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
struct intel_crtc_state *crtc_state;
struct drm_crtc_commit *commit;
int ret;
@@ -375,8 +375,7 @@ static int intel_drrs_debugfs_ctl_set(void *data, u64 val)
goto out;
}
- drm_dbg(&i915->drm,
- "Manually %sactivating DRRS\n", val ? "" : "de");
+ drm_dbg_kms(display->drm, "Manually %sactivating DRRS\n", val ? "" : "de");
if (val)
intel_drrs_activate(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.h b/drivers/gpu/drm/i915/display/intel_drrs.h
index 0982f95eab72..32b45a93a68f 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.h
+++ b/drivers/gpu/drm/i915/display/intel_drrs.h
@@ -10,21 +10,21 @@
enum drrs_type;
enum transcoder;
-struct drm_i915_private;
struct intel_atomic_state;
+struct intel_connector;
struct intel_crtc;
struct intel_crtc_state;
-struct intel_connector;
+struct intel_display;
-bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
+bool intel_cpu_transcoder_has_drrs(struct intel_display *display,
enum transcoder cpu_transcoder);
const char *intel_drrs_type_str(enum drrs_type drrs_type);
bool intel_drrs_is_active(struct intel_crtc *crtc);
void intel_drrs_activate(const struct intel_crtc_state *crtc_state);
void intel_drrs_deactivate(const struct intel_crtc_state *crtc_state);
-void intel_drrs_invalidate(struct drm_i915_private *dev_priv,
+void intel_drrs_invalidate(struct intel_display *display,
unsigned int frontbuffer_bits);
-void intel_drrs_flush(struct drm_i915_private *dev_priv,
+void intel_drrs_flush(struct intel_display *display,
unsigned int frontbuffer_bits);
void intel_drrs_crtc_init(struct intel_crtc *crtc);
void intel_drrs_crtc_debugfs_add(struct intel_crtc *crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 2fa4b0bf27c3..89a145b3194c 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -99,7 +99,7 @@ static void frontbuffer_flush(struct drm_i915_private *i915,
might_sleep();
intel_td_flush(display);
- intel_drrs_flush(i915, frontbuffer_bits);
+ intel_drrs_flush(display, frontbuffer_bits);
intel_psr_flush(display, frontbuffer_bits, origin);
intel_fbc_flush(i915, frontbuffer_bits, origin);
}
@@ -189,7 +189,7 @@ void __intel_fb_invalidate(struct intel_frontbuffer *front,
might_sleep();
intel_psr_invalidate(display, frontbuffer_bits, origin);
- intel_drrs_invalidate(i915, frontbuffer_bits);
+ intel_drrs_invalidate(display, frontbuffer_bits);
intel_fbc_invalidate(i915, frontbuffer_bits, origin);
}
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 07/12] drm/i915/display: convert the M/N functions to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (5 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 06/12] drm/i915/drrs: convert intel_drrs.[ch] " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 08/12] drm/i915/dpt: convert intel_dpt.[ch] interfaces " Jani Nikula
` (9 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the functions to set/get M/N values and check for M2/N2
support to struct intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 88 +++++++++----------
drivers/gpu/drm/i915/display/intel_display.h | 6 +-
drivers/gpu/drm/i915/display/intel_dp.c | 3 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 8 +-
.../gpu/drm/i915/display/intel_pch_display.c | 16 ++--
5 files changed, 59 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 46fb8e088c15..49a67d629c07 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2662,45 +2662,45 @@ void intel_zero_m_n(struct intel_link_m_n *m_n)
m_n->tu = 1;
}
-void intel_set_m_n(struct drm_i915_private *i915,
+void intel_set_m_n(struct intel_display *display,
const struct intel_link_m_n *m_n,
i915_reg_t data_m_reg, i915_reg_t data_n_reg,
i915_reg_t link_m_reg, i915_reg_t link_n_reg)
{
- intel_de_write(i915, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
- intel_de_write(i915, data_n_reg, m_n->data_n);
- intel_de_write(i915, link_m_reg, m_n->link_m);
+ intel_de_write(display, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m);
+ intel_de_write(display, data_n_reg, m_n->data_n);
+ intel_de_write(display, link_m_reg, m_n->link_m);
/*
* On BDW+ writing LINK_N arms the double buffered update
* of all the M/N registers, so it must be written last.
*/
- intel_de_write(i915, link_n_reg, m_n->link_n);
+ intel_de_write(display, link_n_reg, m_n->link_n);
}
-bool intel_cpu_transcoder_has_m2_n2(struct drm_i915_private *dev_priv,
+bool intel_cpu_transcoder_has_m2_n2(struct intel_display *display,
enum transcoder transcoder)
{
- if (IS_HASWELL(dev_priv))
+ if (display->platform.haswell)
return transcoder == TRANSCODER_EDP;
- return IS_DISPLAY_VER(dev_priv, 5, 7) || IS_CHERRYVIEW(dev_priv);
+ return IS_DISPLAY_VER(display, 5, 7) || display->platform.cherryview;
}
void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc,
enum transcoder transcoder,
const struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
- if (DISPLAY_VER(dev_priv) >= 5)
- intel_set_m_n(dev_priv, m_n,
- PIPE_DATA_M1(dev_priv, transcoder),
- PIPE_DATA_N1(dev_priv, transcoder),
- PIPE_LINK_M1(dev_priv, transcoder),
- PIPE_LINK_N1(dev_priv, transcoder));
+ if (DISPLAY_VER(display) >= 5)
+ intel_set_m_n(display, m_n,
+ PIPE_DATA_M1(display, transcoder),
+ PIPE_DATA_N1(display, transcoder),
+ PIPE_LINK_M1(display, transcoder),
+ PIPE_LINK_N1(display, transcoder));
else
- intel_set_m_n(dev_priv, m_n,
+ intel_set_m_n(display, m_n,
PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe),
PIPE_LINK_M_G4X(pipe), PIPE_LINK_N_G4X(pipe));
}
@@ -2709,16 +2709,16 @@ void intel_cpu_transcoder_set_m2_n2(struct intel_crtc *crtc,
enum transcoder transcoder,
const struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
- if (!intel_cpu_transcoder_has_m2_n2(dev_priv, transcoder))
+ if (!intel_cpu_transcoder_has_m2_n2(display, transcoder))
return;
- intel_set_m_n(dev_priv, m_n,
- PIPE_DATA_M2(dev_priv, transcoder),
- PIPE_DATA_N2(dev_priv, transcoder),
- PIPE_LINK_M2(dev_priv, transcoder),
- PIPE_LINK_N2(dev_priv, transcoder));
+ intel_set_m_n(display, m_n,
+ PIPE_DATA_M2(display, transcoder),
+ PIPE_DATA_N2(display, transcoder),
+ PIPE_LINK_M2(display, transcoder),
+ PIPE_LINK_N2(display, transcoder));
}
static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
@@ -3404,33 +3404,33 @@ int ilk_get_lanes_required(int target_clock, int link_bw, int bpp)
return DIV_ROUND_UP(bps, link_bw * 8);
}
-void intel_get_m_n(struct drm_i915_private *i915,
+void intel_get_m_n(struct intel_display *display,
struct intel_link_m_n *m_n,
i915_reg_t data_m_reg, i915_reg_t data_n_reg,
i915_reg_t link_m_reg, i915_reg_t link_n_reg)
{
- m_n->link_m = intel_de_read(i915, link_m_reg) & DATA_LINK_M_N_MASK;
- m_n->link_n = intel_de_read(i915, link_n_reg) & DATA_LINK_M_N_MASK;
- m_n->data_m = intel_de_read(i915, data_m_reg) & DATA_LINK_M_N_MASK;
- m_n->data_n = intel_de_read(i915, data_n_reg) & DATA_LINK_M_N_MASK;
- m_n->tu = REG_FIELD_GET(TU_SIZE_MASK, intel_de_read(i915, data_m_reg)) + 1;
+ m_n->link_m = intel_de_read(display, link_m_reg) & DATA_LINK_M_N_MASK;
+ m_n->link_n = intel_de_read(display, link_n_reg) & DATA_LINK_M_N_MASK;
+ m_n->data_m = intel_de_read(display, data_m_reg) & DATA_LINK_M_N_MASK;
+ m_n->data_n = intel_de_read(display, data_n_reg) & DATA_LINK_M_N_MASK;
+ m_n->tu = REG_FIELD_GET(TU_SIZE_MASK, intel_de_read(display, data_m_reg)) + 1;
}
void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc,
enum transcoder transcoder,
struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
- if (DISPLAY_VER(dev_priv) >= 5)
- intel_get_m_n(dev_priv, m_n,
- PIPE_DATA_M1(dev_priv, transcoder),
- PIPE_DATA_N1(dev_priv, transcoder),
- PIPE_LINK_M1(dev_priv, transcoder),
- PIPE_LINK_N1(dev_priv, transcoder));
+ if (DISPLAY_VER(display) >= 5)
+ intel_get_m_n(display, m_n,
+ PIPE_DATA_M1(display, transcoder),
+ PIPE_DATA_N1(display, transcoder),
+ PIPE_LINK_M1(display, transcoder),
+ PIPE_LINK_N1(display, transcoder));
else
- intel_get_m_n(dev_priv, m_n,
+ intel_get_m_n(display, m_n,
PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe),
PIPE_LINK_M_G4X(pipe), PIPE_LINK_N_G4X(pipe));
}
@@ -3439,16 +3439,16 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,
enum transcoder transcoder,
struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
- if (!intel_cpu_transcoder_has_m2_n2(dev_priv, transcoder))
+ if (!intel_cpu_transcoder_has_m2_n2(display, transcoder))
return;
- intel_get_m_n(dev_priv, m_n,
- PIPE_DATA_M2(dev_priv, transcoder),
- PIPE_DATA_N2(dev_priv, transcoder),
- PIPE_LINK_M2(dev_priv, transcoder),
- PIPE_LINK_N2(dev_priv, transcoder));
+ intel_get_m_n(display, m_n,
+ PIPE_DATA_M2(display, transcoder),
+ PIPE_DATA_N2(display, transcoder),
+ PIPE_LINK_M2(display, transcoder),
+ PIPE_LINK_N2(display, transcoder));
}
static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 91f01e81a8f0..f8b8610b0280 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -481,15 +481,15 @@ int ilk_get_lanes_required(int target_clock, int link_bw, int bpp);
bool intel_fuzzy_clock_check(int clock1, int clock2);
void intel_zero_m_n(struct intel_link_m_n *m_n);
-void intel_set_m_n(struct drm_i915_private *i915,
+void intel_set_m_n(struct intel_display *display,
const struct intel_link_m_n *m_n,
i915_reg_t data_m_reg, i915_reg_t data_n_reg,
i915_reg_t link_m_reg, i915_reg_t link_n_reg);
-void intel_get_m_n(struct drm_i915_private *i915,
+void intel_get_m_n(struct intel_display *display,
struct intel_link_m_n *m_n,
i915_reg_t data_m_reg, i915_reg_t data_n_reg,
i915_reg_t link_m_reg, i915_reg_t link_n_reg);
-bool intel_cpu_transcoder_has_m2_n2(struct drm_i915_private *dev_priv,
+bool intel_cpu_transcoder_has_m2_n2(struct intel_display *display,
enum transcoder transcoder);
void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc,
enum transcoder cpu_transcoder,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index bf96433d63c3..d0fa98628a73 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2943,7 +2943,6 @@ intel_dp_drrs_compute_config(struct intel_connector *connector,
int link_bpp_x16)
{
struct intel_display *display = to_intel_display(connector);
- struct drm_i915_private *i915 = to_i915(connector->base.dev);
const struct drm_display_mode *downclock_mode =
intel_panel_downclock_mode(connector, &pipe_config->hw.adjusted_mode);
int pixel_clock;
@@ -2956,7 +2955,7 @@ intel_dp_drrs_compute_config(struct intel_connector *connector,
pipe_config->update_m_n = true;
if (!can_enable_drrs(connector, pipe_config, downclock_mode)) {
- if (intel_cpu_transcoder_has_m2_n2(i915, pipe_config->cpu_transcoder))
+ if (intel_cpu_transcoder_has_m2_n2(display, pipe_config->cpu_transcoder))
intel_zero_m_n(&pipe_config->dp_m2_n2);
return;
}
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index bf420400b505..05cd0f6e6d71 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -68,12 +68,10 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
bool intel_cpu_transcoder_has_drrs(struct intel_display *display,
enum transcoder cpu_transcoder)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
if (HAS_DOUBLE_BUFFERED_M_N(display))
return true;
- return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
+ return intel_cpu_transcoder_has_m2_n2(display, cpu_transcoder);
}
static void
@@ -110,12 +108,12 @@ bool intel_drrs_is_active(struct intel_crtc *crtc)
static void intel_drrs_set_state(struct intel_crtc *crtc,
enum drrs_refresh_rate refresh_rate)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
if (refresh_rate == crtc->drrs.refresh_rate)
return;
- if (intel_cpu_transcoder_has_m2_n2(dev_priv, crtc->drrs.cpu_transcoder))
+ if (intel_cpu_transcoder_has_m2_n2(display, crtc->drrs.cpu_transcoder))
intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate);
else
intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 1abe0a784570..806729ec73c8 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -181,10 +181,10 @@ static void ibx_sanitize_pch_ports(struct drm_i915_private *dev_priv)
static void intel_pch_transcoder_set_m1_n1(struct intel_crtc *crtc,
const struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
- intel_set_m_n(dev_priv, m_n,
+ intel_set_m_n(display, m_n,
PCH_TRANS_DATA_M1(pipe), PCH_TRANS_DATA_N1(pipe),
PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));
}
@@ -192,10 +192,10 @@ static void intel_pch_transcoder_set_m1_n1(struct intel_crtc *crtc,
static void intel_pch_transcoder_set_m2_n2(struct intel_crtc *crtc,
const struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
- intel_set_m_n(dev_priv, m_n,
+ intel_set_m_n(display, m_n,
PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe),
PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe));
}
@@ -203,10 +203,10 @@ static void intel_pch_transcoder_set_m2_n2(struct intel_crtc *crtc,
void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc,
struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
- intel_get_m_n(dev_priv, m_n,
+ intel_get_m_n(display, m_n,
PCH_TRANS_DATA_M1(pipe), PCH_TRANS_DATA_N1(pipe),
PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));
}
@@ -214,10 +214,10 @@ void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc,
void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc,
struct intel_link_m_n *m_n)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
- intel_get_m_n(dev_priv, m_n,
+ intel_get_m_n(display, m_n,
PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe),
PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe));
}
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 08/12] drm/i915/dpt: convert intel_dpt.[ch] interfaces to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (6 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 07/12] drm/i915/display: convert the M/N functions " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 09/12] drm/i915/fbc: convert intel_fbc.[ch] " Jani Nikula
` (8 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the intel_dpt.[ch] interfaces to struct intel_display,
though the file being very i915 specific, it's hard to convert the
implementation.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dpt.c | 24 ++++++++++++------------
drivers/gpu/drm/i915/display/intel_dpt.h | 7 +++----
drivers/gpu/drm/i915/i915_driver.c | 4 ++--
3 files changed, 17 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
index 8b1f0e92a11c..fca7294b1def 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.c
+++ b/drivers/gpu/drm/i915/display/intel_dpt.c
@@ -183,7 +183,7 @@ void intel_dpt_unpin_from_ggtt(struct i915_address_space *vm)
/**
* intel_dpt_resume - restore the memory mapping for all DPT FBs during system resume
- * @i915: device instance
+ * @display: display device instance
*
* Restore the memory mapping during system resume for all framebuffers which
* are mapped to HW via a GGTT->DPT page table. The content of these page
@@ -193,26 +193,26 @@ void intel_dpt_unpin_from_ggtt(struct i915_address_space *vm)
* This function must be called after the mappings in GGTT have been restored calling
* i915_ggtt_resume().
*/
-void intel_dpt_resume(struct drm_i915_private *i915)
+void intel_dpt_resume(struct intel_display *display)
{
struct drm_framebuffer *drm_fb;
- if (!HAS_DISPLAY(i915))
+ if (!HAS_DISPLAY(display))
return;
- mutex_lock(&i915->drm.mode_config.fb_lock);
- drm_for_each_fb(drm_fb, &i915->drm) {
+ mutex_lock(&display->drm->mode_config.fb_lock);
+ drm_for_each_fb(drm_fb, display->drm) {
struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
if (fb->dpt_vm)
i915_ggtt_resume_vm(fb->dpt_vm, true);
}
- mutex_unlock(&i915->drm.mode_config.fb_lock);
+ mutex_unlock(&display->drm->mode_config.fb_lock);
}
/**
* intel_dpt_suspend - suspend the memory mapping for all DPT FBs during system suspend
- * @i915: device instance
+ * @display: display device instance
*
* Suspend the memory mapping during system suspend for all framebuffers which
* are mapped to HW via a GGTT->DPT page table.
@@ -220,23 +220,23 @@ void intel_dpt_resume(struct drm_i915_private *i915)
* This function must be called before the mappings in GGTT are suspended calling
* i915_ggtt_suspend().
*/
-void intel_dpt_suspend(struct drm_i915_private *i915)
+void intel_dpt_suspend(struct intel_display *display)
{
struct drm_framebuffer *drm_fb;
- if (!HAS_DISPLAY(i915))
+ if (!HAS_DISPLAY(display))
return;
- mutex_lock(&i915->drm.mode_config.fb_lock);
+ mutex_lock(&display->drm->mode_config.fb_lock);
- drm_for_each_fb(drm_fb, &i915->drm) {
+ drm_for_each_fb(drm_fb, display->drm) {
struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
if (fb->dpt_vm)
i915_ggtt_suspend_vm(fb->dpt_vm, true);
}
- mutex_unlock(&i915->drm.mode_config.fb_lock);
+ mutex_unlock(&display->drm->mode_config.fb_lock);
}
struct i915_address_space *
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.h b/drivers/gpu/drm/i915/display/intel_dpt.h
index 1f88b0ee17e7..db521401b828 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.h
+++ b/drivers/gpu/drm/i915/display/intel_dpt.h
@@ -8,18 +8,17 @@
#include <linux/types.h>
-struct drm_i915_private;
-
struct i915_address_space;
struct i915_vma;
+struct intel_display;
struct intel_framebuffer;
void intel_dpt_destroy(struct i915_address_space *vm);
struct i915_vma *intel_dpt_pin_to_ggtt(struct i915_address_space *vm,
unsigned int alignment);
void intel_dpt_unpin_from_ggtt(struct i915_address_space *vm);
-void intel_dpt_suspend(struct drm_i915_private *i915);
-void intel_dpt_resume(struct drm_i915_private *i915);
+void intel_dpt_suspend(struct intel_display *display);
+void intel_dpt_resume(struct intel_display *display);
struct i915_address_space *
intel_dpt_create(struct intel_framebuffer *fb);
u64 intel_dpt_offset(struct i915_vma *dpt_vma);
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 1dfd6269b355..613084fd0097 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1070,7 +1070,7 @@ static int i915_drm_suspend(struct drm_device *dev)
intel_encoder_suspend_all(&dev_priv->display);
/* Must be called before GGTT is suspended. */
- intel_dpt_suspend(dev_priv);
+ intel_dpt_suspend(display);
i915_ggtt_suspend(to_gt(dev_priv)->ggtt);
i9xx_display_sr_save(display);
@@ -1187,7 +1187,7 @@ static int i915_drm_resume(struct drm_device *dev)
setup_private_pat(gt);
/* Must be called after GGTT is resumed. */
- intel_dpt_resume(dev_priv);
+ intel_dpt_resume(display);
intel_dmc_resume(display);
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 09/12] drm/i915/fbc: convert intel_fbc.[ch] to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (7 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 08/12] drm/i915/dpt: convert intel_dpt.[ch] interfaces " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 10/12] drm/i915/rps: convert intel_display_rps.[ch] " Jani Nikula
` (7 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_fbc.[ch] to struct
intel_display. In a few places, change the variable declaration order to
prefer having display first.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_fbc.c | 113 +++++++-----------
drivers/gpu/drm/i915/display/intel_fbc.h | 6 +-
.../gpu/drm/i915/display/intel_frontbuffer.c | 5 +-
3 files changed, 51 insertions(+), 73 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index df05904bac8a..33142427f121 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -215,11 +215,9 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
*/
static unsigned int intel_fbc_max_cfb_height(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
if (DISPLAY_VER(display) >= 8)
return 2560;
- else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
+ else if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
return 2048;
else
return 1536;
@@ -269,9 +267,8 @@ static bool intel_fbc_has_fences(struct intel_display *display)
static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
- struct drm_i915_private *i915 = to_i915(display->drm);
+ const struct intel_fbc_state *fbc_state = &fbc->state;
unsigned int cfb_stride;
u32 fbc_ctl;
@@ -287,7 +284,7 @@ static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
FBC_CTL_INTERVAL(fbc_state->interval) |
FBC_CTL_STRIDE(cfb_stride);
- if (IS_I945GM(i915))
+ if (display->platform.i945gm)
fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */
if (fbc_state->fence_id >= 0)
@@ -333,8 +330,8 @@ static void i8xx_fbc_deactivate(struct intel_fbc *fbc)
static void i8xx_fbc_activate(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
+ const struct intel_fbc_state *fbc_state = &fbc->state;
int i;
/* Clear old tags */
@@ -365,12 +362,12 @@ static bool i8xx_fbc_is_compressing(struct intel_fbc *fbc)
static void i8xx_fbc_nuke(struct intel_fbc *fbc)
{
+ struct intel_display *display = fbc->display;
struct intel_fbc_state *fbc_state = &fbc->state;
enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
- struct drm_i915_private *dev_priv = to_i915(fbc->display->drm);
- intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane),
- intel_de_read_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane)));
+ intel_de_write_fw(display, DSPADDR(display, i9xx_plane),
+ intel_de_read_fw(display, DSPADDR(display, i9xx_plane)));
}
static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
@@ -386,9 +383,9 @@ static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
range_overflows_end_t(u64, i915_gem_stolen_area_address(i915),
i915_gem_stolen_node_offset(&fbc->compressed_llb),
U32_MAX));
- intel_de_write(i915, FBC_CFB_BASE,
+ intel_de_write(display, FBC_CFB_BASE,
i915_gem_stolen_node_address(i915, &fbc->compressed_fb));
- intel_de_write(i915, FBC_LL_BASE,
+ intel_de_write(display, FBC_LL_BASE,
i915_gem_stolen_node_address(i915, &fbc->compressed_llb));
}
@@ -403,12 +400,12 @@ static const struct intel_fbc_funcs i8xx_fbc_funcs = {
static void i965_fbc_nuke(struct intel_fbc *fbc)
{
+ struct intel_display *display = fbc->display;
struct intel_fbc_state *fbc_state = &fbc->state;
enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
- struct drm_i915_private *dev_priv = to_i915(fbc->display->drm);
- intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane),
- intel_de_read_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane)));
+ intel_de_write_fw(display, DSPSURF(display, i9xx_plane),
+ intel_de_read_fw(display, DSPSURF(display, i9xx_plane)));
}
static const struct intel_fbc_funcs i965_fbc_funcs = {
@@ -437,15 +434,14 @@ static u32 g4x_dpfc_ctl_limit(struct intel_fbc *fbc)
static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
- struct drm_i915_private *i915 = to_i915(display->drm);
+ const struct intel_fbc_state *fbc_state = &fbc->state;
u32 dpfc_ctl;
dpfc_ctl = g4x_dpfc_ctl_limit(fbc) |
DPFC_CTL_PLANE_G4X(fbc_state->plane->i9xx_plane);
- if (IS_G4X(i915))
+ if (display->platform.g4x)
dpfc_ctl |= DPFC_CTL_SR_EN;
if (fbc_state->fence_id >= 0) {
@@ -460,8 +456,8 @@ static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
static void g4x_fbc_activate(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
+ const struct intel_fbc_state *fbc_state = &fbc->state;
intel_de_write(display, DPFC_FENCE_YOFF,
fbc_state->fence_y_offset);
@@ -512,8 +508,8 @@ static const struct intel_fbc_funcs g4x_fbc_funcs = {
static void ilk_fbc_activate(struct intel_fbc *fbc)
{
- struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
+ struct intel_fbc_state *fbc_state = &fbc->state;
intel_de_write(display, ILK_DPFC_FENCE_YOFF(fbc->id),
fbc_state->fence_y_offset);
@@ -564,8 +560,8 @@ static const struct intel_fbc_funcs ilk_fbc_funcs = {
static void snb_fbc_program_fence(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
+ const struct intel_fbc_state *fbc_state = &fbc->state;
u32 ctl = 0;
if (fbc_state->fence_id >= 0)
@@ -601,8 +597,8 @@ static const struct intel_fbc_funcs snb_fbc_funcs = {
static void glk_fbc_program_cfb_stride(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
+ const struct intel_fbc_state *fbc_state = &fbc->state;
u32 val = 0;
if (fbc_state->override_cfb_stride)
@@ -614,8 +610,8 @@ static void glk_fbc_program_cfb_stride(struct intel_fbc *fbc)
static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
+ const struct intel_fbc_state *fbc_state = &fbc->state;
u32 val = 0;
/* Display WA #0529: skl, kbl, bxt. */
@@ -630,14 +626,13 @@ static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
{
- const struct intel_fbc_state *fbc_state = &fbc->state;
struct intel_display *display = fbc->display;
- struct drm_i915_private *i915 = to_i915(display->drm);
+ const struct intel_fbc_state *fbc_state = &fbc->state;
u32 dpfc_ctl;
dpfc_ctl = g4x_dpfc_ctl_limit(fbc);
- if (IS_IVYBRIDGE(i915))
+ if (display->platform.ivybridge)
dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);
if (DISPLAY_VER(display) >= 20)
@@ -759,9 +754,7 @@ static void intel_fbc_deactivate(struct intel_fbc *fbc, const char *reason)
static u64 intel_fbc_cfb_base_max(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
- if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
+ if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
return BIT_ULL(28);
else
return BIT_ULL(32);
@@ -776,8 +769,8 @@ static u64 intel_fbc_stolen_end(struct intel_display *display)
* reserved range size, so it always assumes the maximum (8mb) is used.
* If we enable FBC using a CFB on that memory range we'll get FIFO
* underruns, even if that range is not reserved by the BIOS. */
- if (IS_BROADWELL(i915) ||
- (DISPLAY_VER(display) == 9 && !IS_BROXTON(i915)))
+ if (display->platform.broadwell ||
+ (DISPLAY_VER(display) == 9 && !display->platform.broxton))
end = i915_gem_stolen_area_size(i915) - 8 * 1024 * 1024;
else
end = U64_MAX;
@@ -792,10 +785,8 @@ static int intel_fbc_min_limit(const struct intel_plane_state *plane_state)
static int intel_fbc_max_limit(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
/* WaFbcOnly1to1Ratio:ctg */
- if (IS_G4X(i915))
+ if (display->platform.g4x)
return 1;
/*
@@ -843,7 +834,7 @@ static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
drm_WARN_ON(display->drm,
i915_gem_stolen_node_allocated(&fbc->compressed_llb));
- if (DISPLAY_VER(display) < 5 && !IS_G4X(i915)) {
+ if (DISPLAY_VER(display) < 5 && !display->platform.g4x) {
ret = i915_gem_stolen_insert_node(i915, &fbc->compressed_llb,
4096, 4096);
if (ret)
@@ -882,9 +873,8 @@ static void intel_fbc_program_cfb(struct intel_fbc *fbc)
static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
{
struct intel_display *display = fbc->display;
- struct drm_i915_private *i915 = to_i915(display->drm);
- if (IS_SKYLAKE(i915) || IS_BROXTON(i915)) {
+ if (display->platform.skylake || display->platform.broxton) {
/*
* WaFbcHighMemBwCorruptionAvoidance:skl,bxt
* Display WA #0883: skl,bxt
@@ -893,8 +883,8 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
0, DPFC_DISABLE_DUMMY0);
}
- if (IS_SKYLAKE(i915) || IS_KABYLAKE(i915) ||
- IS_COFFEELAKE(i915) || IS_COMETLAKE(i915)) {
+ if (display->platform.skylake || display->platform.kabylake ||
+ display->platform.coffeelake || display->platform.cometlake) {
/*
* WaFbcNukeOnHostModify:skl,kbl,cfl
* Display WA #0873: skl,kbl,cfl
@@ -909,7 +899,7 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
0, DPFC_CHICKEN_COMP_DUMMY_PIXEL);
/* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp,mtl */
- if (DISPLAY_VER(display) >= 11 && !IS_DG2(i915))
+ if (DISPLAY_VER(display) >= 11 && !display->platform.dg2)
intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
}
@@ -986,13 +976,12 @@ static bool icl_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
static bool stride_is_valid(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
- struct drm_i915_private *i915 = to_i915(display->drm);
if (DISPLAY_VER(display) >= 11)
return icl_fbc_stride_is_valid(plane_state);
else if (DISPLAY_VER(display) >= 9)
return skl_fbc_stride_is_valid(plane_state);
- else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
+ else if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
return g4x_fbc_stride_is_valid(plane_state);
else if (DISPLAY_VER(display) == 4)
return i965_fbc_stride_is_valid(plane_state);
@@ -1023,7 +1012,6 @@ static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane
static bool g4x_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
- struct drm_i915_private *i915 = to_i915(display->drm);
const struct drm_framebuffer *fb = plane_state->hw.fb;
switch (fb->format->format) {
@@ -1032,7 +1020,7 @@ static bool g4x_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_
return true;
case DRM_FORMAT_RGB565:
/* WaFbcOnly1to1Ratio:ctg */
- if (IS_G4X(i915))
+ if (display->platform.g4x)
return false;
return true;
default:
@@ -1059,11 +1047,10 @@ static bool lnl_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_
static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
- struct drm_i915_private *i915 = to_i915(display->drm);
if (DISPLAY_VER(display) >= 20)
return lnl_fbc_pixel_format_is_valid(plane_state);
- else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
+ else if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
return g4x_fbc_pixel_format_is_valid(plane_state);
else
return i8xx_fbc_pixel_format_is_valid(plane_state);
@@ -1094,11 +1081,10 @@ static bool skl_fbc_rotation_is_valid(const struct intel_plane_state *plane_stat
static bool rotation_is_valid(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
- struct drm_i915_private *i915 = to_i915(display->drm);
if (DISPLAY_VER(display) >= 9)
return skl_fbc_rotation_is_valid(plane_state);
- else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
+ else if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
return g4x_fbc_rotation_is_valid(plane_state);
else
return i8xx_fbc_rotation_is_valid(plane_state);
@@ -1107,8 +1093,6 @@ static bool rotation_is_valid(const struct intel_plane_state *plane_state)
static void intel_fbc_max_surface_size(struct intel_display *display,
unsigned int *w, unsigned int *h)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
if (DISPLAY_VER(display) >= 11) {
*w = 8192;
*h = 4096;
@@ -1118,7 +1102,7 @@ static void intel_fbc_max_surface_size(struct intel_display *display,
} else if (DISPLAY_VER(display) >= 7) {
*w = 4096;
*h = 4096;
- } else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
+ } else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) {
*w = 4096;
*h = 2048;
} else {
@@ -1151,15 +1135,13 @@ static bool intel_fbc_surface_size_ok(const struct intel_plane_state *plane_stat
static void intel_fbc_max_plane_size(struct intel_display *display,
unsigned int *w, unsigned int *h)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
if (DISPLAY_VER(display) >= 10) {
*w = 5120;
*h = 4096;
- } else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
+ } else if (DISPLAY_VER(display) >= 8 || display->platform.haswell) {
*w = 4096;
*h = 4096;
- } else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
+ } else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) {
*w = 4096;
*h = 2048;
} else {
@@ -1317,7 +1299,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
}
/* WaFbcTurnOffFbcWhenHyperVisorIsUsed:skl,bxt */
- if (i915_vtd_active(i915) && (IS_SKYLAKE(i915) || IS_BROXTON(i915))) {
+ if (i915_vtd_active(i915) && (display->platform.skylake || display->platform.broxton)) {
plane_state->no_fbc_reason = "VT-d enabled";
return 0;
}
@@ -1347,7 +1329,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
/* Wa_14016291713 */
if ((IS_DISPLAY_VER(display, 12, 13) ||
- IS_DISPLAY_VERx100_STEP(i915, 1400, STEP_A0, STEP_C0)) &&
+ IS_DISPLAY_VERx100_STEP(display, 1400, STEP_A0, STEP_C0)) &&
crtc_state->has_psr && !crtc_state->has_panel_replay) {
plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
return 0;
@@ -1410,7 +1392,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
}
/* WaFbcExceedCdClockThreshold:hsw,bdw */
- if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
+ if (display->platform.haswell || display->platform.broadwell) {
const struct intel_cdclk_state *cdclk_state;
cdclk_state = intel_atomic_get_cdclk_state(state);
@@ -1614,14 +1596,14 @@ static void __intel_fbc_invalidate(struct intel_fbc *fbc,
mutex_unlock(&fbc->lock);
}
-void intel_fbc_invalidate(struct drm_i915_private *i915,
+void intel_fbc_invalidate(struct intel_display *display,
unsigned int frontbuffer_bits,
enum fb_op_origin origin)
{
struct intel_fbc *fbc;
enum intel_fbc_id fbc_id;
- for_each_intel_fbc(&i915->display, fbc, fbc_id)
+ for_each_intel_fbc(display, fbc, fbc_id)
__intel_fbc_invalidate(fbc, frontbuffer_bits, origin);
}
@@ -1653,14 +1635,14 @@ static void __intel_fbc_flush(struct intel_fbc *fbc,
mutex_unlock(&fbc->lock);
}
-void intel_fbc_flush(struct drm_i915_private *i915,
+void intel_fbc_flush(struct intel_display *display,
unsigned int frontbuffer_bits,
enum fb_op_origin origin)
{
struct intel_fbc *fbc;
enum intel_fbc_id fbc_id;
- for_each_intel_fbc(&i915->display, fbc, fbc_id)
+ for_each_intel_fbc(display, fbc, fbc_id)
__intel_fbc_flush(fbc, frontbuffer_bits, origin);
}
@@ -1897,15 +1879,13 @@ void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display)
*/
static int intel_sanitize_fbc_option(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
if (display->params.enable_fbc >= 0)
return !!display->params.enable_fbc;
if (!HAS_FBC(display))
return 0;
- if (IS_BROADWELL(i915) || DISPLAY_VER(display) >= 9)
+ if (display->platform.broadwell || DISPLAY_VER(display) >= 9)
return 1;
return 0;
@@ -1919,7 +1899,6 @@ void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)
static struct intel_fbc *intel_fbc_create(struct intel_display *display,
enum intel_fbc_id fbc_id)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct intel_fbc *fbc;
fbc = kzalloc(sizeof(*fbc), GFP_KERNEL);
@@ -1937,7 +1916,7 @@ static struct intel_fbc *intel_fbc_create(struct intel_display *display,
fbc->funcs = &snb_fbc_funcs;
else if (DISPLAY_VER(display) == 5)
fbc->funcs = &ilk_fbc_funcs;
- else if (IS_G4X(i915))
+ else if (display->platform.g4x)
fbc->funcs = &g4x_fbc_funcs;
else if (DISPLAY_VER(display) == 4)
fbc->funcs = &i965_fbc_funcs;
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index ceae55458e14..df20e63d6102 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -9,11 +9,11 @@
#include <linux/types.h>
enum fb_op_origin;
-struct drm_i915_private;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
struct intel_display;
+struct intel_display;
struct intel_fbc;
struct intel_plane;
struct intel_plane_state;
@@ -38,10 +38,10 @@ void intel_fbc_sanitize(struct intel_display *display);
void intel_fbc_update(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_fbc_disable(struct intel_crtc *crtc);
-void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
+void intel_fbc_invalidate(struct intel_display *display,
unsigned int frontbuffer_bits,
enum fb_op_origin origin);
-void intel_fbc_flush(struct drm_i915_private *dev_priv,
+void intel_fbc_flush(struct intel_display *display,
unsigned int frontbuffer_bits, enum fb_op_origin origin);
void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
index 89a145b3194c..f023f5a4dba6 100644
--- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
+++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
@@ -101,7 +101,7 @@ static void frontbuffer_flush(struct drm_i915_private *i915,
intel_td_flush(display);
intel_drrs_flush(display, frontbuffer_bits);
intel_psr_flush(display, frontbuffer_bits, origin);
- intel_fbc_flush(i915, frontbuffer_bits, origin);
+ intel_fbc_flush(display, frontbuffer_bits, origin);
}
/**
@@ -176,7 +176,6 @@ void __intel_fb_invalidate(struct intel_frontbuffer *front,
unsigned int frontbuffer_bits)
{
struct intel_display *display = to_intel_display(front->obj->dev);
- struct drm_i915_private *i915 = to_i915(display->drm);
if (origin == ORIGIN_CS) {
spin_lock(&display->fb_tracking.lock);
@@ -190,7 +189,7 @@ void __intel_fb_invalidate(struct intel_frontbuffer *front,
might_sleep();
intel_psr_invalidate(display, frontbuffer_bits, origin);
intel_drrs_invalidate(display, frontbuffer_bits);
- intel_fbc_invalidate(i915, frontbuffer_bits, origin);
+ intel_fbc_invalidate(display, frontbuffer_bits, origin);
}
void __intel_fb_flush(struct intel_frontbuffer *front,
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 10/12] drm/i915/rps: convert intel_display_rps.[ch] to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (8 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 09/12] drm/i915/fbc: convert intel_fbc.[ch] " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 11/12] drm/i915/ddi: convert intel_wait_ddi_buf_idle() " Jani Nikula
` (6 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_display_rps.[ch] to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_display_rps.c | 4 +++-
drivers/gpu/drm/i915/display/intel_display_rps.h | 4 ++--
drivers/gpu/drm/xe/display/xe_display_rps.c | 2 +-
4 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 124cd9ddba0b..05dcfa3bea73 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -1119,11 +1119,11 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
{
struct i915_sched_attr attr = { .priority = I915_PRIORITY_DISPLAY };
struct intel_plane *plane = to_intel_plane(_plane);
+ struct intel_display *display = to_intel_display(plane);
struct intel_plane_state *new_plane_state =
to_intel_plane_state(_new_plane_state);
struct intel_atomic_state *state =
to_intel_atomic_state(new_plane_state->uapi.state);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
struct intel_plane_state *old_plane_state =
intel_atomic_get_old_plane_state(state, plane);
struct drm_gem_object *obj = intel_fb_bo(new_plane_state->hw.fb);
@@ -1181,7 +1181,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
* that are not quite steady state without resorting to forcing
* maximum clocks following a vblank miss (see do_rps_boost()).
*/
- intel_display_rps_mark_interactive(dev_priv, state, true);
+ intel_display_rps_mark_interactive(display, state, true);
return 0;
@@ -1202,17 +1202,17 @@ static void
intel_cleanup_plane_fb(struct drm_plane *plane,
struct drm_plane_state *_old_plane_state)
{
+ struct intel_display *display = to_intel_display(plane->dev);
struct intel_plane_state *old_plane_state =
to_intel_plane_state(_old_plane_state);
struct intel_atomic_state *state =
to_intel_atomic_state(old_plane_state->uapi.state);
- struct drm_i915_private *dev_priv = to_i915(plane->dev);
struct drm_gem_object *obj = intel_fb_bo(old_plane_state->hw.fb);
if (!obj)
return;
- intel_display_rps_mark_interactive(dev_priv, state, false);
+ intel_display_rps_mark_interactive(display, state, false);
intel_plane_unpin_fb(old_plane_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c
index 918d0327169a..4074a1879828 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.c
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.c
@@ -69,10 +69,12 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait);
}
-void intel_display_rps_mark_interactive(struct drm_i915_private *i915,
+void intel_display_rps_mark_interactive(struct intel_display *display,
struct intel_atomic_state *state,
bool interactive)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
if (state->rps_interactive == interactive)
return;
diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.h b/drivers/gpu/drm/i915/display/intel_display_rps.h
index e19009c2371a..556891edb2dd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_rps.h
+++ b/drivers/gpu/drm/i915/display/intel_display_rps.h
@@ -10,12 +10,12 @@
struct dma_fence;
struct drm_crtc;
-struct drm_i915_private;
struct intel_atomic_state;
+struct intel_display;
void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
struct dma_fence *fence);
-void intel_display_rps_mark_interactive(struct drm_i915_private *i915,
+void intel_display_rps_mark_interactive(struct intel_display *display,
struct intel_atomic_state *state,
bool interactive);
diff --git a/drivers/gpu/drm/xe/display/xe_display_rps.c b/drivers/gpu/drm/xe/display/xe_display_rps.c
index ab21c581c192..fa616f9688a5 100644
--- a/drivers/gpu/drm/xe/display/xe_display_rps.c
+++ b/drivers/gpu/drm/xe/display/xe_display_rps.c
@@ -10,7 +10,7 @@ void intel_display_rps_boost_after_vblank(struct drm_crtc *crtc,
{
}
-void intel_display_rps_mark_interactive(struct drm_i915_private *i915,
+void intel_display_rps_mark_interactive(struct intel_display *display,
struct intel_atomic_state *state,
bool interactive)
{
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 11/12] drm/i915/ddi: convert intel_wait_ddi_buf_idle() to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (9 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 10/12] drm/i915/rps: convert intel_display_rps.[ch] " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-25 16:49 ` [PATCH 12/12] drm/i915/fdi: convert intel_fdi.[ch] " Jani Nikula
` (5 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Convert the intel_ddi.[ch] interfaces to struct intel_display. Postpone
further conversion to avoid conflicts.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++------
drivers/gpu/drm/i915/display/intel_ddi.h | 4 +---
drivers/gpu/drm/i915/display/intel_fdi.c | 6 ++++--
3 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5b13f8e02fa9..581ef134799d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -187,11 +187,8 @@ static i915_reg_t intel_ddi_buf_status_reg(struct intel_display *display, enum p
return DDI_BUF_CTL(port);
}
-void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
- enum port port)
+void intel_wait_ddi_buf_idle(struct intel_display *display, enum port port)
{
- struct intel_display *display = &dev_priv->display;
-
/*
* Bspec's platform specific timeouts:
* MTL+ : 100 us
@@ -3096,7 +3093,7 @@ static void intel_ddi_buf_disable(struct intel_encoder *encoder,
intel_de_rmw(dev_priv, DDI_BUF_CTL(port), DDI_BUF_CTL_ENABLE, 0);
if (DISPLAY_VER(display) >= 14)
- intel_wait_ddi_buf_idle(dev_priv, port);
+ intel_wait_ddi_buf_idle(display, port);
mtl_ddi_disable_d2d(encoder);
@@ -3108,7 +3105,7 @@ static void intel_ddi_buf_disable(struct intel_encoder *encoder,
intel_ddi_disable_fec(encoder, crtc_state);
if (DISPLAY_VER(display) < 14)
- intel_wait_ddi_buf_idle(dev_priv, port);
+ intel_wait_ddi_buf_idle(display, port);
intel_ddi_wait_for_fec_status(encoder, crtc_state, false);
}
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 2faadd1441e2..353eb04079e9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -9,7 +9,6 @@
#include "i915_reg_defs.h"
struct drm_connector_state;
-struct drm_i915_private;
struct intel_atomic_state;
struct intel_bios_encoder_data;
struct intel_connector;
@@ -54,8 +53,7 @@ void hsw_ddi_get_config(struct intel_encoder *encoder,
struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
-void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
- enum port port);
+void intel_wait_ddi_buf_idle(struct intel_display *display, enum port port);
void intel_ddi_init(struct intel_display *display,
const struct intel_bios_encoder_data *devdata);
bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 024d0c7e0a88..7e67b3881fd0 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -886,6 +886,7 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
void hsw_fdi_link_train(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 temp, i, rx_ctl_val;
@@ -992,7 +993,7 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
intel_de_rmw(dev_priv, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0);
intel_de_posting_read(dev_priv, DP_TP_CTL(PORT_E));
- intel_wait_ddi_buf_idle(dev_priv, PORT_E);
+ intel_wait_ddi_buf_idle(display, PORT_E);
/* Reset FDI_RX_MISC pwrdn lanes */
intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),
@@ -1011,6 +1012,7 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
void hsw_fdi_disable(struct intel_encoder *encoder)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
/*
@@ -1021,7 +1023,7 @@ void hsw_fdi_disable(struct intel_encoder *encoder)
*/
intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_RX_ENABLE, 0);
intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);
- intel_wait_ddi_buf_idle(dev_priv, PORT_E);
+ intel_wait_ddi_buf_idle(display, PORT_E);
intel_ddi_disable_clock(encoder);
intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),
FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK,
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 12/12] drm/i915/fdi: convert intel_fdi.[ch] to struct intel_display
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (10 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 11/12] drm/i915/ddi: convert intel_wait_ddi_buf_idle() " Jani Nikula
@ 2025-02-25 16:49 ` Jani Nikula
2025-02-26 9:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: struct intel_display conversions, part 2434235 Patchwork
` (4 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-25 16:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_fdi.[ch] to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
.../drm/i915/display/intel_display_driver.c | 4 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 458 +++++++++---------
drivers/gpu/drm/i915/display/intel_fdi.h | 16 +-
.../drm/i915/display/intel_modeset_verify.c | 3 +-
.../gpu/drm/i915/display/intel_pch_display.c | 19 +-
6 files changed, 247 insertions(+), 257 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 49a67d629c07..217ef2240be8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1568,8 +1568,8 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,
if (new_crtc_state->has_pch_encoder) {
ilk_pch_pre_enable(state, crtc);
} else {
- assert_fdi_tx_disabled(dev_priv, pipe);
- assert_fdi_rx_disabled(dev_priv, pipe);
+ assert_fdi_tx_disabled(display, pipe);
+ assert_fdi_rx_disabled(display, pipe);
}
ilk_pfit_enable(new_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index f22672ed556a..68d0753659e8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -200,7 +200,7 @@ void intel_display_driver_early_probe(struct intel_display *display)
intel_audio_hooks_init(display);
intel_dpll_init_clock_hook(i915);
intel_init_display_hooks(i915);
- intel_fdi_init_hook(i915);
+ intel_fdi_init_hook(display);
intel_dmc_wl_init(display);
}
@@ -449,7 +449,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
intel_plane_possible_crtcs_init(display);
intel_shared_dpll_init(display);
- intel_fdi_pll_freq_update(i915);
+ intel_fdi_pll_freq_update(display);
intel_update_czclk(i915);
intel_display_driver_init_hw(display);
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 7e67b3881fd0..40deee0769ae 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -24,10 +24,9 @@ struct intel_fdi_funcs {
const struct intel_crtc_state *crtc_state);
};
-static void assert_fdi_tx(struct drm_i915_private *dev_priv,
+static void assert_fdi_tx(struct intel_display *display,
enum pipe pipe, bool state)
{
- struct intel_display *display = &dev_priv->display;
bool cur_state;
if (HAS_DDI(display)) {
@@ -48,20 +47,19 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,
str_on_off(state), str_on_off(cur_state));
}
-void assert_fdi_tx_enabled(struct drm_i915_private *i915, enum pipe pipe)
+void assert_fdi_tx_enabled(struct intel_display *display, enum pipe pipe)
{
- assert_fdi_tx(i915, pipe, true);
+ assert_fdi_tx(display, pipe, true);
}
-void assert_fdi_tx_disabled(struct drm_i915_private *i915, enum pipe pipe)
+void assert_fdi_tx_disabled(struct intel_display *display, enum pipe pipe)
{
- assert_fdi_tx(i915, pipe, false);
+ assert_fdi_tx(display, pipe, false);
}
-static void assert_fdi_rx(struct drm_i915_private *dev_priv,
+static void assert_fdi_rx(struct intel_display *display,
enum pipe pipe, bool state)
{
- struct intel_display *display = &dev_priv->display;
bool cur_state;
cur_state = intel_de_read(display, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE;
@@ -70,18 +68,17 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
str_on_off(state), str_on_off(cur_state));
}
-void assert_fdi_rx_enabled(struct drm_i915_private *i915, enum pipe pipe)
+void assert_fdi_rx_enabled(struct intel_display *display, enum pipe pipe)
{
- assert_fdi_rx(i915, pipe, true);
+ assert_fdi_rx(display, pipe, true);
}
-void assert_fdi_rx_disabled(struct drm_i915_private *i915, enum pipe pipe)
+void assert_fdi_rx_disabled(struct intel_display *display, enum pipe pipe)
{
- assert_fdi_rx(i915, pipe, false);
+ assert_fdi_rx(display, pipe, false);
}
-void assert_fdi_tx_pll_enabled(struct intel_display *display,
- enum pipe pipe)
+void assert_fdi_tx_pll_enabled(struct intel_display *display, enum pipe pipe)
{
bool cur_state;
@@ -122,9 +119,9 @@ void assert_fdi_rx_pll_disabled(struct intel_display *display, enum pipe pipe)
void intel_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
- dev_priv->display.funcs.fdi->fdi_link_train(crtc, crtc_state);
+ display->funcs.fdi->fdi_link_train(crtc, crtc_state);
}
/**
@@ -141,12 +138,11 @@ void intel_fdi_link_train(struct intel_crtc *crtc,
int intel_fdi_add_affected_crtcs(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *old_crtc_state;
const struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- if (!IS_IVYBRIDGE(i915) || INTEL_NUM_PIPES(i915) != 3)
+ if (!display->platform.ivybridge || INTEL_NUM_PIPES(display) != 3)
return 0;
crtc = intel_crtc_for_pipe(display, PIPE_C);
@@ -184,31 +180,29 @@ static int pipe_required_fdi_lanes(struct intel_crtc_state *crtc_state)
return 0;
}
-static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
+static int ilk_check_fdi_lanes(struct intel_display *display, enum pipe pipe,
struct intel_crtc_state *pipe_config,
enum pipe *pipe_to_reduce)
{
- struct intel_display *display = to_intel_display(dev);
- struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_atomic_state *state = pipe_config->uapi.state;
struct intel_crtc *other_crtc;
struct intel_crtc_state *other_crtc_state;
*pipe_to_reduce = pipe;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"checking fdi config on pipe %c, lanes %i\n",
pipe_name(pipe), pipe_config->fdi_lanes);
if (pipe_config->fdi_lanes > 4) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"invalid fdi lane config on pipe %c: %i lanes\n",
pipe_name(pipe), pipe_config->fdi_lanes);
return -EINVAL;
}
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
+ if (display->platform.haswell || display->platform.broadwell) {
if (pipe_config->fdi_lanes > 2) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"only 2 lanes on haswell, required: %i lanes\n",
pipe_config->fdi_lanes);
return -EINVAL;
@@ -217,7 +211,7 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
}
}
- if (INTEL_NUM_PIPES(dev_priv) == 2)
+ if (INTEL_NUM_PIPES(display) == 2)
return 0;
/* Ivybridge 3 pipe is really complicated */
@@ -235,7 +229,7 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
return PTR_ERR(other_crtc_state);
if (pipe_required_fdi_lanes(other_crtc_state) > 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"invalid shared fdi lane config on pipe %c: %i lanes\n",
pipe_name(pipe), pipe_config->fdi_lanes);
return -EINVAL;
@@ -243,7 +237,7 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
return 0;
case PIPE_C:
if (pipe_config->fdi_lanes > 2) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"only 2 lanes on pipe %c: required %i lanes\n",
pipe_name(pipe), pipe_config->fdi_lanes);
return -EINVAL;
@@ -256,7 +250,7 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
return PTR_ERR(other_crtc_state);
if (pipe_required_fdi_lanes(other_crtc_state) > 2) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"fdi link B uses too many lanes to enable link C\n");
*pipe_to_reduce = PIPE_B;
@@ -270,29 +264,30 @@ static int ilk_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
}
}
-void intel_fdi_pll_freq_update(struct drm_i915_private *i915)
+void intel_fdi_pll_freq_update(struct intel_display *display)
{
- if (IS_IRONLAKE(i915)) {
- u32 fdi_pll_clk =
- intel_de_read(i915, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
+ if (display->platform.ironlake) {
+ u32 fdi_pll_clk;
+
+ fdi_pll_clk = intel_de_read(display, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK;
- i915->display.fdi.pll_freq = (fdi_pll_clk + 2) * 10000;
- } else if (IS_SANDYBRIDGE(i915) || IS_IVYBRIDGE(i915)) {
- i915->display.fdi.pll_freq = 270000;
+ display->fdi.pll_freq = (fdi_pll_clk + 2) * 10000;
+ } else if (display->platform.sandybridge || display->platform.ivybridge) {
+ display->fdi.pll_freq = 270000;
} else {
return;
}
- drm_dbg(&i915->drm, "FDI PLL freq=%d\n", i915->display.fdi.pll_freq);
+ drm_dbg(display->drm, "FDI PLL freq=%d\n", display->fdi.pll_freq);
}
-int intel_fdi_link_freq(struct drm_i915_private *i915,
+int intel_fdi_link_freq(struct intel_display *display,
const struct intel_crtc_state *pipe_config)
{
- if (HAS_DDI(i915))
+ if (HAS_DDI(display))
return pipe_config->port_clock; /* SPLL */
else
- return i915->display.fdi.pll_freq;
+ return display->fdi.pll_freq;
}
/**
@@ -326,8 +321,7 @@ bool intel_fdi_compute_pipe_bpp(struct intel_crtc_state *crtc_state)
int ilk_fdi_compute_config(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *i915 = to_i915(dev);
+ struct intel_display *display = to_intel_display(crtc);
const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
int lane, link_bw, fdi_dotclock;
@@ -338,7 +332,7 @@ int ilk_fdi_compute_config(struct intel_crtc *crtc,
* Hence the bw of each lane in terms of the mode signal
* is:
*/
- link_bw = intel_fdi_link_freq(i915, pipe_config);
+ link_bw = intel_fdi_link_freq(display, pipe_config);
fdi_dotclock = adjusted_mode->crtc_clock;
@@ -361,11 +355,11 @@ static int intel_fdi_atomic_check_bw(struct intel_atomic_state *state,
struct intel_crtc_state *pipe_config,
struct intel_link_bw_limits *limits)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe_to_reduce;
int ret;
- ret = ilk_check_fdi_lanes(&i915->drm, crtc->pipe, pipe_config,
+ ret = ilk_check_fdi_lanes(display, crtc->pipe, pipe_config,
&pipe_to_reduce);
if (ret != -EINVAL)
return ret;
@@ -418,48 +412,48 @@ int intel_fdi_atomic_check_link(struct intel_atomic_state *state,
return 0;
}
-static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable)
+static void cpt_set_fdi_bc_bifurcation(struct intel_display *display, bool enable)
{
u32 temp;
- temp = intel_de_read(dev_priv, SOUTH_CHICKEN1);
+ temp = intel_de_read(display, SOUTH_CHICKEN1);
if (!!(temp & FDI_BC_BIFURCATION_SELECT) == enable)
return;
- drm_WARN_ON(&dev_priv->drm,
- intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) &
+ drm_WARN_ON(display->drm,
+ intel_de_read(display, FDI_RX_CTL(PIPE_B)) &
FDI_RX_ENABLE);
- drm_WARN_ON(&dev_priv->drm,
- intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) &
+ drm_WARN_ON(display->drm,
+ intel_de_read(display, FDI_RX_CTL(PIPE_C)) &
FDI_RX_ENABLE);
temp &= ~FDI_BC_BIFURCATION_SELECT;
if (enable)
temp |= FDI_BC_BIFURCATION_SELECT;
- drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n",
+ drm_dbg_kms(display->drm, "%sabling fdi C rx\n",
enable ? "en" : "dis");
- intel_de_write(dev_priv, SOUTH_CHICKEN1, temp);
- intel_de_posting_read(dev_priv, SOUTH_CHICKEN1);
+ intel_de_write(display, SOUTH_CHICKEN1, temp);
+ intel_de_posting_read(display, SOUTH_CHICKEN1);
}
static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
switch (crtc->pipe) {
case PIPE_A:
break;
case PIPE_B:
if (crtc_state->fdi_lanes > 2)
- cpt_set_fdi_bc_bifurcation(dev_priv, false);
+ cpt_set_fdi_bc_bifurcation(display, false);
else
- cpt_set_fdi_bc_bifurcation(dev_priv, true);
+ cpt_set_fdi_bc_bifurcation(display, true);
break;
case PIPE_C:
- cpt_set_fdi_bc_bifurcation(dev_priv, true);
+ cpt_set_fdi_bc_bifurcation(display, true);
break;
default:
@@ -469,26 +463,26 @@ static void ivb_update_fdi_bc_bifurcation(const struct intel_crtc_state *crtc_st
void intel_fdi_normal_train(struct intel_crtc *crtc)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(crtc);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
enum pipe pipe = crtc->pipe;
i915_reg_t reg;
u32 temp;
/* enable normal train */
reg = FDI_TX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
- if (IS_IVYBRIDGE(dev_priv)) {
+ temp = intel_de_read(display, reg);
+ if (display->platform.ivybridge) {
temp &= ~FDI_LINK_TRAIN_NONE_IVB;
temp |= FDI_LINK_TRAIN_NONE_IVB | FDI_TX_ENHANCE_FRAME_ENABLE;
} else {
temp &= ~FDI_LINK_TRAIN_NONE;
temp |= FDI_LINK_TRAIN_NONE | FDI_TX_ENHANCE_FRAME_ENABLE;
}
- intel_de_write(dev_priv, reg, temp);
+ intel_de_write(display, reg, temp);
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
if (HAS_PCH_CPT(dev_priv)) {
temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
temp |= FDI_LINK_TRAIN_NORMAL_CPT;
@@ -496,15 +490,15 @@ void intel_fdi_normal_train(struct intel_crtc *crtc)
temp &= ~FDI_LINK_TRAIN_NONE;
temp |= FDI_LINK_TRAIN_NONE;
}
- intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE);
+ intel_de_write(display, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE);
/* wait one idle pattern time */
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(1000);
/* IVB wants error correction enabled */
- if (IS_IVYBRIDGE(dev_priv))
- intel_de_rmw(dev_priv, reg, 0, FDI_FS_ERRC_ENABLE | FDI_FE_ERRC_ENABLE);
+ if (display->platform.ivybridge)
+ intel_de_rmw(display, reg, 0, FDI_FS_ERRC_ENABLE | FDI_FE_ERRC_ENABLE);
}
/* The FDI link training functions for ILK/Ibexpeak. */
@@ -512,8 +506,6 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc);
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
enum pipe pipe = crtc->pipe;
i915_reg_t reg;
u32 temp, tries;
@@ -522,8 +514,8 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
* Write the TU size bits before fdi link training, so that error
* detection works.
*/
- intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
- intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe)) & TU_SIZE_MASK);
+ intel_de_write(display, FDI_RX_TUSIZE1(pipe),
+ intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK);
/* FDI needs bits from pipe first */
assert_transcoder_enabled(display, crtc_state->cpu_transcoder);
@@ -531,75 +523,75 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
for train result */
reg = FDI_RX_IMR(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_RX_SYMBOL_LOCK;
temp &= ~FDI_RX_BIT_LOCK;
- intel_de_write(dev_priv, reg, temp);
- intel_de_read(dev_priv, reg);
+ intel_de_write(display, reg, temp);
+ intel_de_read(display, reg);
udelay(150);
/* enable CPU FDI TX and PCH FDI RX */
reg = FDI_TX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_DP_PORT_WIDTH_MASK;
temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);
temp &= ~FDI_LINK_TRAIN_NONE;
temp |= FDI_LINK_TRAIN_PATTERN_1;
- intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE);
+ intel_de_write(display, reg, temp | FDI_TX_ENABLE);
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_LINK_TRAIN_NONE;
temp |= FDI_LINK_TRAIN_PATTERN_1;
- intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE);
+ intel_de_write(display, reg, temp | FDI_RX_ENABLE);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(150);
/* Ironlake workaround, enable clock pointer after FDI enable*/
- intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe),
+ intel_de_write(display, FDI_RX_CHICKEN(pipe),
FDI_RX_PHASE_SYNC_POINTER_OVR);
- intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe),
+ intel_de_write(display, FDI_RX_CHICKEN(pipe),
FDI_RX_PHASE_SYNC_POINTER_OVR | FDI_RX_PHASE_SYNC_POINTER_EN);
reg = FDI_RX_IIR(pipe);
for (tries = 0; tries < 5; tries++) {
- temp = intel_de_read(dev_priv, reg);
- drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);
+ temp = intel_de_read(display, reg);
+ drm_dbg_kms(display->drm, "FDI_RX_IIR 0x%x\n", temp);
if ((temp & FDI_RX_BIT_LOCK)) {
- drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n");
- intel_de_write(dev_priv, reg, temp | FDI_RX_BIT_LOCK);
+ drm_dbg_kms(display->drm, "FDI train 1 done.\n");
+ intel_de_write(display, reg, temp | FDI_RX_BIT_LOCK);
break;
}
}
if (tries == 5)
- drm_err(&dev_priv->drm, "FDI train 1 fail!\n");
+ drm_err(display->drm, "FDI train 1 fail!\n");
/* Train 2 */
- intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),
+ intel_de_rmw(display, FDI_TX_CTL(pipe),
FDI_LINK_TRAIN_NONE, FDI_LINK_TRAIN_PATTERN_2);
- intel_de_rmw(dev_priv, FDI_RX_CTL(pipe),
+ intel_de_rmw(display, FDI_RX_CTL(pipe),
FDI_LINK_TRAIN_NONE, FDI_LINK_TRAIN_PATTERN_2);
- intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe));
+ intel_de_posting_read(display, FDI_RX_CTL(pipe));
udelay(150);
reg = FDI_RX_IIR(pipe);
for (tries = 0; tries < 5; tries++) {
- temp = intel_de_read(dev_priv, reg);
- drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);
+ temp = intel_de_read(display, reg);
+ drm_dbg_kms(display->drm, "FDI_RX_IIR 0x%x\n", temp);
if (temp & FDI_RX_SYMBOL_LOCK) {
- intel_de_write(dev_priv, reg,
+ intel_de_write(display, reg,
temp | FDI_RX_SYMBOL_LOCK);
- drm_dbg_kms(&dev_priv->drm, "FDI train 2 done.\n");
+ drm_dbg_kms(display->drm, "FDI train 2 done.\n");
break;
}
}
if (tries == 5)
- drm_err(&dev_priv->drm, "FDI train 2 fail!\n");
+ drm_err(display->drm, "FDI train 2 fail!\n");
- drm_dbg_kms(&dev_priv->drm, "FDI train done\n");
+ drm_dbg_kms(display->drm, "FDI train done\n");
}
@@ -614,8 +606,8 @@ static const int snb_b_fdi_train_param[] = {
static void gen6_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(crtc);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
enum pipe pipe = crtc->pipe;
i915_reg_t reg;
u32 temp, i, retry;
@@ -624,23 +616,23 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
* Write the TU size bits before fdi link training, so that error
* detection works.
*/
- intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
- intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe)) & TU_SIZE_MASK);
+ intel_de_write(display, FDI_RX_TUSIZE1(pipe),
+ intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK);
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
for train result */
reg = FDI_RX_IMR(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_RX_SYMBOL_LOCK;
temp &= ~FDI_RX_BIT_LOCK;
- intel_de_write(dev_priv, reg, temp);
+ intel_de_write(display, reg, temp);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(150);
/* enable CPU FDI TX and PCH FDI RX */
reg = FDI_TX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_DP_PORT_WIDTH_MASK;
temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);
temp &= ~FDI_LINK_TRAIN_NONE;
@@ -648,13 +640,13 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
/* SNB-B */
temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B;
- intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE);
+ intel_de_write(display, reg, temp | FDI_TX_ENABLE);
- intel_de_write(dev_priv, FDI_RX_MISC(pipe),
+ intel_de_write(display, FDI_RX_MISC(pipe),
FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
if (HAS_PCH_CPT(dev_priv)) {
temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
temp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
@@ -662,25 +654,25 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
temp &= ~FDI_LINK_TRAIN_NONE;
temp |= FDI_LINK_TRAIN_PATTERN_1;
}
- intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE);
+ intel_de_write(display, reg, temp | FDI_RX_ENABLE);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(150);
for (i = 0; i < 4; i++) {
- intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),
+ intel_de_rmw(display, FDI_TX_CTL(pipe),
FDI_LINK_TRAIN_VOL_EMP_MASK, snb_b_fdi_train_param[i]);
- intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));
+ intel_de_posting_read(display, FDI_TX_CTL(pipe));
udelay(500);
for (retry = 0; retry < 5; retry++) {
reg = FDI_RX_IIR(pipe);
- temp = intel_de_read(dev_priv, reg);
- drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);
+ temp = intel_de_read(display, reg);
+ drm_dbg_kms(display->drm, "FDI_RX_IIR 0x%x\n", temp);
if (temp & FDI_RX_BIT_LOCK) {
- intel_de_write(dev_priv, reg,
+ intel_de_write(display, reg,
temp | FDI_RX_BIT_LOCK);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FDI train 1 done.\n");
break;
}
@@ -690,22 +682,22 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
break;
}
if (i == 4)
- drm_err(&dev_priv->drm, "FDI train 1 fail!\n");
+ drm_err(display->drm, "FDI train 1 fail!\n");
/* Train 2 */
reg = FDI_TX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_LINK_TRAIN_NONE;
temp |= FDI_LINK_TRAIN_PATTERN_2;
- if (IS_SANDYBRIDGE(dev_priv)) {
+ if (display->platform.sandybridge) {
temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
/* SNB-B */
temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B;
}
- intel_de_write(dev_priv, reg, temp);
+ intel_de_write(display, reg, temp);
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
if (HAS_PCH_CPT(dev_priv)) {
temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
temp |= FDI_LINK_TRAIN_PATTERN_2_CPT;
@@ -713,25 +705,25 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
temp &= ~FDI_LINK_TRAIN_NONE;
temp |= FDI_LINK_TRAIN_PATTERN_2;
}
- intel_de_write(dev_priv, reg, temp);
+ intel_de_write(display, reg, temp);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(150);
for (i = 0; i < 4; i++) {
- intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),
+ intel_de_rmw(display, FDI_TX_CTL(pipe),
FDI_LINK_TRAIN_VOL_EMP_MASK, snb_b_fdi_train_param[i]);
- intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));
+ intel_de_posting_read(display, FDI_TX_CTL(pipe));
udelay(500);
for (retry = 0; retry < 5; retry++) {
reg = FDI_RX_IIR(pipe);
- temp = intel_de_read(dev_priv, reg);
- drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);
+ temp = intel_de_read(display, reg);
+ drm_dbg_kms(display->drm, "FDI_RX_IIR 0x%x\n", temp);
if (temp & FDI_RX_SYMBOL_LOCK) {
- intel_de_write(dev_priv, reg,
+ intel_de_write(display, reg,
temp | FDI_RX_SYMBOL_LOCK);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FDI train 2 done.\n");
break;
}
@@ -741,17 +733,16 @@ static void gen6_fdi_link_train(struct intel_crtc *crtc,
break;
}
if (i == 4)
- drm_err(&dev_priv->drm, "FDI train 2 fail!\n");
+ drm_err(display->drm, "FDI train 2 fail!\n");
- drm_dbg_kms(&dev_priv->drm, "FDI train done.\n");
+ drm_dbg_kms(display->drm, "FDI train done.\n");
}
/* Manual link training for Ivy Bridge A0 parts */
static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
i915_reg_t reg;
u32 temp, i, j;
@@ -762,72 +753,72 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
* Write the TU size bits before fdi link training, so that error
* detection works.
*/
- intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe),
- intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe)) & TU_SIZE_MASK);
+ intel_de_write(display, FDI_RX_TUSIZE1(pipe),
+ intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK);
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
for train result */
reg = FDI_RX_IMR(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_RX_SYMBOL_LOCK;
temp &= ~FDI_RX_BIT_LOCK;
- intel_de_write(dev_priv, reg, temp);
+ intel_de_write(display, reg, temp);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(150);
- drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR before link train 0x%x\n",
- intel_de_read(dev_priv, FDI_RX_IIR(pipe)));
+ drm_dbg_kms(display->drm, "FDI_RX_IIR before link train 0x%x\n",
+ intel_de_read(display, FDI_RX_IIR(pipe)));
/* Try each vswing and preemphasis setting twice before moving on */
for (j = 0; j < ARRAY_SIZE(snb_b_fdi_train_param) * 2; j++) {
/* disable first in case we need to retry */
reg = FDI_TX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~(FDI_LINK_TRAIN_AUTO | FDI_LINK_TRAIN_NONE_IVB);
temp &= ~FDI_TX_ENABLE;
- intel_de_write(dev_priv, reg, temp);
+ intel_de_write(display, reg, temp);
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_LINK_TRAIN_AUTO;
temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
temp &= ~FDI_RX_ENABLE;
- intel_de_write(dev_priv, reg, temp);
+ intel_de_write(display, reg, temp);
/* enable CPU FDI TX and PCH FDI RX */
reg = FDI_TX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~FDI_DP_PORT_WIDTH_MASK;
temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);
temp |= FDI_LINK_TRAIN_PATTERN_1_IVB;
temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
temp |= snb_b_fdi_train_param[j/2];
temp |= FDI_COMPOSITE_SYNC;
- intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE);
+ intel_de_write(display, reg, temp | FDI_TX_ENABLE);
- intel_de_write(dev_priv, FDI_RX_MISC(pipe),
+ intel_de_write(display, FDI_RX_MISC(pipe),
FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
temp |= FDI_COMPOSITE_SYNC;
- intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE);
+ intel_de_write(display, reg, temp | FDI_RX_ENABLE);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(1); /* should be 0.5us */
for (i = 0; i < 4; i++) {
reg = FDI_RX_IIR(pipe);
- temp = intel_de_read(dev_priv, reg);
- drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);
+ temp = intel_de_read(display, reg);
+ drm_dbg_kms(display->drm, "FDI_RX_IIR 0x%x\n", temp);
if (temp & FDI_RX_BIT_LOCK ||
- (intel_de_read(dev_priv, reg) & FDI_RX_BIT_LOCK)) {
- intel_de_write(dev_priv, reg,
+ (intel_de_read(display, reg) & FDI_RX_BIT_LOCK)) {
+ intel_de_write(display, reg,
temp | FDI_RX_BIT_LOCK);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FDI train 1 done, level %i.\n",
i);
break;
@@ -835,31 +826,31 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
udelay(1); /* should be 0.5us */
}
if (i == 4) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FDI train 1 fail on vswing %d\n", j / 2);
continue;
}
/* Train 2 */
- intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),
+ intel_de_rmw(display, FDI_TX_CTL(pipe),
FDI_LINK_TRAIN_NONE_IVB,
FDI_LINK_TRAIN_PATTERN_2_IVB);
- intel_de_rmw(dev_priv, FDI_RX_CTL(pipe),
+ intel_de_rmw(display, FDI_RX_CTL(pipe),
FDI_LINK_TRAIN_PATTERN_MASK_CPT,
FDI_LINK_TRAIN_PATTERN_2_CPT);
- intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe));
+ intel_de_posting_read(display, FDI_RX_CTL(pipe));
udelay(2); /* should be 1.5us */
for (i = 0; i < 4; i++) {
reg = FDI_RX_IIR(pipe);
- temp = intel_de_read(dev_priv, reg);
- drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp);
+ temp = intel_de_read(display, reg);
+ drm_dbg_kms(display->drm, "FDI_RX_IIR 0x%x\n", temp);
if (temp & FDI_RX_SYMBOL_LOCK ||
- (intel_de_read(dev_priv, reg) & FDI_RX_SYMBOL_LOCK)) {
- intel_de_write(dev_priv, reg,
+ (intel_de_read(display, reg) & FDI_RX_SYMBOL_LOCK)) {
+ intel_de_write(display, reg,
temp | FDI_RX_SYMBOL_LOCK);
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FDI train 2 done, level %i.\n",
i);
goto train_done;
@@ -867,12 +858,12 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
udelay(2); /* should be 1.5us */
}
if (i == 4)
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FDI train 2 fail on vswing %d\n", j / 2);
}
train_done:
- drm_dbg_kms(&dev_priv->drm, "FDI train done.\n");
+ drm_dbg_kms(display->drm, "FDI train done.\n");
}
/* Starting with Haswell, different DDI ports can work in FDI mode for
@@ -887,8 +878,6 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 temp, i, rx_ctl_val;
int n_entries;
@@ -903,33 +892,33 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
*
* WaFDIAutoLinkSetTimingOverrride:hsw
*/
- intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A),
+ intel_de_write(display, FDI_RX_MISC(PIPE_A),
FDI_RX_PWRDN_LANE1_VAL(2) |
FDI_RX_PWRDN_LANE0_VAL(2) |
FDI_RX_TP1_TO_TP2_48 |
FDI_RX_FDI_DELAY_90);
/* Enable the PCH Receiver FDI PLL */
- rx_ctl_val = dev_priv->display.fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE |
+ rx_ctl_val = display->fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE |
FDI_RX_PLL_ENABLE |
FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);
- intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);
- intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A));
+ intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
+ intel_de_posting_read(display, FDI_RX_CTL(PIPE_A));
udelay(220);
/* Switch from Rawclk to PCDclk */
rx_ctl_val |= FDI_PCDCLK;
- intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);
+ intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
/* Configure Port Clock Select */
- drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL);
+ drm_WARN_ON(display->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL);
intel_ddi_enable_clock(encoder, crtc_state);
/* Start the training iterating through available voltages and emphasis,
* testing each value twice. */
for (i = 0; i < n_entries * 2; i++) {
/* Configure DP_TP_CTL with auto-training */
- intel_de_write(dev_priv, DP_TP_CTL(PORT_E),
+ intel_de_write(display, DP_TP_CTL(PORT_E),
DP_TP_CTL_FDI_AUTOTRAIN |
DP_TP_CTL_ENHANCED_FRAME_ENABLE |
DP_TP_CTL_LINK_TRAIN_PAT1 |
@@ -939,36 +928,36 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
* DDI E does not support port reversal, the functionality is
* achieved on the PCH side in FDI_RX_CTL, so no need to set the
* port reversal bit */
- intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E),
+ intel_de_write(display, DDI_BUF_CTL(PORT_E),
DDI_BUF_CTL_ENABLE |
((crtc_state->fdi_lanes - 1) << 1) |
DDI_BUF_TRANS_SELECT(i / 2));
- intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E));
+ intel_de_posting_read(display, DDI_BUF_CTL(PORT_E));
udelay(600);
/* Program PCH FDI Receiver TU */
- intel_de_write(dev_priv, FDI_RX_TUSIZE1(PIPE_A), TU_SIZE(64));
+ intel_de_write(display, FDI_RX_TUSIZE1(PIPE_A), TU_SIZE(64));
/* Enable PCH FDI Receiver with auto-training */
rx_ctl_val |= FDI_RX_ENABLE | FDI_LINK_TRAIN_AUTO;
- intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);
- intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A));
+ intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
+ intel_de_posting_read(display, FDI_RX_CTL(PIPE_A));
/* Wait for FDI receiver lane calibration */
udelay(30);
/* Unset FDI_RX_MISC pwrdn lanes */
- intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),
+ intel_de_rmw(display, FDI_RX_MISC(PIPE_A),
FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK, 0);
- intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A));
+ intel_de_posting_read(display, FDI_RX_MISC(PIPE_A));
/* Wait for FDI auto training time */
udelay(5);
- temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E));
+ temp = intel_de_read(display, DP_TP_STATUS(PORT_E));
if (temp & DP_TP_STATUS_AUTOTRAIN_DONE) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"FDI link training done on step %d\n", i);
break;
}
@@ -978,32 +967,32 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
* Results in less fireworks from the state checker.
*/
if (i == n_entries * 2 - 1) {
- drm_err(&dev_priv->drm, "FDI link training failed!\n");
+ drm_err(display->drm, "FDI link training failed!\n");
break;
}
rx_ctl_val &= ~FDI_RX_ENABLE;
- intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val);
- intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A));
+ intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
+ intel_de_posting_read(display, FDI_RX_CTL(PIPE_A));
- intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);
- intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E));
+ intel_de_rmw(display, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);
+ intel_de_posting_read(display, DDI_BUF_CTL(PORT_E));
/* Disable DP_TP_CTL and FDI_RX_CTL and retry */
- intel_de_rmw(dev_priv, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0);
- intel_de_posting_read(dev_priv, DP_TP_CTL(PORT_E));
+ intel_de_rmw(display, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0);
+ intel_de_posting_read(display, DP_TP_CTL(PORT_E));
intel_wait_ddi_buf_idle(display, PORT_E);
/* Reset FDI_RX_MISC pwrdn lanes */
- intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),
+ intel_de_rmw(display, FDI_RX_MISC(PIPE_A),
FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK,
FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2));
- intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A));
+ intel_de_posting_read(display, FDI_RX_MISC(PIPE_A));
}
/* Enable normal pixel sending for FDI */
- intel_de_write(dev_priv, DP_TP_CTL(PORT_E),
+ intel_de_write(display, DP_TP_CTL(PORT_E),
DP_TP_CTL_FDI_AUTOTRAIN |
DP_TP_CTL_LINK_TRAIN_NORMAL |
DP_TP_CTL_ENHANCED_FRAME_ENABLE |
@@ -1013,7 +1002,6 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
void hsw_fdi_disable(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
/*
* Bspec lists this as both step 13 (before DDI_BUF_CTL disable)
@@ -1021,103 +1009,103 @@ void hsw_fdi_disable(struct intel_encoder *encoder)
* step 13 is the correct place for it. Step 18 is where it was
* originally before the BUN.
*/
- intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_RX_ENABLE, 0);
- intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);
+ intel_de_rmw(display, FDI_RX_CTL(PIPE_A), FDI_RX_ENABLE, 0);
+ intel_de_rmw(display, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0);
intel_wait_ddi_buf_idle(display, PORT_E);
intel_ddi_disable_clock(encoder);
- intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A),
+ intel_de_rmw(display, FDI_RX_MISC(PIPE_A),
FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK,
FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2));
- intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_PCDCLK, 0);
- intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_RX_PLL_ENABLE, 0);
+ intel_de_rmw(display, FDI_RX_CTL(PIPE_A), FDI_PCDCLK, 0);
+ intel_de_rmw(display, FDI_RX_CTL(PIPE_A), FDI_RX_PLL_ENABLE, 0);
}
void ilk_fdi_pll_enable(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
i915_reg_t reg;
u32 temp;
/* enable PCH FDI RX PLL, wait warmup plus DMI latency */
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~(FDI_DP_PORT_WIDTH_MASK | (0x7 << 16));
temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);
- temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11;
- intel_de_write(dev_priv, reg, temp | FDI_RX_PLL_ENABLE);
+ temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;
+ intel_de_write(display, reg, temp | FDI_RX_PLL_ENABLE);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(200);
/* Switch from Rawclk to PCDclk */
- intel_de_rmw(dev_priv, reg, 0, FDI_PCDCLK);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_rmw(display, reg, 0, FDI_PCDCLK);
+ intel_de_posting_read(display, reg);
udelay(200);
/* Enable CPU FDI TX PLL, always on for Ironlake */
reg = FDI_TX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
if ((temp & FDI_TX_PLL_ENABLE) == 0) {
- intel_de_write(dev_priv, reg, temp | FDI_TX_PLL_ENABLE);
+ intel_de_write(display, reg, temp | FDI_TX_PLL_ENABLE);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(100);
}
}
void ilk_fdi_pll_disable(struct intel_crtc *crtc)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(crtc);
enum pipe pipe = crtc->pipe;
/* Switch from PCDclk to Rawclk */
- intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), FDI_PCDCLK, 0);
+ intel_de_rmw(display, FDI_RX_CTL(pipe), FDI_PCDCLK, 0);
/* Disable CPU FDI TX PLL */
- intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), FDI_TX_PLL_ENABLE, 0);
- intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));
+ intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_PLL_ENABLE, 0);
+ intel_de_posting_read(display, FDI_TX_CTL(pipe));
udelay(100);
/* Wait for the clocks to turn off. */
- intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), FDI_RX_PLL_ENABLE, 0);
- intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe));
+ intel_de_rmw(display, FDI_RX_CTL(pipe), FDI_RX_PLL_ENABLE, 0);
+ intel_de_posting_read(display, FDI_RX_CTL(pipe));
udelay(100);
}
void ilk_fdi_disable(struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
i915_reg_t reg;
u32 temp;
/* disable CPU FDI tx and PCH FDI rx */
- intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), FDI_TX_ENABLE, 0);
- intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe));
+ intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_ENABLE, 0);
+ intel_de_posting_read(display, FDI_TX_CTL(pipe));
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
temp &= ~(0x7 << 16);
- temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11;
- intel_de_write(dev_priv, reg, temp & ~FDI_RX_ENABLE);
+ temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;
+ intel_de_write(display, reg, temp & ~FDI_RX_ENABLE);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(100);
/* Ironlake workaround, disable clock pointer after downing FDI */
if (HAS_PCH_IBX(dev_priv))
- intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe),
+ intel_de_write(display, FDI_RX_CHICKEN(pipe),
FDI_RX_PHASE_SYNC_POINTER_OVR);
/* still set train pattern 1 */
- intel_de_rmw(dev_priv, FDI_TX_CTL(pipe),
+ intel_de_rmw(display, FDI_TX_CTL(pipe),
FDI_LINK_TRAIN_NONE, FDI_LINK_TRAIN_PATTERN_1);
reg = FDI_RX_CTL(pipe);
- temp = intel_de_read(dev_priv, reg);
+ temp = intel_de_read(display, reg);
if (HAS_PCH_CPT(dev_priv)) {
temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
temp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
@@ -1127,10 +1115,10 @@ void ilk_fdi_disable(struct intel_crtc *crtc)
}
/* BPC in FDI rx is consistent with that in TRANSCONF */
temp &= ~(0x07 << 16);
- temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11;
- intel_de_write(dev_priv, reg, temp);
+ temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;
+ intel_de_write(display, reg, temp);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
udelay(100);
}
@@ -1147,14 +1135,14 @@ static const struct intel_fdi_funcs ivb_funcs = {
};
void
-intel_fdi_init_hook(struct drm_i915_private *dev_priv)
+intel_fdi_init_hook(struct intel_display *display)
{
- if (IS_IRONLAKE(dev_priv)) {
- dev_priv->display.funcs.fdi = &ilk_funcs;
- } else if (IS_SANDYBRIDGE(dev_priv)) {
- dev_priv->display.funcs.fdi = &gen6_funcs;
- } else if (IS_IVYBRIDGE(dev_priv)) {
+ if (display->platform.ironlake) {
+ display->funcs.fdi = &ilk_funcs;
+ } else if (display->platform.sandybridge) {
+ display->funcs.fdi = &gen6_funcs;
+ } else if (display->platform.ivybridge) {
/* FIXME: detect B0+ stepping and use auto training */
- dev_priv->display.funcs.fdi = &ivb_funcs;
+ display->funcs.fdi = &ivb_funcs;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.h b/drivers/gpu/drm/i915/display/intel_fdi.h
index b5be09efb36f..ad5e103c38a8 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.h
+++ b/drivers/gpu/drm/i915/display/intel_fdi.h
@@ -9,16 +9,16 @@
#include <linux/types.h>
enum pipe;
-struct drm_i915_private;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
struct intel_display;
+struct intel_display;
struct intel_encoder;
struct intel_link_bw_limits;
int intel_fdi_add_affected_crtcs(struct intel_atomic_state *state);
-int intel_fdi_link_freq(struct drm_i915_private *i915,
+int intel_fdi_link_freq(struct intel_display *display,
const struct intel_crtc_state *pipe_config);
bool intel_fdi_compute_pipe_bpp(struct intel_crtc_state *crtc_state);
int ilk_fdi_compute_config(struct intel_crtc *intel_crtc,
@@ -29,19 +29,19 @@ void intel_fdi_normal_train(struct intel_crtc *crtc);
void ilk_fdi_disable(struct intel_crtc *crtc);
void ilk_fdi_pll_disable(struct intel_crtc *intel_crtc);
void ilk_fdi_pll_enable(const struct intel_crtc_state *crtc_state);
-void intel_fdi_init_hook(struct drm_i915_private *dev_priv);
+void intel_fdi_init_hook(struct intel_display *display);
void hsw_fdi_link_train(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void hsw_fdi_disable(struct intel_encoder *encoder);
-void intel_fdi_pll_freq_update(struct drm_i915_private *i915);
+void intel_fdi_pll_freq_update(struct intel_display *display);
void intel_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state);
-void assert_fdi_tx_enabled(struct drm_i915_private *i915, enum pipe pipe);
-void assert_fdi_tx_disabled(struct drm_i915_private *i915, enum pipe pipe);
-void assert_fdi_rx_enabled(struct drm_i915_private *i915, enum pipe pipe);
-void assert_fdi_rx_disabled(struct drm_i915_private *i915, enum pipe pipe);
+void assert_fdi_tx_enabled(struct intel_display *display, enum pipe pipe);
+void assert_fdi_tx_disabled(struct intel_display *display, enum pipe pipe);
+void assert_fdi_rx_enabled(struct intel_display *display, enum pipe pipe);
+void assert_fdi_rx_disabled(struct intel_display *display, enum pipe pipe);
void assert_fdi_tx_pll_enabled(struct intel_display *display, enum pipe pipe);
void assert_fdi_rx_pll_enabled(struct intel_display *display, enum pipe pipe);
void assert_fdi_rx_pll_disabled(struct intel_display *display, enum pipe pipe);
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
index bc70e72ccc2e..a008412fdd04 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
@@ -90,10 +90,11 @@ verify_connector_state(struct intel_atomic_state *state,
static void intel_pipe_config_sanity_check(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
if (crtc_state->has_pch_encoder) {
- int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(i915, crtc_state),
+ int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(display, crtc_state),
&crtc_state->fdi_m_n);
int dotclock = crtc_state->hw.adjusted_mode.crtc_clock;
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 806729ec73c8..257f76c014c2 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -259,8 +259,8 @@ static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
assert_shared_dpll_enabled(display, crtc_state->shared_dpll);
/* FDI must be feeding us bits for PCH ports */
- assert_fdi_tx_enabled(dev_priv, pipe);
- assert_fdi_rx_enabled(dev_priv, pipe);
+ assert_fdi_tx_enabled(display, pipe);
+ assert_fdi_rx_enabled(display, pipe);
if (HAS_PCH_CPT(dev_priv)) {
reg = TRANS_CHICKEN2(pipe);
@@ -316,13 +316,14 @@ static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
static void ilk_disable_pch_transcoder(struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
i915_reg_t reg;
/* FDI relies on the transcoder */
- assert_fdi_tx_disabled(dev_priv, pipe);
- assert_fdi_rx_disabled(dev_priv, pipe);
+ assert_fdi_tx_disabled(display, pipe);
+ assert_fdi_rx_disabled(display, pipe);
/* Ports must be off as well */
assert_pch_ports_disabled(dev_priv, pipe);
@@ -479,8 +480,7 @@ void ilk_pch_post_disable(struct intel_atomic_state *state,
static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc_state);
/* read out port_clock from the DPLL */
i9xx_crtc_clock_get(crtc_state);
@@ -491,7 +491,7 @@ static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)
* Calculate one based on the FDI configuration.
*/
crtc_state->hw.adjusted_mode.crtc_clock =
- intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, crtc_state),
+ intel_dotclock_calculate(intel_fdi_link_freq(display, crtc_state),
&crtc_state->fdi_m_n);
}
@@ -549,14 +549,15 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state)
static void lpt_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
u32 val, pipeconf_val;
/* FDI must be feeding us bits for PCH ports */
- assert_fdi_tx_enabled(dev_priv, (enum pipe) cpu_transcoder);
- assert_fdi_rx_enabled(dev_priv, PIPE_A);
+ assert_fdi_tx_enabled(display, (enum pipe) cpu_transcoder);
+ assert_fdi_rx_enabled(display, PIPE_A);
val = intel_de_read(dev_priv, TRANS_CHICKEN2(PIPE_A));
/* Workaround: set timing override bit. */
--
2.39.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: struct intel_display conversions, part 2434235
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (11 preceding siblings ...)
2025-02-25 16:49 ` [PATCH 12/12] drm/i915/fdi: convert intel_fdi.[ch] " Jani Nikula
@ 2025-02-26 9:12 ` Patchwork
2025-02-26 9:12 ` ✗ Fi.CI.SPARSE: " Patchwork
` (3 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2025-02-26 9:12 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: struct intel_display conversions, part 2434235
URL : https://patchwork.freedesktop.org/series/145419/
State : warning
== Summary ==
Error: dim checkpatch failed
9c3726bbd358 drm/i915/display: remove leftover struct drm_i915_private forward declarations
7563265e6803 drm/i915/debugfs: continue display debugfs struct intel_display conversion
a4835bcbc92a drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display
b76a69d5456b drm/i915/snps: convert intel_snps_phy.[ch] to struct intel_display
5cf2845a9c8d drm/i915/dkl: convert intel_dkl_phy.[ch] to struct intel_display
23bebafb690f drm/i915/drrs: convert intel_drrs.[ch] to struct intel_display
53d49919182d drm/i915/display: convert the M/N functions to struct intel_display
63ce1c40d577 drm/i915/dpt: convert intel_dpt.[ch] interfaces to struct intel_display
014704462019 drm/i915/fbc: convert intel_fbc.[ch] to struct intel_display
814ff6a2e5a7 drm/i915/rps: convert intel_display_rps.[ch] to struct intel_display
5f3acce5fb81 drm/i915/ddi: convert intel_wait_ddi_buf_idle() to struct intel_display
e0d5378d7385 drm/i915/fdi: convert intel_fdi.[ch] to struct intel_display
-:1230: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#1230: FILE: drivers/gpu/drm/i915/display/intel_modeset_verify.c:97:
+ int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(display, crtc_state),
-:1298: CHECK:SPACING: No space is necessary after a cast
#1298: FILE: drivers/gpu/drm/i915/display/intel_pch_display.c:559:
+ assert_fdi_tx_enabled(display, (enum pipe) cpu_transcoder);
total: 0 errors, 1 warnings, 1 checks, 1218 lines checked
^ permalink raw reply [flat|nested] 19+ messages in thread
* ✗ Fi.CI.SPARSE: warning for drm/i915: struct intel_display conversions, part 2434235
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (12 preceding siblings ...)
2025-02-26 9:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: struct intel_display conversions, part 2434235 Patchwork
@ 2025-02-26 9:12 ` Patchwork
2025-02-26 9:34 ` ✓ i915.CI.BAT: success " Patchwork
` (2 subsequent siblings)
16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2025-02-26 9:12 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: struct intel_display conversions, part 2434235
URL : https://patchwork.freedesktop.org/series/145419/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 19+ messages in thread
* ✓ i915.CI.BAT: success for drm/i915: struct intel_display conversions, part 2434235
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (13 preceding siblings ...)
2025-02-26 9:12 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2025-02-26 9:34 ` Patchwork
2025-02-26 11:44 ` ✗ i915.CI.Full: failure " Patchwork
2025-02-27 10:16 ` [PATCH 00/12] " Kandpal, Suraj
16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2025-02-26 9:34 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5876 bytes --]
== Series Details ==
Series: drm/i915: struct intel_display conversions, part 2434235
URL : https://patchwork.freedesktop.org/series/145419/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16182 -> Patchwork_145419v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/index.html
Participating hosts (43 -> 44)
------------------------------
Additional (1): fi-bsw-n3050
Known issues
------------
Here are the changes found in Patchwork_145419v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-n3050: NOTRUN -> [INCOMPLETE][1] ([i915#12904]) +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
* igt@i915_pm_rpm@module-reload:
- bat-dg1-7: [PASS][2] -> [FAIL][3] ([i915#13633])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-dg1-7/igt@i915_pm_rpm@module-reload.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-dg1-7/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live:
- bat-twl-1: [PASS][4] -> [ABORT][5] ([i915#12435] / [i915#12919] / [i915#13503])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-twl-1/igt@i915_selftest@live.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-twl-1/igt@i915_selftest@live.html
- bat-twl-2: [PASS][6] -> [INCOMPLETE][7] ([i915#12435] / [i915#12445] / [i915#13761])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-twl-2/igt@i915_selftest@live.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-twl-2/igt@i915_selftest@live.html
* igt@i915_selftest@live@memory_region:
- bat-twl-2: [PASS][8] -> [INCOMPLETE][9] ([i915#12445])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-twl-2/igt@i915_selftest@live@memory_region.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-twl-2/igt@i915_selftest@live@memory_region.html
* igt@i915_selftest@live@perf:
- bat-twl-1: [PASS][10] -> [ABORT][11] ([i915#12919])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-twl-1/igt@i915_selftest@live@perf.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-twl-1/igt@i915_selftest@live@perf.html
* igt@i915_selftest@live@workarounds:
- bat-mtlp-9: [PASS][12] -> [DMESG-FAIL][13] ([i915#12061]) +1 other test dmesg-fail
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-mtlp-9/igt@i915_selftest@live@workarounds.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: [PASS][14] -> [SKIP][15] ([i915#9197]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_psr@psr-primary-mmap-gtt:
- fi-bsw-n3050: NOTRUN -> [SKIP][16] +20 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/fi-bsw-n3050/igt@kms_psr@psr-primary-mmap-gtt.html
#### Possible fixes ####
* igt@i915_module_load@load:
- bat-adlp-6: [DMESG-WARN][17] ([i915#12253]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-adlp-6/igt@i915_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-adlp-6/igt@i915_module_load@load.html
- bat-mtlp-9: [DMESG-WARN][19] ([i915#13494]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-mtlp-9/igt@i915_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-mtlp-9/igt@i915_module_load@load.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [DMESG-FAIL][21] ([i915#12061]) -> [PASS][22] +1 other test pass
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12253]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12253
[i915#12435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12435
[i915#12445]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12445
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#12919]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12919
[i915#13494]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13494
[i915#13503]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13503
[i915#13633]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13633
[i915#13761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13761
[i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
Build changes
-------------
* Linux: CI_DRM_16182 -> Patchwork_145419v1
CI-20190529: 20190529
CI_DRM_16182: add427957df4346354020266b1a4c8241ee44331 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8247: 8247
Patchwork_145419v1: add427957df4346354020266b1a4c8241ee44331 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/index.html
[-- Attachment #2: Type: text/html, Size: 7009 bytes --]
^ permalink raw reply [flat|nested] 19+ messages in thread
* ✗ i915.CI.Full: failure for drm/i915: struct intel_display conversions, part 2434235
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (14 preceding siblings ...)
2025-02-26 9:34 ` ✓ i915.CI.BAT: success " Patchwork
@ 2025-02-26 11:44 ` Patchwork
2025-02-27 10:16 ` [PATCH 00/12] " Kandpal, Suraj
16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2025-02-26 11:44 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 116065 bytes --]
== Series Details ==
Series: drm/i915: struct intel_display conversions, part 2434235
URL : https://patchwork.freedesktop.org/series/145419/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16182_full -> Patchwork_145419v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_145419v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_145419v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 11)
------------------------------
Additional (1): pig-kbl-iris
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_145419v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@api_intel_allocator@fork-simple-stress:
- shard-snb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-snb2/igt@api_intel_allocator@fork-simple-stress.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-snb5/igt@api_intel_allocator@fork-simple-stress.html
* igt@i915_fb_tiling@basic-x-tiling:
- shard-mtlp: NOTRUN -> [SKIP][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@i915_fb_tiling@basic-x-tiling.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-mtlp: NOTRUN -> [ABORT][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][5] +4 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html
### Piglit changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_flip@basic-plain-flip@b-dp1:
- pig-kbl-iris: NOTRUN -> [{DMESG-WARN}][6] +3 other tests {dmesg-warn}
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/pig-kbl-iris/igt@kms_flip@basic-plain-flip@b-dp1.html
Known issues
------------
Here are the changes found in Patchwork_145419v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#8411])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-8/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@api_intel_bb@blit-reloc-purge-cache:
- shard-dg2: NOTRUN -> [SKIP][8] ([i915#8411])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@api_intel_bb@blit-reloc-purge-cache.html
* igt@api_intel_bb@object-reloc-purge-cache:
- shard-rkl: NOTRUN -> [SKIP][9] ([i915#8411]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@api_intel_bb@object-reloc-purge-cache.html
* igt@device_reset@cold-reset-bound:
- shard-mtlp: NOTRUN -> [SKIP][10] ([i915#11078])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@device_reset@cold-reset-bound.html
- shard-dg2: NOTRUN -> [SKIP][11] ([i915#11078])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@device_reset@cold-reset-bound.html
- shard-rkl: NOTRUN -> [SKIP][12] ([i915#11078])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@device_reset@cold-reset-bound.html
* igt@device_reset@unbind-reset-rebind:
- shard-tglu: [PASS][13] -> [ABORT][14] ([i915#12817] / [i915#5507])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-tglu-7/igt@device_reset@unbind-reset-rebind.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@device_reset@unbind-reset-rebind.html
* igt@drm_fdinfo@busy@bcs0:
- shard-mtlp: NOTRUN -> [SKIP][15] ([i915#8414]) +7 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@drm_fdinfo@busy@bcs0.html
* igt@drm_fdinfo@busy@rcs0:
- shard-dg2-9: NOTRUN -> [SKIP][16] ([i915#8414]) +8 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@drm_fdinfo@busy@rcs0.html
* igt@gem_bad_reloc@negative-reloc:
- shard-rkl: NOTRUN -> [SKIP][17] ([i915#3281]) +12 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@gem_bad_reloc@negative-reloc.html
* igt@gem_caching@writes:
- shard-mtlp: NOTRUN -> [SKIP][18] ([i915#4873])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gem_caching@writes.html
* igt@gem_ccs@block-copy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][19] ([i915#3555] / [i915#9323])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gem_ccs@block-copy-compressed.html
- shard-rkl: NOTRUN -> [SKIP][20] ([i915#3555] / [i915#9323])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@gem_ccs@block-copy-compressed.html
* igt@gem_ccs@suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][21] ([i915#9323])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@gem_ccs@suspend-resume.html
- shard-tglu-1: NOTRUN -> [SKIP][22] ([i915#9323])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@gem_ccs@suspend-resume.html
* igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][23] ([i915#12392])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-3/igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_close_race@multigpu-basic-process:
- shard-mtlp: NOTRUN -> [SKIP][24] ([i915#7697])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-rkl: NOTRUN -> [SKIP][25] ([i915#7697])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_compute@compute-square:
- shard-dg2: NOTRUN -> [FAIL][26] ([i915#13665])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_compute@compute-square.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-mtlp: NOTRUN -> [SKIP][27] ([i915#8555])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-8/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs0:
- shard-mtlp: NOTRUN -> [SKIP][28] ([i915#5882]) +6 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs0.html
* igt@gem_ctx_sseu@mmap-args:
- shard-rkl: NOTRUN -> [SKIP][29] ([i915#280])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@gem_ctx_sseu@mmap-args.html
* igt@gem_eio@hibernate:
- shard-dg2: NOTRUN -> [ABORT][30] ([i915#7975])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@gem_eio@hibernate.html
* igt@gem_eio@in-flight-internal-10ms:
- shard-mtlp: [PASS][31] -> [ABORT][32] ([i915#13193])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-mtlp-5/igt@gem_eio@in-flight-internal-10ms.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-7/igt@gem_eio@in-flight-internal-10ms.html
* igt@gem_exec_balancer@bonded-dual:
- shard-dg2: NOTRUN -> [SKIP][33] ([i915#4771])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@gem_exec_balancer@bonded-dual.html
* igt@gem_exec_balancer@bonded-true-hang:
- shard-mtlp: NOTRUN -> [SKIP][34] ([i915#4812]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gem_exec_balancer@bonded-true-hang.html
* igt@gem_exec_balancer@noheartbeat:
- shard-dg2: NOTRUN -> [SKIP][35] ([i915#8555])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@gem_exec_balancer@noheartbeat.html
* igt@gem_exec_balancer@parallel:
- shard-tglu: NOTRUN -> [SKIP][36] ([i915#4525]) +1 other test skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-rkl: NOTRUN -> [SKIP][37] ([i915#4525]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_big@single:
- shard-tglu-1: NOTRUN -> [ABORT][38] ([i915#11713])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@gem_exec_big@single.html
* igt@gem_exec_capture@capture-invisible:
- shard-rkl: NOTRUN -> [SKIP][39] ([i915#6334]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@gem_exec_capture@capture-invisible.html
- shard-tglu-1: NOTRUN -> [SKIP][40] ([i915#6334]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_fence@submit:
- shard-dg2: NOTRUN -> [SKIP][41] ([i915#4812]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@gem_exec_fence@submit.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-mtlp: NOTRUN -> [SKIP][42] ([i915#3711])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_exec_flush@basic-wb-pro-default:
- shard-dg2: NOTRUN -> [SKIP][43] ([i915#3539] / [i915#4852]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_exec_flush@basic-wb-pro-default.html
* igt@gem_exec_reloc@basic-cpu-read:
- shard-dg2-9: NOTRUN -> [SKIP][44] ([i915#3281]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@gem_exec_reloc@basic-cpu-read.html
* igt@gem_exec_reloc@basic-write-read-active:
- shard-dg2: NOTRUN -> [SKIP][45] ([i915#3281]) +2 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_exec_reloc@basic-write-read-active.html
* igt@gem_exec_reloc@basic-write-wc-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][46] ([i915#3281]) +12 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gem_exec_reloc@basic-write-wc-noreloc.html
* igt@gem_exec_schedule@semaphore-power:
- shard-rkl: NOTRUN -> [SKIP][47] ([i915#7276])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@gem_exec_schedule@semaphore-power.html
- shard-mtlp: NOTRUN -> [SKIP][48] ([i915#4537] / [i915#4812]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-8/igt@gem_exec_schedule@semaphore-power.html
* igt@gem_fenced_exec_thrash@no-spare-fences-interruptible:
- shard-dg2: NOTRUN -> [SKIP][49] ([i915#4860])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_fenced_exec_thrash@no-spare-fences-interruptible.html
* igt@gem_lmem_evict@dontneed-evict-race:
- shard-rkl: NOTRUN -> [SKIP][50] ([i915#4613] / [i915#7582])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@gem_lmem_evict@dontneed-evict-race.html
* igt@gem_lmem_swapping@heavy-random:
- shard-mtlp: NOTRUN -> [SKIP][51] ([i915#4613]) +3 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-tglu: NOTRUN -> [SKIP][52] ([i915#4613])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_lmem_swapping@parallel-random-verify:
- shard-rkl: NOTRUN -> [SKIP][53] ([i915#4613]) +6 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@gem_lmem_swapping@parallel-random-verify.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2-9: NOTRUN -> [TIMEOUT][54] ([i915#5493]) +1 other test timeout
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@gem_lmem_swapping@smem-oom@lmem0.html
- shard-dg1: [PASS][55] -> [TIMEOUT][56] ([i915#5493]) +1 other test timeout
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][57] ([i915#4613]) +2 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- shard-dg2-9: NOTRUN -> [SKIP][58] ([i915#4077]) +1 other test skip
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
* igt@gem_mmap_gtt@cpuset-medium-copy:
- shard-mtlp: NOTRUN -> [SKIP][59] ([i915#4077]) +9 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@gem_mmap_gtt@cpuset-medium-copy.html
* igt@gem_mmap_offset@close-race:
- shard-rkl: [PASS][60] -> [DMESG-WARN][61] ([i915#12964]) +14 other tests dmesg-warn
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@gem_mmap_offset@close-race.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-3/igt@gem_mmap_offset@close-race.html
* igt@gem_mmap_wc@fault-concurrent:
- shard-dg2: NOTRUN -> [SKIP][62] ([i915#4083]) +3 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@gem_mmap_wc@fault-concurrent.html
* igt@gem_mmap_wc@read-write:
- shard-mtlp: NOTRUN -> [SKIP][63] ([i915#4083]) +6 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@gem_mmap_wc@read-write.html
* igt@gem_pread@display:
- shard-mtlp: NOTRUN -> [SKIP][64] ([i915#3282]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@gem_pread@display.html
* igt@gem_pwrite@basic-self:
- shard-rkl: NOTRUN -> [SKIP][65] ([i915#3282]) +7 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@gem_pwrite@basic-self.html
* igt@gem_pxp@create-protected-buffer:
- shard-rkl: NOTRUN -> [TIMEOUT][66] ([i915#12964])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@gem_pxp@create-protected-buffer.html
* igt@gem_pxp@create-valid-protected-context:
- shard-dg2: NOTRUN -> [SKIP][67] ([i915#4270]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_pxp@create-valid-protected-context.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-rkl: [PASS][68] -> [TIMEOUT][69] ([i915#12964])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-3/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_pxp@hw-rejects-pxp-buffer:
- shard-rkl: NOTRUN -> [TIMEOUT][70] ([i915#12917] / [i915#12964]) +2 other tests timeout
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@gem_pxp@hw-rejects-pxp-buffer.html
- shard-mtlp: NOTRUN -> [SKIP][71] ([i915#13398]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-8/igt@gem_pxp@hw-rejects-pxp-buffer.html
* igt@gem_pxp@reject-modify-context-protection-on:
- shard-rkl: [PASS][72] -> [TIMEOUT][73] ([i915#12917] / [i915#12964]) +1 other test timeout
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@gem_pxp@reject-modify-context-protection-on.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@gem_pxp@reject-modify-context-protection-on.html
* igt@gem_readwrite@read-bad-handle:
- shard-dg2: NOTRUN -> [SKIP][74] ([i915#3282]) +1 other test skip
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_readwrite@read-bad-handle.html
* igt@gem_render_copy@yf-tiled-ccs-to-linear:
- shard-dg2-9: NOTRUN -> [SKIP][75] ([i915#5190] / [i915#8428])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@gem_render_copy@yf-tiled-ccs-to-linear.html
* igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled:
- shard-mtlp: NOTRUN -> [SKIP][76] ([i915#8428]) +3 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@gem_render_copy@yf-tiled-ccs-to-yf-tiled.html
* igt@gem_render_copy@yf-tiled-to-vebox-x-tiled:
- shard-dg2: NOTRUN -> [SKIP][77] ([i915#5190] / [i915#8428]) +1 other test skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_render_copy@yf-tiled-to-vebox-x-tiled.html
* igt@gem_set_tiling_vs_blt@tiled-to-tiled:
- shard-mtlp: NOTRUN -> [SKIP][78] ([i915#4079])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html
* igt@gem_tiled_partial_pwrite_pread@writes:
- shard-dg2: NOTRUN -> [SKIP][79] ([i915#4077]) +6 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@gem_tiled_partial_pwrite_pread@writes.html
* igt@gem_tiled_pread_basic:
- shard-dg2: NOTRUN -> [SKIP][80] ([i915#4079])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_tiled_pread_basic.html
* igt@gem_tiled_swapping@non-threaded:
- shard-rkl: [PASS][81] -> [FAIL][82] ([i915#12941])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-1/igt@gem_tiled_swapping@non-threaded.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-1/igt@gem_tiled_swapping@non-threaded.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-tglu: NOTRUN -> [SKIP][83] ([i915#3297])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-mtlp: NOTRUN -> [SKIP][84] ([i915#3297]) +2 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-rkl: NOTRUN -> [SKIP][85] ([i915#3297] / [i915#3323])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@gem_userptr_blits@dmabuf-sync.html
- shard-tglu-1: NOTRUN -> [SKIP][86] ([i915#3297] / [i915#3323])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-dg2: NOTRUN -> [SKIP][87] ([i915#3297]) +2 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@forbidden-operations:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#3282] / [i915#3297])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@gem_userptr_blits@forbidden-operations.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-rkl: NOTRUN -> [SKIP][89] ([i915#3297]) +1 other test skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@gem_userptr_blits@unsync-unmap-cycles.html
- shard-tglu-1: NOTRUN -> [SKIP][90] ([i915#3297])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gen9_exec_parse@batch-invalid-length:
- shard-mtlp: NOTRUN -> [SKIP][91] ([i915#2856]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gen9_exec_parse@batch-invalid-length.html
- shard-dg2-9: NOTRUN -> [SKIP][92] ([i915#2856])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@gen9_exec_parse@batch-invalid-length.html
* igt@gen9_exec_parse@batch-zero-length:
- shard-tglu: NOTRUN -> [SKIP][93] ([i915#2527] / [i915#2856])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@gen9_exec_parse@batch-zero-length.html
* igt@gen9_exec_parse@bb-oversize:
- shard-rkl: NOTRUN -> [SKIP][94] ([i915#2527]) +5 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@gen9_exec_parse@bb-oversize.html
- shard-tglu-1: NOTRUN -> [SKIP][95] ([i915#2527] / [i915#2856]) +2 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@gen9_exec_parse@bb-oversize.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-rkl: NOTRUN -> [ABORT][96] ([i915#9820])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@i915_module_load@reload-with-fault-injection.html
- shard-snb: [PASS][97] -> [ABORT][98] ([i915#9820])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-snb1/igt@i915_module_load@reload-with-fault-injection.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-snb6/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_freq_api@freq-basic-api:
- shard-tglu: NOTRUN -> [SKIP][99] ([i915#8399])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@i915_pm_freq_api@freq-basic-api.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-rkl: NOTRUN -> [SKIP][100] ([i915#8399]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@i915_pm_freq_api@freq-reset-multiple.html
- shard-tglu-1: NOTRUN -> [SKIP][101] ([i915#8399])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
- shard-dg1: [PASS][102] -> [FAIL][103] ([i915#3591]) +1 other test fail
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
* igt@i915_pm_rps@thresholds-idle-park:
- shard-dg2: NOTRUN -> [SKIP][104] ([i915#11681])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@i915_pm_rps@thresholds-idle-park.html
* igt@i915_pm_rps@waitboost:
- shard-mtlp: NOTRUN -> [FAIL][105] ([i915#8346])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@i915_pm_rps@waitboost.html
* igt@i915_suspend@forcewake:
- shard-rkl: NOTRUN -> [DMESG-FAIL][106] ([i915#12964])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@i915_suspend@forcewake.html
* igt@intel_hwmon@hwmon-write:
- shard-rkl: NOTRUN -> [SKIP][107] ([i915#7707])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@intel_hwmon@hwmon-write.html
- shard-tglu-1: NOTRUN -> [SKIP][108] ([i915#7707])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
- shard-mtlp: NOTRUN -> [SKIP][109] ([i915#4212])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-mtlp: NOTRUN -> [SKIP][110] ([i915#12454] / [i915#12712])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
- shard-rkl: NOTRUN -> [SKIP][111] ([i915#12454] / [i915#12712])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-dp-4-4-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][112] ([i915#8709]) +15 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-10/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-dp-4-4-mc-ccs.html
* igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-3-y-rc-ccs-cc:
- shard-dg1: NOTRUN -> [SKIP][113] ([i915#8709]) +3 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-13/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-3-y-rc-ccs-cc.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc:
- shard-rkl: NOTRUN -> [SKIP][114] ([i915#8709]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc.html
* igt@kms_async_flips@invalid-async-flip-atomic:
- shard-mtlp: NOTRUN -> [SKIP][115] ([i915#12967])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_async_flips@invalid-async-flip-atomic.html
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#12967])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_async_flips@invalid-async-flip-atomic.html
* igt@kms_atomic_transition@plane-all-transition-fencing@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [DMESG-WARN][117] ([i915#12964]) +13 other tests dmesg-warn
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_atomic_transition@plane-all-transition-fencing@pipe-b-hdmi-a-2.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][118] ([i915#5286]) +8 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-180:
- shard-tglu-1: NOTRUN -> [SKIP][119] ([i915#5286]) +2 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-tglu: NOTRUN -> [SKIP][120] ([i915#5286]) +1 other test skip
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][121] +4 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-180:
- shard-mtlp: NOTRUN -> [SKIP][122] +24 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][123] ([i915#3638]) +4 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-dg2-9: NOTRUN -> [SKIP][124] ([i915#4538] / [i915#5190]) +1 other test skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-270:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#4538] / [i915#5190]) +8 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_big_fb@yf-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-mtlp: NOTRUN -> [SKIP][126] ([i915#6187]) +1 other test skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
- shard-dg2-9: NOTRUN -> [SKIP][127] ([i915#5190])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_ccs@bad-aux-stride-y-tiled-ccs:
- shard-dg2-9: NOTRUN -> [SKIP][128] ([i915#10307] / [i915#6095]) +14 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_ccs@bad-aux-stride-y-tiled-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc:
- shard-mtlp: NOTRUN -> [SKIP][129] ([i915#6095]) +54 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][130] ([i915#6095]) +147 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-13/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-3.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][131] ([i915#6095]) +34 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][132] ([i915#10307] / [i915#6095]) +161 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-mtlp: NOTRUN -> [SKIP][133] ([i915#12805])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
- shard-rkl: NOTRUN -> [SKIP][134] ([i915#12805])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][135] ([i915#6095]) +25 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-b-hdmi-a-3.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-mtlp: NOTRUN -> [SKIP][136] ([i915#12313]) +4 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
- shard-dg2-9: NOTRUN -> [SKIP][137] ([i915#12313])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][138] ([i915#12313]) +3 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
- shard-dg2: NOTRUN -> [SKIP][139] ([i915#12313])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][140] ([i915#6095]) +34 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][141] ([i915#6095]) +131 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-8/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][142] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-4/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_chamelium_audio@dp-audio:
- shard-mtlp: NOTRUN -> [SKIP][143] ([i915#11151] / [i915#7828]) +8 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-dg2-9: NOTRUN -> [SKIP][144] ([i915#11151] / [i915#7828])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_chamelium_hpd@dp-hpd:
- shard-rkl: NOTRUN -> [SKIP][145] ([i915#11151] / [i915#7828]) +11 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_chamelium_hpd@dp-hpd.html
* igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode:
- shard-dg2: NOTRUN -> [SKIP][146] ([i915#11151] / [i915#7828]) +5 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-tglu: NOTRUN -> [SKIP][147] ([i915#11151] / [i915#7828]) +4 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-tglu-1: NOTRUN -> [SKIP][148] ([i915#11151] / [i915#7828]) +3 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_color@deep-color:
- shard-dg2: [PASS][149] -> [SKIP][150] ([i915#3555]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-11/igt@kms_color@deep-color.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-3/igt@kms_color@deep-color.html
* igt@kms_content_protection@atomic:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#7118] / [i915#9424])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@atomic-dpms:
- shard-rkl: NOTRUN -> [SKIP][152] ([i915#7118] / [i915#9424])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@content-type-change:
- shard-rkl: NOTRUN -> [SKIP][153] ([i915#9424])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-mtlp: NOTRUN -> [SKIP][154] ([i915#3299]) +1 other test skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_content_protection@dp-mst-lic-type-0.html
- shard-dg2-9: NOTRUN -> [SKIP][155] ([i915#3299])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_content_protection@dp-mst-lic-type-0.html
- shard-rkl: NOTRUN -> [SKIP][156] ([i915#3116])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-tglu: NOTRUN -> [SKIP][157] ([i915#3116] / [i915#3299])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [FAIL][158] ([i915#7173]) +1 other test fail
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-10/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html
* igt@kms_content_protection@lic-type-1:
- shard-tglu-1: NOTRUN -> [SKIP][159] ([i915#6944] / [i915#9424]) +1 other test skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_content_protection@lic-type-1.html
* igt@kms_content_protection@type1:
- shard-mtlp: NOTRUN -> [SKIP][160] ([i915#3555] / [i915#6944] / [i915#9424])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent:
- shard-tglu: NOTRUN -> [SKIP][161] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-32x10:
- shard-mtlp: NOTRUN -> [SKIP][162] ([i915#3555] / [i915#8814]) +2 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_cursor_crc@cursor-onscreen-32x10.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x10:
- shard-tglu: NOTRUN -> [SKIP][163] ([i915#3555]) +3 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-dg2-9: NOTRUN -> [SKIP][164] ([i915#13049])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-mtlp: NOTRUN -> [SKIP][165] ([i915#13049])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-128x42:
- shard-mtlp: NOTRUN -> [SKIP][166] ([i915#8814])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_cursor_crc@cursor-sliding-128x42.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-dg2: NOTRUN -> [SKIP][167] ([i915#3555]) +3 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-rkl: NOTRUN -> [SKIP][168] ([i915#13049]) +3 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_cursor_crc@cursor-sliding-512x512.html
- shard-tglu-1: NOTRUN -> [SKIP][169] ([i915#13049]) +2 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-dg2: NOTRUN -> [SKIP][170] ([i915#13046] / [i915#5354]) +3 other tests skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-rkl: NOTRUN -> [SKIP][171] ([i915#4103]) +1 other test skip
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
- shard-mtlp: NOTRUN -> [SKIP][172] ([i915#4213])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-rkl: NOTRUN -> [SKIP][173] +25 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-mtlp: NOTRUN -> [SKIP][174] ([i915#9809]) +5 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
- shard-dg2-9: NOTRUN -> [SKIP][175] ([i915#13046] / [i915#5354]) +1 other test skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-tglu: NOTRUN -> [SKIP][176] ([i915#4103]) +1 other test skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-rkl: NOTRUN -> [SKIP][177] ([i915#8588])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_display_modes@mst-extended-mode-negative.html
- shard-tglu-1: NOTRUN -> [SKIP][178] ([i915#8588])
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-mtlp: NOTRUN -> [SKIP][179] ([i915#13749])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_dp_link_training@non-uhbr-sst.html
- shard-dg2: NOTRUN -> [SKIP][180] ([i915#13749])
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_dp_link_training@non-uhbr-sst.html
- shard-rkl: NOTRUN -> [SKIP][181] ([i915#13749]) +1 other test skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-tglu-1: NOTRUN -> [SKIP][182] ([i915#13707])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-basic:
- shard-rkl: NOTRUN -> [SKIP][183] ([i915#3555] / [i915#3840]) +2 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-tglu: NOTRUN -> [SKIP][184] ([i915#3840])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-bpc:
- shard-tglu-1: NOTRUN -> [SKIP][185] ([i915#3555] / [i915#3840])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_dsc@dsc-with-formats:
- shard-dg2-9: NOTRUN -> [SKIP][186] ([i915#3555] / [i915#3840])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_dsc@dsc-with-formats.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: NOTRUN -> [SKIP][187] ([i915#3955])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@chamelium:
- shard-mtlp: NOTRUN -> [SKIP][188] ([i915#4854])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-8/igt@kms_feature_discovery@chamelium.html
- shard-rkl: NOTRUN -> [SKIP][189] ([i915#4854])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-2x:
- shard-tglu-1: NOTRUN -> [SKIP][190] ([i915#1839])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@display-3x:
- shard-dg2-9: NOTRUN -> [SKIP][191] ([i915#1839])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@display-4x:
- shard-rkl: NOTRUN -> [SKIP][192] ([i915#1839]) +1 other test skip
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_feature_discovery@display-4x.html
* igt@kms_feature_discovery@psr2:
- shard-dg2: NOTRUN -> [SKIP][193] ([i915#658])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_feature_discovery@psr2.html
- shard-rkl: NOTRUN -> [SKIP][194] ([i915#658])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-busy-flip:
- shard-tglu: NOTRUN -> [SKIP][195] ([i915#3637]) +1 other test skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_flip@2x-busy-flip.html
* igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][196] ([i915#8381])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_flip@2x-flip-vs-fences-interruptible.html
* igt@kms_flip@2x-flip-vs-panning:
- shard-dg2: NOTRUN -> [SKIP][197] ([i915#9934]) +3 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_flip@2x-flip-vs-panning.html
* igt@kms_flip@2x-flip-vs-rmfb:
- shard-mtlp: NOTRUN -> [SKIP][198] ([i915#3637]) +5 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_flip@2x-flip-vs-rmfb.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-dg2-9: NOTRUN -> [SKIP][199] ([i915#9934])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
- shard-rkl: NOTRUN -> [SKIP][200] ([i915#9934]) +9 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
- shard-tglu-1: NOTRUN -> [SKIP][201] ([i915#3637]) +2 other tests skip
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a1:
- shard-rkl: NOTRUN -> [FAIL][202] ([i915#13743])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a1.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-hdmi-a1:
- shard-rkl: NOTRUN -> [FAIL][203] ([i915#11832])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-hdmi-a1.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1:
- shard-snb: [PASS][204] -> [FAIL][205] ([i915#13690]) +1 other test fail
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-snb1/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-snb6/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html
- shard-tglu: [PASS][206] -> [FAIL][207] ([i915#13690]) +1 other test fail
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-tglu-6/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-10/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4:
- shard-dg1: [PASS][208] -> [DMESG-WARN][209] ([i915#4423]) +1 other test dmesg-warn
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-17/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4.html
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-16/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a4.html
* igt@kms_flip@plain-flip-fb-recreate:
- shard-tglu: NOTRUN -> [FAIL][210] ([i915#13690]) +2 other tests fail
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_flip@plain-flip-fb-recreate.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a4:
- shard-dg1: [PASS][211] -> [FAIL][212] ([i915#13743]) +2 other tests fail
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-16/igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a4.html
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-19/igt@kms_flip@wf_vblank-ts-check-interruptible@b-hdmi-a4.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][213] ([i915#2672] / [i915#3555]) +1 other test skip
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][214] ([i915#2672]) +5 other tests skip
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode.html
- shard-tglu-1: NOTRUN -> [SKIP][215] ([i915#2587] / [i915#2672]) +1 other test skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling:
- shard-mtlp: NOTRUN -> [SKIP][216] ([i915#3555] / [i915#8810] / [i915#8813])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][217] ([i915#3555] / [i915#8810])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-dg2: NOTRUN -> [SKIP][218] ([i915#2672] / [i915#3555])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][219] ([i915#2672])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-mtlp: NOTRUN -> [SKIP][220] ([i915#2672] / [i915#3555] / [i915#8813]) +2 other tests skip
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
- shard-dg2-9: NOTRUN -> [SKIP][221] ([i915#2672] / [i915#3555])
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][222] ([i915#2672] / [i915#8813]) +2 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-dg2-9: NOTRUN -> [SKIP][223] ([i915#2672])
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][224] ([i915#2587] / [i915#2672] / [i915#3555])
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-rkl: NOTRUN -> [SKIP][225] ([i915#2672] / [i915#3555]) +5 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][226] ([i915#2672] / [i915#3555]) +1 other test skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][227] ([i915#2587] / [i915#2672]) +2 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
- shard-dg2: [PASS][228] -> [FAIL][229] ([i915#6880])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][230] ([i915#8708]) +11 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
- shard-tglu: NOTRUN -> [SKIP][231] +37 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-rte:
- shard-dg2: NOTRUN -> [SKIP][232] ([i915#5354]) +18 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render:
- shard-mtlp: NOTRUN -> [SKIP][233] ([i915#1825]) +36 other tests skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-tglu-1: NOTRUN -> [SKIP][234] +45 other tests skip
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-tglu: NOTRUN -> [SKIP][235] ([i915#5439])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-mtlp: NOTRUN -> [SKIP][236] ([i915#10055])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-dg2-9: NOTRUN -> [SKIP][237] ([i915#3458]) +5 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][238] ([i915#3458]) +11 other tests skip
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-cpu:
- shard-dg2-9: NOTRUN -> [SKIP][239] ([i915#5354]) +5 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2-9: NOTRUN -> [SKIP][240] ([i915#8708]) +1 other test skip
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-dg2: NOTRUN -> [SKIP][241] ([i915#9766])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][242] ([i915#8708]) +14 other tests skip
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][243] ([i915#1825]) +68 other tests skip
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
- shard-rkl: NOTRUN -> [SKIP][244] ([i915#3023]) +33 other tests skip
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
* igt@kms_hdr@invalid-hdr:
- shard-dg2: NOTRUN -> [SKIP][245] ([i915#3555] / [i915#8228])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-mtlp: NOTRUN -> [SKIP][246] ([i915#3555] / [i915#8228])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_hdr@invalid-metadata-sizes.html
- shard-dg2-9: NOTRUN -> [SKIP][247] ([i915#3555] / [i915#8228])
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_hdr@static-toggle:
- shard-tglu: NOTRUN -> [SKIP][248] ([i915#3555] / [i915#8228])
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_hdr@static-toggle.html
* igt@kms_hdr@static-toggle-dpms:
- shard-dg2: [PASS][249] -> [SKIP][250] ([i915#3555] / [i915#8228]) +1 other test skip
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-10/igt@kms_hdr@static-toggle-dpms.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_hdr@static-toggle-suspend:
- shard-rkl: NOTRUN -> [SKIP][251] ([i915#3555] / [i915#8228]) +1 other test skip
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_hdr@static-toggle-suspend.html
- shard-tglu-1: NOTRUN -> [SKIP][252] ([i915#3555] / [i915#8228])
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_invalid_mode@clock-too-high:
- shard-mtlp: NOTRUN -> [SKIP][253] ([i915#3555] / [i915#6403] / [i915#8826])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_invalid_mode@clock-too-high.html
* igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][254] ([i915#9457]) +2 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html
* igt@kms_invalid_mode@clock-too-high@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][255] ([i915#8826] / [i915#9457])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_invalid_mode@clock-too-high@pipe-d-edp-1.html
* igt@kms_joiner@basic-big-joiner:
- shard-tglu: NOTRUN -> [SKIP][256] ([i915#10656])
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-rkl: NOTRUN -> [SKIP][257] ([i915#12388])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-mtlp: NOTRUN -> [SKIP][258] ([i915#10656])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_joiner@basic-force-ultra-joiner.html
- shard-dg2-9: NOTRUN -> [SKIP][259] ([i915#10656])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_joiner@basic-force-ultra-joiner.html
- shard-rkl: NOTRUN -> [SKIP][260] ([i915#12394])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-rkl: NOTRUN -> [SKIP][261] ([i915#13688])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-dg2: [PASS][262] -> [SKIP][263] ([i915#12388])
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-11/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-5/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-mtlp: NOTRUN -> [SKIP][264] ([i915#12339])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_joiner@invalid-modeset-ultra-joiner.html
- shard-dg2: NOTRUN -> [SKIP][265] ([i915#12339])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_joiner@invalid-modeset-ultra-joiner.html
- shard-rkl: NOTRUN -> [SKIP][266] ([i915#12339])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-tglu-1: NOTRUN -> [SKIP][267] ([i915#13522])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-rkl: NOTRUN -> [SKIP][268] ([i915#13522])
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c:
- shard-dg2-9: NOTRUN -> [SKIP][269] +4 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-dg2-9: NOTRUN -> [SKIP][270] ([i915#13705])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
- shard-mtlp: NOTRUN -> [SKIP][271] ([i915#13705])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane_lowres@tiling-x:
- shard-mtlp: NOTRUN -> [SKIP][272] ([i915#11614] / [i915#3582]) +1 other test skip
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_plane_lowres@tiling-x.html
* igt@kms_plane_lowres@tiling-x@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][273] ([i915#10226] / [i915#11614] / [i915#3582]) +2 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_plane_lowres@tiling-x@pipe-a-edp-1.html
* igt@kms_plane_multiple@tiling-y:
- shard-mtlp: NOTRUN -> [SKIP][274] ([i915#3555] / [i915#8806])
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_multiple@tiling-yf:
- shard-rkl: NOTRUN -> [SKIP][275] ([i915#3555]) +8 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_plane_multiple@tiling-yf.html
- shard-tglu-1: NOTRUN -> [SKIP][276] ([i915#3555]) +2 other tests skip
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c:
- shard-rkl: NOTRUN -> [SKIP][277] ([i915#12247]) +10 other tests skip
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-8/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][278] ([i915#12247] / [i915#6953]) +1 other test skip
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_plane_scaling@planes-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
- shard-tglu: NOTRUN -> [SKIP][279] ([i915#12247] / [i915#6953])
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d:
- shard-tglu: NOTRUN -> [SKIP][280] ([i915#12247]) +8 other tests skip
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-mtlp: NOTRUN -> [SKIP][281] ([i915#12247] / [i915#3555])
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
- shard-dg2: NOTRUN -> [SKIP][282] ([i915#12247] / [i915#3555] / [i915#9423])
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
- shard-rkl: NOTRUN -> [SKIP][283] ([i915#12247] / [i915#3555])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d:
- shard-dg2: NOTRUN -> [SKIP][284] ([i915#12247]) +3 other tests skip
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
- shard-mtlp: NOTRUN -> [SKIP][285] ([i915#12247] / [i915#6953]) +1 other test skip
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
- shard-mtlp: NOTRUN -> [SKIP][286] ([i915#12247] / [i915#3555] / [i915#6953])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a:
- shard-mtlp: NOTRUN -> [SKIP][287] ([i915#12247]) +20 other tests skip
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_backlight@basic-brightness:
- shard-tglu: NOTRUN -> [SKIP][288] ([i915#9812])
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@fade:
- shard-tglu-1: NOTRUN -> [SKIP][289] ([i915#9812])
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_pm_backlight@fade.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-rkl: NOTRUN -> [SKIP][290] ([i915#5354]) +1 other test skip
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-mtlp: NOTRUN -> [SKIP][291] ([i915#9292])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-rkl: NOTRUN -> [SKIP][292] ([i915#3828])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: NOTRUN -> [SKIP][293] ([i915#3361])
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-rkl: NOTRUN -> [SKIP][294] ([i915#8430])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-rkl: [PASS][295] -> [SKIP][296] ([i915#9519])
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-2/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-8/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-dg2: NOTRUN -> [SKIP][297] ([i915#9519]) +1 other test skip
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-rkl: NOTRUN -> [SKIP][298] ([i915#9519])
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_pm_rpm@dpms-non-lpsp.html
- shard-tglu-1: NOTRUN -> [SKIP][299] ([i915#9519])
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-mtlp: NOTRUN -> [SKIP][300] ([i915#9519]) +1 other test skip
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-pc8-residency-stress:
- shard-rkl: NOTRUN -> [SKIP][301] ([i915#12916])
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@kms_pm_rpm@modeset-pc8-residency-stress.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-glk: [PASS][302] -> [INCOMPLETE][303] ([i915#10553])
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-glk1/igt@kms_pm_rpm@system-suspend-modeset.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-glk6/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-mtlp: NOTRUN -> [SKIP][304] ([i915#6524])
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-dg2: NOTRUN -> [SKIP][305] ([i915#11520]) +2 other tests skip
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-tglu-1: NOTRUN -> [SKIP][306] ([i915#11520]) +3 other tests skip
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
- shard-rkl: NOTRUN -> [SKIP][307] ([i915#11520]) +13 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-6/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
- shard-mtlp: NOTRUN -> [SKIP][308] ([i915#12316]) +3 other tests skip
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
- shard-dg2-9: NOTRUN -> [SKIP][309] ([i915#11520]) +2 other tests skip
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-tglu: NOTRUN -> [SKIP][310] ([i915#11520]) +3 other tests skip
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_su@page_flip-p010:
- shard-mtlp: NOTRUN -> [SKIP][311] ([i915#4348])
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-rkl: NOTRUN -> [SKIP][312] ([i915#9683]) +1 other test skip
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_psr2_su@page_flip-xrgb8888.html
- shard-tglu-1: NOTRUN -> [SKIP][313] ([i915#9683])
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-psr-cursor-plane-move:
- shard-dg2-9: NOTRUN -> [SKIP][314] ([i915#1072] / [i915#9732]) +4 other tests skip
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_psr@fbc-psr-cursor-plane-move.html
* igt@kms_psr@pr-cursor-plane-move:
- shard-mtlp: NOTRUN -> [SKIP][315] ([i915#9688]) +15 other tests skip
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_psr@pr-cursor-plane-move.html
* igt@kms_psr@pr-dpms:
- shard-tglu: NOTRUN -> [SKIP][316] ([i915#9732]) +9 other tests skip
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_psr@pr-dpms.html
* igt@kms_psr@pr-sprite-render:
- shard-tglu-1: NOTRUN -> [SKIP][317] ([i915#9732]) +11 other tests skip
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_psr@pr-sprite-render.html
* igt@kms_psr@psr-sprite-plane-move:
- shard-rkl: NOTRUN -> [SKIP][318] ([i915#1072] / [i915#9732]) +34 other tests skip
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_psr@psr-sprite-plane-move.html
* igt@kms_psr@psr2-no-drrs:
- shard-dg2: NOTRUN -> [SKIP][319] ([i915#1072] / [i915#9732]) +10 other tests skip
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_psr@psr2-no-drrs.html
* igt@kms_rotation_crc@bad-tiling:
- shard-mtlp: NOTRUN -> [SKIP][320] ([i915#12755]) +3 other tests skip
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_rotation_crc@bad-tiling.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
- shard-rkl: NOTRUN -> [SKIP][321] ([i915#5289])
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-4/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-mtlp: NOTRUN -> [SKIP][322] ([i915#5289])
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-dg2: NOTRUN -> [SKIP][323] ([i915#5190])
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-dg2: NOTRUN -> [SKIP][324] ([i915#12755]) +1 other test skip
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_setmode@basic:
- shard-rkl: [PASS][325] -> [FAIL][326] ([i915#5465])
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-5/igt@kms_setmode@basic.html
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_setmode@basic.html
* igt@kms_setmode@basic@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][327] ([i915#5465]) +1 other test fail
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-mtlp: NOTRUN -> [SKIP][328] ([i915#3555] / [i915#8809] / [i915#8823])
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_setmode@invalid-clone-single-crtc:
- shard-mtlp: NOTRUN -> [SKIP][329] ([i915#3555] / [i915#8809]) +2 other tests skip
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@kms_setmode@invalid-clone-single-crtc.html
- shard-dg2-9: NOTRUN -> [SKIP][330] ([i915#3555]) +1 other test skip
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-9/igt@kms_setmode@invalid-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2: NOTRUN -> [SKIP][331] ([i915#8623])
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vblank@query-forked-hang:
- shard-rkl: [PASS][332] -> [DMESG-WARN][333] ([i915#12917] / [i915#12964])
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@kms_vblank@query-forked-hang.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_vblank@query-forked-hang.html
* igt@kms_vrr@max-min:
- shard-mtlp: NOTRUN -> [SKIP][334] ([i915#8808] / [i915#9906])
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@kms_vrr@max-min.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-tglu: NOTRUN -> [SKIP][335] ([i915#9906])
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@kms_writeback@writeback-check-output:
- shard-tglu: NOTRUN -> [SKIP][336] ([i915#2437])
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-7/igt@kms_writeback@writeback-check-output.html
* igt@kms_writeback@writeback-check-output-xrgb2101010:
- shard-rkl: NOTRUN -> [SKIP][337] ([i915#2437] / [i915#9412])
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@kms_writeback@writeback-check-output-xrgb2101010.html
- shard-tglu-1: NOTRUN -> [SKIP][338] ([i915#2437] / [i915#9412])
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-1/igt@kms_writeback@writeback-check-output-xrgb2101010.html
* igt@kms_writeback@writeback-fb-id:
- shard-rkl: NOTRUN -> [SKIP][339] ([i915#2437])
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_writeback@writeback-fb-id.html
* igt@perf@mi-rpc:
- shard-rkl: NOTRUN -> [SKIP][340] ([i915#2434])
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@perf@mi-rpc.html
* igt@perf@non-zero-reason:
- shard-dg2: NOTRUN -> [FAIL][341] ([i915#9100]) +1 other test fail
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@perf@non-zero-reason.html
* igt@perf_pmu@busy-double-start:
- shard-mtlp: NOTRUN -> [FAIL][342] ([i915#4349]) +2 other tests fail
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@perf_pmu@busy-double-start.html
* igt@prime_vgem@basic-fence-read:
- shard-mtlp: NOTRUN -> [SKIP][343] ([i915#3708])
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@coherency-gtt:
- shard-mtlp: NOTRUN -> [SKIP][344] ([i915#3708] / [i915#4077])
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@prime_vgem@coherency-gtt.html
* igt@prime_vgem@fence-flip-hang:
- shard-rkl: NOTRUN -> [SKIP][345] ([i915#3708])
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@prime_vgem@fence-flip-hang.html
* igt@sriov_basic@bind-unbind-vf:
- shard-dg2: NOTRUN -> [SKIP][346] ([i915#9917]) +1 other test skip
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@sriov_basic@bind-unbind-vf.html
- shard-rkl: NOTRUN -> [SKIP][347] ([i915#9917])
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-5/igt@sriov_basic@bind-unbind-vf.html
* igt@sriov_basic@bind-unbind-vf@vf-5:
- shard-mtlp: NOTRUN -> [FAIL][348] ([i915#12910]) +9 other tests fail
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@sriov_basic@bind-unbind-vf@vf-5.html
* igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1:
- shard-tglu: NOTRUN -> [FAIL][349] ([i915#12910]) +9 other tests fail
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-3/igt@sriov_basic@enable-vfs-autoprobe-on@numvfs-1.html
#### Possible fixes ####
* igt@drm_mm@drm_mm:
- shard-rkl: [DMESG-WARN][350] ([i915#12964]) -> [PASS][351] +19 other tests pass
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-7/igt@drm_mm@drm_mm.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-8/igt@drm_mm@drm_mm.html
* igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: [INCOMPLETE][352] ([i915#12392] / [i915#13356]) -> [PASS][353]
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-4/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-3/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: [ABORT][354] ([i915#13427]) -> [PASS][355]
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-5/igt@gem_create@create-ext-cpu-access-big.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox:
- shard-mtlp: [DMESG-WARN][356] ([i915#13723]) -> [PASS][357]
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-mtlp-7/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-2/igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox.html
* igt@gem_eio@in-flight-contexts-immediate:
- shard-mtlp: [ABORT][358] ([i915#13193]) -> [PASS][359] +4 other tests pass
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-mtlp-7/igt@gem_eio@in-flight-contexts-immediate.html
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-3/igt@gem_eio@in-flight-contexts-immediate.html
* igt@gem_exec_endless@dispatch@ccs0:
- shard-dg2: [TIMEOUT][360] ([i915#3778] / [i915#7016]) -> [PASS][361] +1 other test pass
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-7/igt@gem_exec_endless@dispatch@ccs0.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-10/igt@gem_exec_endless@dispatch@ccs0.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-rkl: [TIMEOUT][362] ([i915#12917] / [i915#12964]) -> [PASS][363] +3 other tests pass
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-7/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-8/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-mtlp: [ABORT][364] ([i915#10131] / [i915#10887] / [i915#9820]) -> [PASS][365]
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rpm@system-suspend:
- shard-dg2: [INCOMPLETE][366] ([i915#12797]) -> [PASS][367]
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-8/igt@i915_pm_rpm@system-suspend.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-8/igt@i915_pm_rpm@system-suspend.html
* igt@kms_addfb_basic@too-high:
- shard-dg1: [DMESG-WARN][368] ([i915#4391] / [i915#4423]) -> [PASS][369]
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-15/igt@kms_addfb_basic@too-high.html
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-17/igt@kms_addfb_basic@too-high.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
- shard-rkl: [DMESG-FAIL][370] ([i915#12964]) -> [PASS][371]
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-rkl: [FAIL][372] ([i915#13566]) -> [PASS][373] +4 other tests pass
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@kms_cursor_crc@cursor-onscreen-128x42.html
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_cursor_crc@cursor-onscreen-128x42.html
* igt@kms_cursor_crc@cursor-sliding-256x85:
- shard-tglu: [FAIL][374] ([i915#13566]) -> [PASS][375] +7 other tests pass
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-tglu-6/igt@kms_cursor_crc@cursor-sliding-256x85.html
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-10/igt@kms_cursor_crc@cursor-sliding-256x85.html
* igt@kms_flip@dpms-off-confusion:
- shard-glk: [DMESG-WARN][376] ([i915#118]) -> [PASS][377] +1 other test pass
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-glk8/igt@kms_flip@dpms-off-confusion.html
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-glk7/igt@kms_flip@dpms-off-confusion.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
- shard-mtlp: [FAIL][378] ([i915#13743]) -> [PASS][379] +1 other test pass
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-mtlp-4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-mtlp-1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-dg1: [FAIL][380] ([i915#13027]) -> [PASS][381]
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-12/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-15/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-tglu: [FAIL][382] ([i915#13743]) -> [PASS][383] +8 other tests pass
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-tglu-8/igt@kms_flip@plain-flip-ts-check-interruptible.html
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-tglu-2/igt@kms_flip@plain-flip-ts-check-interruptible.html
* igt@kms_flip@wf_vblank-ts-check-interruptible:
- shard-dg2: [FAIL][384] ([i915#13743]) -> [PASS][385] +1 other test pass
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-5/igt@kms_flip@wf_vblank-ts-check-interruptible.html
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_flip@wf_vblank-ts-check-interruptible.html
* igt@kms_hdr@bpc-switch:
- shard-dg2: [SKIP][386] ([i915#3555] / [i915#8228]) -> [PASS][387]
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-2/igt@kms_hdr@bpc-switch.html
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-10/igt@kms_hdr@bpc-switch.html
* igt@kms_plane_alpha_blend@coverage-7efc:
- shard-dg1: [DMESG-WARN][388] ([i915#4423]) -> [PASS][389] +2 other tests pass
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-13/igt@kms_plane_alpha_blend@coverage-7efc.html
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-14/igt@kms_plane_alpha_blend@coverage-7efc.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-dg2: [SKIP][390] ([i915#9519]) -> [PASS][391]
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-1/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-4/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-rkl: [SKIP][392] ([i915#9519]) -> [PASS][393] +1 other test pass
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@perf_pmu@busy-double-start@vecs1:
- shard-dg2: [FAIL][394] ([i915#4349]) -> [PASS][395] +4 other tests pass
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-10/igt@perf_pmu@busy-double-start@vecs1.html
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@perf_pmu@busy-double-start@vecs1.html
#### Warnings ####
* igt@kms_big_fb@4-tiled-64bpp-rotate-90:
- shard-dg1: [SKIP][396] ([i915#4423] / [i915#4538] / [i915#5286]) -> [SKIP][397] ([i915#4538] / [i915#5286])
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-17/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-12/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-dg1: [SKIP][398] ([i915#12313]) -> [SKIP][399] ([i915#12313] / [i915#4423])
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-12/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-15/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_chamelium_audio@dp-audio:
- shard-dg1: [SKIP][400] ([i915#11151] / [i915#7828]) -> [SKIP][401] ([i915#11151] / [i915#4423] / [i915#7828])
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-12/igt@kms_chamelium_audio@dp-audio.html
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-15/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2: [SKIP][402] ([i915#7118] / [i915#9424]) -> [FAIL][403] ([i915#7173])
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-7/igt@kms_content_protection@atomic-dpms.html
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-10/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@legacy:
- shard-dg2: [FAIL][404] ([i915#7173]) -> [SKIP][405] ([i915#7118] / [i915#9424])
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-11/igt@kms_content_protection@legacy.html
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-5/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2: [SKIP][406] ([i915#9424]) -> [FAIL][407] ([i915#7173])
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-2/igt@kms_content_protection@lic-type-0.html
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-10/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@srm:
- shard-dg2: [FAIL][408] ([i915#7173]) -> [SKIP][409] ([i915#7118])
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-10/igt@kms_content_protection@srm.html
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-2/igt@kms_content_protection@srm.html
* igt@kms_cursor_crc@cursor-onscreen-64x21:
- shard-rkl: [FAIL][410] ([i915#13566]) -> [DMESG-WARN][411] ([i915#12917] / [i915#12964])
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@kms_cursor_crc@cursor-onscreen-64x21.html
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-64x21.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-rkl: [INCOMPLETE][412] ([i915#9878]) -> [DMESG-FAIL][413] ([i915#12964])
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-5/igt@kms_fbcon_fbt@fbc-suspend.html
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
- shard-dg2: [SKIP][414] ([i915#10433] / [i915#3458]) -> [SKIP][415] ([i915#3458])
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite:
- shard-dg1: [SKIP][416] -> [SKIP][417] ([i915#4423])
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite.html
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-19/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-dg2: [SKIP][418] ([i915#3458]) -> [SKIP][419] ([i915#10433] / [i915#3458])
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-dg1: [SKIP][420] ([i915#4423] / [i915#8708]) -> [SKIP][421] ([i915#8708])
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_hdr@brightness-with-hdr:
- shard-dg2: [SKIP][422] ([i915#13331]) -> [SKIP][423] ([i915#12713])
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg2-10/igt@kms_hdr@brightness-with-hdr.html
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg2-6/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][424] ([i915#1839] / [i915#4816]) -> [SKIP][425] ([i915#4070] / [i915#4816])
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-8/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: [SKIP][426] ([i915#9340]) -> [SKIP][427] ([i915#3828])
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-rkl-5/igt@kms_pm_lpsp@kms-lpsp.html
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-rkl-7/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-dg1: [SKIP][428] ([i915#11520]) -> [SKIP][429] ([i915#11520] / [i915#4423])
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16182/shard-dg1-13/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/shard-dg1-14/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
[i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
[i915#10226]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10226
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
[i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11614]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11614
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11713
[i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
[i915#11832]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11832
[i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
[i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
[i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
[i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
[i915#12394]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12394
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12797]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12797
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#12817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12817
[i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
[i915#12916]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12916
[i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
[i915#12941]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12941
[i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
[i915#12967]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12967
[i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13193
[i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
[i915#13427]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13427
[i915#13522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13522
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13665]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13665
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13690]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13690
[i915#13705]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13705
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
[i915#13743]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13743
[i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2434
[i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
[i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3582
[i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3711]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3711
[i915#3778]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3778
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4348
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#4873]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4873
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5465]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5465
[i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
[i915#5507]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5507
[i915#5882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5882
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6403
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7016]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7016
[i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
[i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8346
[i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8588]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8588
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
[i915#8806]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8806
[i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
[i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
[i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
[i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
[i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
[i915#8823]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8823
[i915#8826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8826
[i915#9100]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9100
[i915#9292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9292
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9457]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9457
[i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9766]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9766
[i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
[i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_16182 -> Patchwork_145419v1
CI-20190529: 20190529
CI_DRM_16182: add427957df4346354020266b1a4c8241ee44331 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8247: 8247
Patchwork_145419v1: add427957df4346354020266b1a4c8241ee44331 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_145419v1/index.html
[-- Attachment #2: Type: text/html, Size: 147513 bytes --]
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
` (15 preceding siblings ...)
2025-02-26 11:44 ` ✗ i915.CI.Full: failure " Patchwork
@ 2025-02-27 10:16 ` Kandpal, Suraj
2025-02-27 10:36 ` Jani Nikula
16 siblings, 1 reply; 19+ messages in thread
From: Kandpal, Suraj @ 2025-02-27 10:16 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Tuesday, February 25, 2025 10:19 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 00/12] drm/i915: struct intel_display conversions, part
> 2434235
>
> More of the same.
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
For the whole series
>
> Jani Nikula (12):
> drm/i915/display: remove leftover struct drm_i915_private forward
> declarations
> drm/i915/debugfs: continue display debugfs struct intel_display
> conversion
> drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display
> drm/i915/snps: convert intel_snps_phy.[ch] to struct intel_display
> drm/i915/dkl: convert intel_dkl_phy.[ch] to struct intel_display
> drm/i915/drrs: convert intel_drrs.[ch] to struct intel_display
> drm/i915/display: convert the M/N functions to struct intel_display
> drm/i915/dpt: convert intel_dpt.[ch] interfaces to struct
> intel_display
> drm/i915/fbc: convert intel_fbc.[ch] to struct intel_display
> drm/i915/rps: convert intel_display_rps.[ch] to struct intel_display
> drm/i915/ddi: convert intel_wait_ddi_buf_idle() to struct
> intel_display
> drm/i915/fdi: convert intel_fdi.[ch] to struct intel_display
>
> drivers/gpu/drm/i915/display/intel_atomic.h | 1 -
> .../gpu/drm/i915/display/intel_atomic_plane.c | 8 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 11 +-
> drivers/gpu/drm/i915/display/intel_ddi.h | 4 +-
> .../drm/i915/display/intel_ddi_buf_trans.h | 1 -
> drivers/gpu/drm/i915/display/intel_display.c | 102 ++--
> drivers/gpu/drm/i915/display/intel_display.h | 8 +-
> .../drm/i915/display/intel_display_debugfs.c | 26 +-
> .../drm/i915/display/intel_display_debugfs.h | 6 +-
> .../drm/i915/display/intel_display_driver.c | 8 +-
> .../drm/i915/display/intel_display_power.c | 2 +-
> .../gpu/drm/i915/display/intel_display_rps.c | 4 +-
> .../gpu/drm/i915/display/intel_display_rps.h | 4 +-
> drivers/gpu/drm/i915/display/intel_dkl_phy.c | 8 +-
> drivers/gpu/drm/i915/display/intel_dkl_phy.h | 3 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 7 +-
> drivers/gpu/drm/i915/display/intel_dpt.c | 24 +-
> drivers/gpu/drm/i915/display/intel_dpt.h | 7 +-
> drivers/gpu/drm/i915/display/intel_drrs.c | 45 +-
> drivers/gpu/drm/i915/display/intel_drrs.h | 10 +-
> drivers/gpu/drm/i915/display/intel_fbc.c | 113 ++---
> drivers/gpu/drm/i915/display/intel_fbc.h | 6 +-
> drivers/gpu/drm/i915/display/intel_fdi.c | 464 +++++++++---------
> drivers/gpu/drm/i915/display/intel_fdi.h | 16 +-
> .../gpu/drm/i915/display/intel_frontbuffer.c | 11 +-
> drivers/gpu/drm/i915/display/intel_hdmi.h | 1 -
> .../drm/i915/display/intel_modeset_verify.c | 3 +-
> drivers/gpu/drm/i915/display/intel_overlay.h | 1 -
> .../gpu/drm/i915/display/intel_pch_display.c | 35 +-
> drivers/gpu/drm/i915/display/intel_pipe_crc.h | 1 -
> drivers/gpu/drm/i915/display/intel_snps_phy.c | 75 ++-
> drivers/gpu/drm/i915/display/intel_snps_phy.h | 6 +-
> drivers/gpu/drm/i915/display/intel_tdf.h | 6 +-
> drivers/gpu/drm/i915/i915_driver.c | 4 +-
> drivers/gpu/drm/xe/display/xe_display_rps.c | 2 +-
> drivers/gpu/drm/xe/display/xe_tdf.c | 6 +-
> 36 files changed, 493 insertions(+), 546 deletions(-)
>
> --
> 2.39.5
^ permalink raw reply [flat|nested] 19+ messages in thread
* RE: [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235
2025-02-27 10:16 ` [PATCH 00/12] " Kandpal, Suraj
@ 2025-02-27 10:36 ` Jani Nikula
0 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2025-02-27 10:36 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
On Thu, 27 Feb 2025, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> -----Original Message-----
>> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> Sent: Tuesday, February 25, 2025 10:19 PM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Nikula, Jani <jani.nikula@intel.com>
>> Subject: [PATCH 00/12] drm/i915: struct intel_display conversions, part
>> 2434235
>>
>> More of the same.
>
> LGTM,
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Thanks for the review, pushed to drm-intel-next.
BR,
Jani.
> For the whole series
>
>>
>> Jani Nikula (12):
>> drm/i915/display: remove leftover struct drm_i915_private forward
>> declarations
>> drm/i915/debugfs: continue display debugfs struct intel_display
>> conversion
>> drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display
>> drm/i915/snps: convert intel_snps_phy.[ch] to struct intel_display
>> drm/i915/dkl: convert intel_dkl_phy.[ch] to struct intel_display
>> drm/i915/drrs: convert intel_drrs.[ch] to struct intel_display
>> drm/i915/display: convert the M/N functions to struct intel_display
>> drm/i915/dpt: convert intel_dpt.[ch] interfaces to struct
>> intel_display
>> drm/i915/fbc: convert intel_fbc.[ch] to struct intel_display
>> drm/i915/rps: convert intel_display_rps.[ch] to struct intel_display
>> drm/i915/ddi: convert intel_wait_ddi_buf_idle() to struct
>> intel_display
>> drm/i915/fdi: convert intel_fdi.[ch] to struct intel_display
>>
>> drivers/gpu/drm/i915/display/intel_atomic.h | 1 -
>> .../gpu/drm/i915/display/intel_atomic_plane.c | 8 +-
>> drivers/gpu/drm/i915/display/intel_ddi.c | 11 +-
>> drivers/gpu/drm/i915/display/intel_ddi.h | 4 +-
>> .../drm/i915/display/intel_ddi_buf_trans.h | 1 -
>> drivers/gpu/drm/i915/display/intel_display.c | 102 ++--
>> drivers/gpu/drm/i915/display/intel_display.h | 8 +-
>> .../drm/i915/display/intel_display_debugfs.c | 26 +-
>> .../drm/i915/display/intel_display_debugfs.h | 6 +-
>> .../drm/i915/display/intel_display_driver.c | 8 +-
>> .../drm/i915/display/intel_display_power.c | 2 +-
>> .../gpu/drm/i915/display/intel_display_rps.c | 4 +-
>> .../gpu/drm/i915/display/intel_display_rps.h | 4 +-
>> drivers/gpu/drm/i915/display/intel_dkl_phy.c | 8 +-
>> drivers/gpu/drm/i915/display/intel_dkl_phy.h | 3 +-
>> drivers/gpu/drm/i915/display/intel_dp.c | 7 +-
>> drivers/gpu/drm/i915/display/intel_dpt.c | 24 +-
>> drivers/gpu/drm/i915/display/intel_dpt.h | 7 +-
>> drivers/gpu/drm/i915/display/intel_drrs.c | 45 +-
>> drivers/gpu/drm/i915/display/intel_drrs.h | 10 +-
>> drivers/gpu/drm/i915/display/intel_fbc.c | 113 ++---
>> drivers/gpu/drm/i915/display/intel_fbc.h | 6 +-
>> drivers/gpu/drm/i915/display/intel_fdi.c | 464 +++++++++---------
>> drivers/gpu/drm/i915/display/intel_fdi.h | 16 +-
>> .../gpu/drm/i915/display/intel_frontbuffer.c | 11 +-
>> drivers/gpu/drm/i915/display/intel_hdmi.h | 1 -
>> .../drm/i915/display/intel_modeset_verify.c | 3 +-
>> drivers/gpu/drm/i915/display/intel_overlay.h | 1 -
>> .../gpu/drm/i915/display/intel_pch_display.c | 35 +-
>> drivers/gpu/drm/i915/display/intel_pipe_crc.h | 1 -
>> drivers/gpu/drm/i915/display/intel_snps_phy.c | 75 ++-
>> drivers/gpu/drm/i915/display/intel_snps_phy.h | 6 +-
>> drivers/gpu/drm/i915/display/intel_tdf.h | 6 +-
>> drivers/gpu/drm/i915/i915_driver.c | 4 +-
>> drivers/gpu/drm/xe/display/xe_display_rps.c | 2 +-
>> drivers/gpu/drm/xe/display/xe_tdf.c | 6 +-
>> 36 files changed, 493 insertions(+), 546 deletions(-)
>>
>> --
>> 2.39.5
>
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2025-02-27 10:36 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-25 16:49 [PATCH 00/12] drm/i915: struct intel_display conversions, part 2434235 Jani Nikula
2025-02-25 16:49 ` [PATCH 01/12] drm/i915/display: remove leftover struct drm_i915_private forward declarations Jani Nikula
2025-02-25 16:49 ` [PATCH 02/12] drm/i915/debugfs: continue display debugfs struct intel_display conversion Jani Nikula
2025-02-25 16:49 ` [PATCH 03/12] drm/i915/tdf: convert intel_tdf.[ch] to struct intel_display Jani Nikula
2025-02-25 16:49 ` [PATCH 04/12] drm/i915/snps: convert intel_snps_phy.[ch] " Jani Nikula
2025-02-25 16:49 ` [PATCH 05/12] drm/i915/dkl: convert intel_dkl_phy.[ch] " Jani Nikula
2025-02-25 16:49 ` [PATCH 06/12] drm/i915/drrs: convert intel_drrs.[ch] " Jani Nikula
2025-02-25 16:49 ` [PATCH 07/12] drm/i915/display: convert the M/N functions " Jani Nikula
2025-02-25 16:49 ` [PATCH 08/12] drm/i915/dpt: convert intel_dpt.[ch] interfaces " Jani Nikula
2025-02-25 16:49 ` [PATCH 09/12] drm/i915/fbc: convert intel_fbc.[ch] " Jani Nikula
2025-02-25 16:49 ` [PATCH 10/12] drm/i915/rps: convert intel_display_rps.[ch] " Jani Nikula
2025-02-25 16:49 ` [PATCH 11/12] drm/i915/ddi: convert intel_wait_ddi_buf_idle() " Jani Nikula
2025-02-25 16:49 ` [PATCH 12/12] drm/i915/fdi: convert intel_fdi.[ch] " Jani Nikula
2025-02-26 9:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: struct intel_display conversions, part 2434235 Patchwork
2025-02-26 9:12 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-02-26 9:34 ` ✓ i915.CI.BAT: success " Patchwork
2025-02-26 11:44 ` ✗ i915.CI.Full: failure " Patchwork
2025-02-27 10:16 ` [PATCH 00/12] " Kandpal, Suraj
2025-02-27 10:36 ` Jani Nikula
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).