From: Jani Nikula <jani.nikula@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 6/7] drm/i915/gt: Move engine registers to their own header
Date: Mon, 10 Jan 2022 12:59:13 +0200 [thread overview]
Message-ID: <87y23nambi.fsf@intel.com> (raw)
In-Reply-To: <20220108044055.3123418-7-matthew.d.roper@intel.com>
On Fri, 07 Jan 2022, Matt Roper <matthew.d.roper@intel.com> wrote:
> Let's start breaking up and cleaning up the massive i915_reg.h file.
> We'll start by moving all registers that are defined in relation to an
> engine base to their own header.
>
> There are probably a bunch of other "engine registers" that we haven't
> moved yet (especially those that belong to the render engine in the
> 0x2??? range), but this is a relatively straightforward first step.
>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/gen2_engine_cs.c | 1 +
> drivers/gpu/drm/i915/gt/gen6_engine_cs.c | 1 +
> drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 1 +
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 +
> drivers/gpu/drm/i915/gt/intel_engine_regs.h | 197 +++++++++++++
> .../drm/i915/gt/intel_execlists_submission.c | 1 +
> drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
> drivers/gpu/drm/i915/gt/intel_lrc.c | 1 +
> drivers/gpu/drm/i915/gt/intel_lrc_reg.h | 15 -
> drivers/gpu/drm/i915/gt/intel_rc6.c | 1 +
> drivers/gpu/drm/i915/gt/intel_reset.c | 1 +
> drivers/gpu/drm/i915/gt/intel_ring.c | 1 +
> .../gpu/drm/i915/gt/intel_ring_submission.c | 1 +
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_rps.c | 1 +
> drivers/gpu/drm/i915/gt/selftest_timeline.c | 1 +
> drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 1 +
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 3 +-
> drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 +
> drivers/gpu/drm/i915/gvt/mmio_context.c | 1 +
> drivers/gpu/drm/i915/gvt/mmio_context.h | 1 +
> drivers/gpu/drm/i915/i915_cmd_parser.c | 1 +
> drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
> drivers/gpu/drm/i915/i915_perf.c | 1 +
> drivers/gpu/drm/i915/i915_pmu.c | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 267 +-----------------
> drivers/gpu/drm/i915/i915_reg_defs.h | 98 +++++++
I think I would've liked to see this file split up as a separate prep
patch.
BR,
Jani.
> drivers/gpu/drm/i915/i915_request.c | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 1 +
> drivers/gpu/drm/i915/intel_uncore.c | 2 +-
> 32 files changed, 327 insertions(+), 281 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/gt/intel_engine_regs.h
> create mode 100644 drivers/gpu/drm/i915/i915_reg_defs.h
>
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-01-10 10:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-08 4:40 [Intel-gfx] [PATCH v2 0/7] Start cleaning up register definitions Matt Roper
2022-01-08 4:40 ` [Intel-gfx] [PATCH v2 1/7] drm/i915: Use parameterized GPR register definitions everywhere Matt Roper
2022-01-10 11:20 ` Jani Nikula
2022-01-08 4:40 ` [Intel-gfx] [PATCH v2 2/7] drm/i915: Parameterize PWRCTX_MAXCNT Matt Roper
2022-01-10 11:06 ` Jani Nikula
2022-01-08 4:40 ` [Intel-gfx] [PATCH v2 3/7] drm/i915: Parameterize ECOSKPD Matt Roper
2022-01-10 11:10 ` Jani Nikula
2022-01-08 4:40 ` [Intel-gfx] [PATCH v2 4/7] drm/i915: Use RING_PSMI_CTL rather than per-engine macros Matt Roper
2022-01-10 11:14 ` Jani Nikula
2022-01-08 4:40 ` [Intel-gfx] [PATCH v2 5/7] drm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7 Matt Roper
2022-01-10 11:15 ` Jani Nikula
2022-01-08 4:40 ` [Intel-gfx] [PATCH v2 6/7] drm/i915/gt: Move engine registers to their own header Matt Roper
2022-01-10 10:59 ` Jani Nikula [this message]
2022-01-08 4:40 ` [Intel-gfx] [PATCH v2 7/7] drm/i915: Move SNPS PHY " Matt Roper
2022-01-10 11:02 ` Jani Nikula
2022-01-10 11:03 ` Jani Nikula
2022-01-08 5:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Start cleaning up register definitions (rev2) Patchwork
2022-01-08 5:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-01-08 5:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-01-08 7:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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