From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0BF4FC433F5 for ; Thu, 2 Dec 2021 01:34:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 667E96E165; Thu, 2 Dec 2021 01:34:25 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E3276E165 for ; Thu, 2 Dec 2021 01:34:24 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10185"; a="217291216" X-IronPort-AV: E=Sophos;i="5.87,280,1631602800"; d="scan'208";a="217291216" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2021 17:34:23 -0800 X-IronPort-AV: E=Sophos;i="5.87,280,1631602800"; d="scan'208";a="512961102" Received: from adixit-mobl1.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.143.127]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Dec 2021 17:34:23 -0800 Date: Wed, 01 Dec 2021 17:34:22 -0800 Message-ID: <87y253yeld.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Anshuman Gupta In-Reply-To: <20211130132005.6305-1-anshuman.gupta@intel.com> References: <20211130132005.6305-1-anshuman.gupta@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/selftest: Disable IRQ for timestamp calculation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Chris P Wilson Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, 30 Nov 2021 05:20:05 -0800, Anshuman Gupta wrote: > > gt_pm selftest calculates engine ticks cycles and wall time > cycles by delta of respective engine elapsed TIMESTAMP and ktime > for period of 1000us. > It compares the engine ticks cycles with wall time cycles. > > Disable local cpu interrupt so that interrupt handler does not > switch out the thread during measure_clocks() and prevent > miscalculation of engine tick cycles. Reviewed-by: Ashutosh Dixit > v2: > - nuke preempt_{disable,enable}, as disable_local_irq() > disable the preemption. (Chris) > > Cc: Chris P Wilson > Cc: Badal Nilawar > Cc: Ashutosh Dixit > Signed-off-by: Anshuman Gupta > --- > drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c > index b9441217ca3d..55c5cdb99f45 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c > +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c > @@ -43,7 +43,7 @@ static void measure_clocks(struct intel_engine_cs *engine, > int i; > > for (i = 0; i < 5; i++) { > - preempt_disable(); > + local_irq_disable(); > cycles[i] = -ENGINE_READ_FW(engine, RING_TIMESTAMP); > dt[i] = ktime_get(); > > @@ -51,7 +51,7 @@ static void measure_clocks(struct intel_engine_cs *engine, > > dt[i] = ktime_sub(ktime_get(), dt[i]); > cycles[i] += ENGINE_READ_FW(engine, RING_TIMESTAMP); > - preempt_enable(); > + local_irq_enable(); > } > > /* Use the median of both cycle/dt; close enough */ > -- > 2.26.2 >