From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [Intel-gfx] [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered Date: Fri, 27 Oct 2017 13:25:01 +0300 Message-ID: <87y3nwevlu.fsf@intel.com> References: <87r2wiirwl.fsf@intel.com> <1502475008-2035-1-git-send-email-dhinakaran.pandiyan@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Harry Wentland , Dhinakaran Pandiyan , intel-gfx@lists.freedesktop.org Cc: Dhinakaran Pandiyan , dri-devel@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gTW9uLCAxNCBBdWcgMjAxNywgSGFycnkgV2VudGxhbmQgPGhhcnJ5LndlbnRsYW5kQGFtZC5j b20+IHdyb3RlOgo+IE9uIDIwMTctMDgtMTEgMDI6MTAgUE0sIERoaW5ha2FyYW4gUGFuZGl5YW4g d3JvdGU6Cj4+IERQQ0QgNjAwaCAtIFNFVF9QT1dFUiAmIFNFVF9EUF9QV1JfVk9MVEFHRSBkZWZp bmVzIHBvd2VyIHN0YXRlCj4+IAo+PiAxMDEgPSBTZXQgTWFpbi1MaW5rIGZvciBsb2NhbCBTaW5r IGRldmljZSBhbmQgYWxsIGRvd25zdHJlYW0gU2luawo+PiBkZXZpY2VzIHRvIEQzIChwb3dlci1k b3duIG1vZGUpLCBrZWVwIEFVWCBibG9jayBmdWxseSBwb3dlcmVkLCByZWFkeSB0bwo+PiByZXBs eSB3aXRoaW4gYSBSZXNwb25zZSBUaW1lb3V0IHBlcmlvZCBvZiAzMDB1cy4KPj4gCj4+IFRoaXMg c3RhdGUgaXMgdXNlZnVsIGluIGEgTVNUIGRvY2sgKyBNU1QgbW9uaXRvciBjb25maWd1cmF0aW9u IHRoYXQKPj4gZG9lc24ndCB3YWtlIHVwIGZyb20gRDMgc3RhdGUuCj4+IAo+PiB2MjogVXNlIHNw YWNlcyBpbnN0ZWFkIG9mIHRhYnMgKEphbmkpCj4+IAo+PiBTaWduZWQtb2ZmLWJ5OiBEaGluYWth cmFuIFBhbmRpeWFuIDxkaGluYWthcmFuLnBhbmRpeWFuQGludGVsLmNvbT4KPgo+IFJldmlld2Vk LWJ5OiBIYXJyeSBXZW50bGFuZCA8aGFycnkud2VudGxhbmRAYW1kLmNvbT4KClB1c2hlZCB0aGlz IG9uZSB0byBkcm0tbWlzYy1uZXh0LCB0aGFua3MgZm9yIHRoZSBwYXRjaCBhbmQgcmV2aWV3LCBh bmQKc29ycnkgZm9yIHRoZSBkZWxheS4KCkJSLApKYW5pLgoKPgo+IEhhcnJ5Cj4KPj4gLS0tCj4+ ICBpbmNsdWRlL2RybS9kcm1fZHBfaGVscGVyLmggfCAxICsKPj4gIDEgZmlsZSBjaGFuZ2VkLCAx IGluc2VydGlvbigrKQo+PiAKPj4gZGlmZiAtLWdpdCBhL2luY2x1ZGUvZHJtL2RybV9kcF9oZWxw ZXIuaCBiL2luY2x1ZGUvZHJtL2RybV9kcF9oZWxwZXIuaAo+PiBpbmRleCBiMTc0NzZhLi40N2E2 Y2RiIDEwMDY0NAo+PiAtLS0gYS9pbmNsdWRlL2RybS9kcm1fZHBfaGVscGVyLmgKPj4gKysrIGIv aW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCj4+IEBAIC02MTgsNiArNjE4LDcgQEAKPj4gICMg ZGVmaW5lIERQX1NFVF9QT1dFUl9EMCAgICAgICAgICAgICAgICAgICAgMHgxCj4+ICAjIGRlZmlu ZSBEUF9TRVRfUE9XRVJfRDMgICAgICAgICAgICAgICAgICAgIDB4Mgo+PiAgIyBkZWZpbmUgRFBf U0VUX1BPV0VSX01BU0sgICAgICAgICAgICAgICAgICAweDMKPj4gKyMgZGVmaW5lIERQX1NFVF9Q T1dFUl9EM19BVVhfT04gICAgICAgICAgICAgMHg1Cj4+ICAKPj4gICNkZWZpbmUgRFBfRURQX0RQ Q0RfUkVWCQkJICAgIDB4NzAwICAgIC8qIGVEUCAxLjIgKi8KPj4gICMgZGVmaW5lIERQX0VEUF8x MQkJCSAgICAweDAwCj4+IAo+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCj4gSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdAo+IEludGVsLWdmeEBsaXN0cy5mcmVl ZGVza3RvcC5vcmcKPiBodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3Rp bmZvL2ludGVsLWdmeAoKLS0gCkphbmkgTmlrdWxhLCBJbnRlbCBPcGVuIFNvdXJjZSBUZWNobm9s b2d5IENlbnRlcgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f XwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcK aHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK