* Re: [PATCH] drm: add fourcc codes for 16bit R and GR
2017-01-03 16:56 ` [PATCH] drm: add fourcc codes for 16bit R and GR Rainer Hochecker
@ 2017-01-03 18:21 ` Eric Engestrom
2017-01-03 19:02 ` [PATCH v2] " Rainer Hochecker
` (5 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Eric Engestrom @ 2017-01-03 18:21 UTC (permalink / raw)
To: Rainer Hochecker
Cc: Ben Widawsky, intel-gfx, linux-kernel,
dri-devel@lists.freedesktop.org, Rainer Hochecker
On Tuesday, 2017-01-03 17:56:10 +0100, Rainer Hochecker wrote:
> On Mon, Jan 2, 2017 at 3:31 PM, Rainer Hochecker <fernetmenta@kodi.tv> wrote:
> >
> > I chose GR16 because that matches with Mesa texture formats. Unfortunately
> > RG16 is already taken by DRM_FORMAT_RGB565
> > So GR32 / RG32 might be better. All other codes in fourcc.h seem to sum up
> > all planes.
> >
> > (sorry, gmail included some html links on last attempt)
> >
> > On Mon, Jan 2, 2017 at 3:05 PM, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> >>
> >> On Mon, Jan 02, 2017 at 01:23:23PM +0100, David Herrmann wrote:
> >> > Hi
> >> >
> >> > On Mon, Jan 2, 2017 at 11:41 AM, Rainer Hochecker <fernetmenta@kodi.tv> wrote:
> >> > > From: Rainer Hochecker <fernetmenta@online.de>
> >> > >
> >> > > Add fourcc codes for 16bit planes. Required by mesa for
> >> > > eglCreateImageKHR to access P010 surfaces created by vaapi.
> >> > >
> >> > > Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> >> > > ---
> >> > > include/uapi/drm/drm_fourcc.h | 6 ++++++
> >> > > 1 file changed, 6 insertions(+)
> >> > >
> >> > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> >> > > index a5890bf..e6ab638 100644
> >> > > --- a/include/uapi/drm/drm_fourcc.h
> >> > > +++ b/include/uapi/drm/drm_fourcc.h
> >> > > @@ -41,10 +41,16 @@ extern "C" {
> >> > > /* 8 bpp Red */
> >> > > #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
> >> > >
> >> > > +/* 16 bpp Red */
> >> > > +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
> >> > > +
> >> > > /* 16 bpp RG */
> >> > > #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> >> > > #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
> >> > >
> >> > > +/* 32 bpp GR */
> >> > > +#define DRM_FORMAT_GR16 fourcc_code('G', 'R', '1', '6') /* [31:0] G:R 16:16 little endian */
> >> > > +
> >> >
> >> > Shouldn't it be 'G', 'R', '3', '2'?
> >>
> >> The name should be _GR1616. Using GR16 for the fourcc seems OK to me
> >> since we can't fit in the full GR1616 in there. Althogh GR32 could work
> >> too I suppose.
> >>
> >> And what about RG16?
> >>
> >> >
> >> > Also, please put dri-devel on CC.
> >> >
> >> > Thanks
> >> > David
> >> >
> >> > > /* 8 bpp RGB */
> >> > > #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> >> > > #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> >> > > --
> >> > > 2.9.3
> >> > >
> >> > _______________________________________________
> >> > dri-devel mailing list
> >> > dri-devel@lists.freedesktop.org
> >> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> >>
> >> --
> >> Ville Syrjälä
> >> Intel OTC
> >
> >
>
> Updated patch as suggested by Ville Syrjälä
>
You shouldn't send patches using Gmail's web interface: it completely
disregards formatting, breaking any machine-readable text. This patch is
unusable :(
It is usually recommended to send patches using `git send-email`, eg.:
git send-email \
--in-reply-to CAH0Sn6HhaJmFBz5nsfUD7t0xca8=42+5+ia+qG6oQzevX_NCWg@mail.gmail.com \
0001-drm-add-fourcc-codes-for-16bit-R-and-GR.patch
`--in-reply-to` keeps the threads together. You can find the ID of the
message you want to reply to in the "Message-ID:" header
You might also want to use `-v2` when formatting the patches
(`git format-patch -vX`); this lets reviewers follow your revisions by
adjusting the subject of the mail :)
Cheers,
Eric
>
> From 29e74ff96e0b7c7a11d1b4131891b83adde621c1 Mon Sep 17 00:00:00 2001
>
> From: Rainer Hochecker <fernetmenta@online.de>
>
> Date: Mon, 2 Jan 2017 11:25:18 +0100
>
> Subject: [PATCH] drm: add fourcc codes for 16bit R and GR
>
>
> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
>
> ---
>
> include/uapi/drm/drm_fourcc.h | 7 +++++++
>
> 1 file changed, 7 insertions(+)
>
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
>
> index a5890bf..f1ef9cb 100644
>
> --- a/include/uapi/drm/drm_fourcc.h
>
> +++ b/include/uapi/drm/drm_fourcc.h
>
> @@ -41,10 +41,17 @@ extern "C" {
>
> /* 8 bpp Red */
>
> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>
>
>
> +/* 16 bpp Red */
>
> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
>
> +
>
> /* 16 bpp RG */
>
> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G
> 8:8 little endian */
>
> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R
> 8:8 little endian */
>
>
>
> +/* 32 bpp GR */
>
> +#define DRM_FORMAT_RG32 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R
> 16:16 little endian */
>
> +#define DRM_FORMAT_GR32 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R
> 16:16 little endian */
>
> +
>
> /* 8 bpp RGB */
>
> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0]
> R:G:B 3:3:2 */
>
> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0]
> B:G:R 2:3:3 */
>
> --
>
> 2.9.3
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH v2] drm: add fourcc codes for 16bit R and GR
2017-01-03 16:56 ` [PATCH] drm: add fourcc codes for 16bit R and GR Rainer Hochecker
2017-01-03 18:21 ` Eric Engestrom
@ 2017-01-03 19:02 ` Rainer Hochecker
2017-01-04 8:52 ` Daniel Vetter
2017-01-04 9:23 ` ✓ Fi.CI.BAT: success for " Patchwork
` (4 subsequent siblings)
6 siblings, 1 reply; 20+ messages in thread
From: Rainer Hochecker @ 2017-01-03 19:02 UTC (permalink / raw)
To: Eric.Engestrom
Cc: ville.syrjala, ben, intel-gfx, daniel, fernetmenta, linux-kernel,
dri-devel
From: Rainer Hochecker <fernetmenta@online.de>
Now sent with git send-email:
Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
---
include/uapi/drm/drm_fourcc.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..f1ef9cb 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
+/* 32 bpp GR */
+#define DRM_FORMAT_RG32 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
+#define DRM_FORMAT_GR32 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
--
2.9.3
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v2] drm: add fourcc codes for 16bit R and GR
2017-01-03 19:02 ` [PATCH v2] " Rainer Hochecker
@ 2017-01-04 8:52 ` Daniel Vetter
2017-01-04 9:06 ` Jani Nikula
0 siblings, 1 reply; 20+ messages in thread
From: Daniel Vetter @ 2017-01-04 8:52 UTC (permalink / raw)
To: Rainer Hochecker
Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta,
Eric.Engestrom
On Tue, Jan 03, 2017 at 08:02:07PM +0100, Rainer Hochecker wrote:
> From: Rainer Hochecker <fernetmenta@online.de>
>
> Now sent with git send-email:
>
> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> ---
> include/uapi/drm/drm_fourcc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index a5890bf..f1ef9cb 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -41,10 +41,17 @@ extern "C" {
> /* 8 bpp Red */
> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>
> +/* 16 bpp Red */
> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
> +
> /* 16 bpp RG */
> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>
> +/* 32 bpp GR */
> +#define DRM_FORMAT_RG32 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
> +#define DRM_FORMAT_GR32 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
Now the define's name is inconsistent, since that would suggest a 5 bpp
format with 3 bits for R and 2 bits for G. I think what we want here for
consistency is _RG16_16 and _GR16_16, along the lines of what Ville
suggested.
Sorry that this is such a bikeshed heaven ;-)
-Daniel
> +
> /* 8 bpp RGB */
> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> --
> 2.9.3
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v2] drm: add fourcc codes for 16bit R and GR
2017-01-04 8:52 ` Daniel Vetter
@ 2017-01-04 9:06 ` Jani Nikula
2017-01-04 10:19 ` Eric Engestrom
0 siblings, 1 reply; 20+ messages in thread
From: Jani Nikula @ 2017-01-04 9:06 UTC (permalink / raw)
To: Daniel Vetter, Rainer Hochecker
Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta,
Eric.Engestrom
On Wed, 04 Jan 2017, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Tue, Jan 03, 2017 at 08:02:07PM +0100, Rainer Hochecker wrote:
>> From: Rainer Hochecker <fernetmenta@online.de>
>>
>> Now sent with git send-email:
>>
>> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
>> ---
>> include/uapi/drm/drm_fourcc.h | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
>> index a5890bf..f1ef9cb 100644
>> --- a/include/uapi/drm/drm_fourcc.h
>> +++ b/include/uapi/drm/drm_fourcc.h
>> @@ -41,10 +41,17 @@ extern "C" {
>> /* 8 bpp Red */
>> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>>
>> +/* 16 bpp Red */
>> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
>> +
>> /* 16 bpp RG */
>> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
>> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>>
>> +/* 32 bpp GR */
>> +#define DRM_FORMAT_RG32 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
>> +#define DRM_FORMAT_GR32 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
>
> Now the define's name is inconsistent, since that would suggest a 5 bpp
> format with 3 bits for R and 2 bits for G. I think what we want here for
> consistency is _RG16_16 and _GR16_16, along the lines of what Ville
> suggested.
>
> Sorry that this is such a bikeshed heaven ;-)
If there's going to be another version, please fix the commit message
while at it. "Now sent with git send-email" is useless for posterity.
BR,
Jani.
> -Daniel
>
>> +
>> /* 8 bpp RGB */
>> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
>> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
>> --
>> 2.9.3
>>
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v2] drm: add fourcc codes for 16bit R and GR
2017-01-04 9:06 ` Jani Nikula
@ 2017-01-04 10:19 ` Eric Engestrom
0 siblings, 0 replies; 20+ messages in thread
From: Eric Engestrom @ 2017-01-04 10:19 UTC (permalink / raw)
To: Rainer Hochecker; +Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta
On Wednesday, 2017-01-04 11:06:09 +0200, Jani Nikula wrote:
> On Wed, 04 Jan 2017, Daniel Vetter <daniel@ffwll.ch> wrote:
> > On Tue, Jan 03, 2017 at 08:02:07PM +0100, Rainer Hochecker wrote:
> >> From: Rainer Hochecker <fernetmenta@online.de>
> >>
> >> Now sent with git send-email:
> >>
> >> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> >> ---
> >> include/uapi/drm/drm_fourcc.h | 7 +++++++
> >> 1 file changed, 7 insertions(+)
> >>
> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> >> index a5890bf..f1ef9cb 100644
> >> --- a/include/uapi/drm/drm_fourcc.h
> >> +++ b/include/uapi/drm/drm_fourcc.h
> >> @@ -41,10 +41,17 @@ extern "C" {
> >> /* 8 bpp Red */
> >> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
> >>
> >> +/* 16 bpp Red */
> >> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
> >> +
> >> /* 16 bpp RG */
> >> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> >> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
> >>
> >> +/* 32 bpp GR */
> >> +#define DRM_FORMAT_RG32 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
Also, s/G:R/R:G/ in the comment above :)
> >> +#define DRM_FORMAT_GR32 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
> >
> > Now the define's name is inconsistent, since that would suggest a 5 bpp
> > format with 3 bits for R and 2 bits for G. I think what we want here for
> > consistency is _RG16_16 and _GR16_16, along the lines of what Ville
> > suggested.
> >
> > Sorry that this is such a bikeshed heaven ;-)
>
> If there's going to be another version, please fix the commit message
> while at it. "Now sent with git send-email" is useless for posterity.
>
> BR,
> Jani.
>
>
> > -Daniel
> >
> >> +
> >> /* 8 bpp RGB */
> >> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> >> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> >> --
> >> 2.9.3
> >>
>
> --
> Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Fi.CI.BAT: success for drm: add fourcc codes for 16bit R and GR
2017-01-03 16:56 ` [PATCH] drm: add fourcc codes for 16bit R and GR Rainer Hochecker
2017-01-03 18:21 ` Eric Engestrom
2017-01-03 19:02 ` [PATCH v2] " Rainer Hochecker
@ 2017-01-04 9:23 ` Patchwork
2017-01-04 13:45 ` [PATCH v3] drm: add fourcc codes for 16bit R and RG Rainer Hochecker
` (3 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2017-01-04 9:23 UTC (permalink / raw)
To: Rainer Hochecker; +Cc: intel-gfx
== Series Details ==
Series: drm: add fourcc codes for 16bit R and GR
URL : https://patchwork.freedesktop.org/series/17471/
State : success
== Summary ==
Series 17471v1 drm: add fourcc codes for 16bit R and GR
https://patchwork.freedesktop.org/api/1.0/series/17471/revisions/1/mbox/
fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12
fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27
fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-skl-6700hq total:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20
fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21
fi-skl-6770hq total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32
47cdc87bc9856ca063e65af0c427bd875c1c3c36 drm-tip: 2017y-01m-03d-20h-53m-04s UTC integration manifest
55e0be9 drm: add fourcc codes for 16bit R and GR
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3427/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH v3] drm: add fourcc codes for 16bit R and RG
2017-01-03 16:56 ` [PATCH] drm: add fourcc codes for 16bit R and GR Rainer Hochecker
` (2 preceding siblings ...)
2017-01-04 9:23 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-01-04 13:45 ` Rainer Hochecker
2017-01-04 13:50 ` [PATCH v4] " Rainer Hochecker
` (2 subsequent siblings)
6 siblings, 0 replies; 20+ messages in thread
From: Rainer Hochecker @ 2017-01-04 13:45 UTC (permalink / raw)
To: daniel; +Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta
From: Rainer Hochecker <fernetmenta@online.de>
This adds fourcc codes for 16bit planes required for DRM buffer
export to mesa.
Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
---
include/uapi/drm/drm_fourcc.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..85079cd 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
+/* 32 bpp GR */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
--
2.9.3
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v4] drm: add fourcc codes for 16bit R and RG
2017-01-03 16:56 ` [PATCH] drm: add fourcc codes for 16bit R and GR Rainer Hochecker
` (3 preceding siblings ...)
2017-01-04 13:45 ` [PATCH v3] drm: add fourcc codes for 16bit R and RG Rainer Hochecker
@ 2017-01-04 13:50 ` Rainer Hochecker
2017-01-04 18:04 ` Eric Engestrom
2017-01-04 18:53 ` ✗ Fi.CI.BAT: failure for drm: add fourcc codes for 16bit R and RG (rev2) Patchwork
2017-01-04 19:15 ` ✓ Fi.CI.BAT: success for drm: add fourcc codes for 16bit R and RG (rev3) Patchwork
6 siblings, 1 reply; 20+ messages in thread
From: Rainer Hochecker @ 2017-01-04 13:50 UTC (permalink / raw)
To: eric.engestrom
Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta, fernetmenta
From: Rainer Hochecker <fernetmenta@online.de>
Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
---
include/uapi/drm/drm_fourcc.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..4d65fb6 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
+/* 32 bpp RG */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
--
2.9.3
_______________________________________________
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^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v4] drm: add fourcc codes for 16bit R and RG
2017-01-04 13:50 ` [PATCH v4] " Rainer Hochecker
@ 2017-01-04 18:04 ` Eric Engestrom
2017-01-04 18:24 ` [PATCH v5] " Rainer Hochecker
0 siblings, 1 reply; 20+ messages in thread
From: Eric Engestrom @ 2017-01-04 18:04 UTC (permalink / raw)
To: Rainer Hochecker; +Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta
On Wednesday, 2017-01-04 14:50:02 +0100, Rainer Hochecker wrote:
> From: Rainer Hochecker <fernetmenta@online.de>
>
> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> ---
> include/uapi/drm/drm_fourcc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index a5890bf..4d65fb6 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -41,10 +41,17 @@ extern "C" {
> /* 8 bpp Red */
> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>
> +/* 16 bpp Red */
> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
> +
> /* 16 bpp RG */
> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>
> +/* 32 bpp RG */
> +#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] G:R 16:16 little endian */
Comment above is still wrong: s/G:R/R:G/ :)
> +#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
> +
> /* 8 bpp RGB */
> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> --
> 2.9.3
>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH v5] drm: add fourcc codes for 16bit R and RG
2017-01-04 18:04 ` Eric Engestrom
@ 2017-01-04 18:24 ` Rainer Hochecker
2017-01-04 18:28 ` Ville Syrjälä
0 siblings, 1 reply; 20+ messages in thread
From: Rainer Hochecker @ 2017-01-04 18:24 UTC (permalink / raw)
To: eric.engestrom
Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta, fernetmenta
From: Rainer Hochecker <fernetmenta@online.de>
Thanks for bearing with me. My ml skills have greatly improved now :)
v5 of patch:
This adds fourcc codes for 16bit planes required for DRM buffer
export to mesa.
Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
---
include/uapi/drm/drm_fourcc.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..e7f6bcd 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
+/* 32 bpp RG */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
--
2.9.3
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v5] drm: add fourcc codes for 16bit R and RG
2017-01-04 18:24 ` [PATCH v5] " Rainer Hochecker
@ 2017-01-04 18:28 ` Ville Syrjälä
2017-01-04 18:38 ` [PATCH v6] " Rainer Hochecker
0 siblings, 1 reply; 20+ messages in thread
From: Ville Syrjälä @ 2017-01-04 18:28 UTC (permalink / raw)
To: Rainer Hochecker; +Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta
On Wed, Jan 04, 2017 at 07:24:09PM +0100, Rainer Hochecker wrote:
> From: Rainer Hochecker <fernetmenta@online.de>
>
> Thanks for bearing with me. My ml skills have greatly improved now :)
>
> v5 of patch:
>
> This adds fourcc codes for 16bit planes required for DRM buffer
> export to mesa.
>
> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> ---
> include/uapi/drm/drm_fourcc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index a5890bf..e7f6bcd 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -41,10 +41,17 @@ extern "C" {
> /* 8 bpp Red */
> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>
> +/* 16 bpp Red */
> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R */
little endian
> +
> /* 16 bpp RG */
> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>
> +/* 32 bpp RG */
> +#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
> +#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
> +
> /* 8 bpp RGB */
> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> --
> 2.9.3
--
Ville Syrjälä
Intel OTC
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 20+ messages in thread* [PATCH v6] drm: add fourcc codes for 16bit R and RG
2017-01-04 18:28 ` Ville Syrjälä
@ 2017-01-04 18:38 ` Rainer Hochecker
2017-01-05 11:37 ` Ville Syrjälä
0 siblings, 1 reply; 20+ messages in thread
From: Rainer Hochecker @ 2017-01-04 18:38 UTC (permalink / raw)
To: ville.syrjala
Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta, fernetmenta,
eric.engestrom
From: Rainer Hochecker <fernetmenta@online.de>
This adds fourcc codes for 16bit planes required for DRM buffer
export to mesa.
Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
---
include/uapi/drm/drm_fourcc.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index a5890bf..d230e58 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -41,10 +41,17 @@ extern "C" {
/* 8 bpp Red */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
+/* 16 bpp Red */
+#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
+
/* 16 bpp RG */
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
+/* 32 bpp RG */
+#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
+#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
+
/* 8 bpp RGB */
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
--
2.9.3
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v6] drm: add fourcc codes for 16bit R and RG
2017-01-04 18:38 ` [PATCH v6] " Rainer Hochecker
@ 2017-01-05 11:37 ` Ville Syrjälä
2017-01-05 13:45 ` Christian König
0 siblings, 1 reply; 20+ messages in thread
From: Ville Syrjälä @ 2017-01-05 11:37 UTC (permalink / raw)
To: Rainer Hochecker
Cc: ben, intel-gfx, linux-kernel, dri-devel, fernetmenta,
eric.engestrom
On Wed, Jan 04, 2017 at 07:38:55PM +0100, Rainer Hochecker wrote:
> From: Rainer Hochecker <fernetmenta@online.de>
>
> This adds fourcc codes for 16bit planes required for DRM buffer
> export to mesa.
>
> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> include/uapi/drm/drm_fourcc.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index a5890bf..d230e58 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -41,10 +41,17 @@ extern "C" {
> /* 8 bpp Red */
> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>
> +/* 16 bpp Red */
> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
> +
> /* 16 bpp RG */
> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>
> +/* 32 bpp RG */
> +#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
> +#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
> +
> /* 8 bpp RGB */
> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> --
> 2.9.3
--
Ville Syrjälä
Intel OTC
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v6] drm: add fourcc codes for 16bit R and RG
2017-01-05 11:37 ` Ville Syrjälä
@ 2017-01-05 13:45 ` Christian König
2017-01-11 15:05 ` Ville Syrjälä
0 siblings, 1 reply; 20+ messages in thread
From: Christian König @ 2017-01-05 13:45 UTC (permalink / raw)
To: Ville Syrjälä, Rainer Hochecker
Cc: fernetmenta, ben, intel-gfx, dri-devel, linux-kernel
Am 05.01.2017 um 12:37 schrieb Ville Syrjälä:
> On Wed, Jan 04, 2017 at 07:38:55PM +0100, Rainer Hochecker wrote:
>> From: Rainer Hochecker <fernetmenta@online.de>
>>
>> This adds fourcc codes for 16bit planes required for DRM buffer
>> export to mesa.
>>
>> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Good to see some work landing on that part, patch is Acked-by: Christian
König <christian.koenig@amd.com>.
>
>> ---
>> include/uapi/drm/drm_fourcc.h | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
>> index a5890bf..d230e58 100644
>> --- a/include/uapi/drm/drm_fourcc.h
>> +++ b/include/uapi/drm/drm_fourcc.h
>> @@ -41,10 +41,17 @@ extern "C" {
>> /* 8 bpp Red */
>> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>>
>> +/* 16 bpp Red */
>> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
>> +
>> /* 16 bpp RG */
>> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
>> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>>
>> +/* 32 bpp RG */
>> +#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
>> +#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
>> +
>> /* 8 bpp RGB */
>> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
>> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
>> --
>> 2.9.3
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v6] drm: add fourcc codes for 16bit R and RG
2017-01-05 13:45 ` Christian König
@ 2017-01-11 15:05 ` Ville Syrjälä
2017-01-11 15:44 ` Ben Widawsky
0 siblings, 1 reply; 20+ messages in thread
From: Ville Syrjälä @ 2017-01-11 15:05 UTC (permalink / raw)
To: Christian König
Cc: ben, intel-gfx, linux-kernel, dri-devel, Rainer Hochecker,
fernetmenta
On Thu, Jan 05, 2017 at 02:45:37PM +0100, Christian König wrote:
> Am 05.01.2017 um 12:37 schrieb Ville Syrjälä:
> > On Wed, Jan 04, 2017 at 07:38:55PM +0100, Rainer Hochecker wrote:
> >> From: Rainer Hochecker <fernetmenta@online.de>
> >>
> >> This adds fourcc codes for 16bit planes required for DRM buffer
> >> export to mesa.
> >>
> >> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Good to see some work landing on that part, patch is Acked-by: Christian
> König <christian.koenig@amd.com>.
Has the userspace side of this been reviewed already?
/me wonders if it's safe to push this...
>
> >
> >> ---
> >> include/uapi/drm/drm_fourcc.h | 7 +++++++
> >> 1 file changed, 7 insertions(+)
> >>
> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> >> index a5890bf..d230e58 100644
> >> --- a/include/uapi/drm/drm_fourcc.h
> >> +++ b/include/uapi/drm/drm_fourcc.h
> >> @@ -41,10 +41,17 @@ extern "C" {
> >> /* 8 bpp Red */
> >> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
> >>
> >> +/* 16 bpp Red */
> >> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
> >> +
> >> /* 16 bpp RG */
> >> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> >> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
> >>
> >> +/* 32 bpp RG */
> >> +#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
> >> +#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
> >> +
> >> /* 8 bpp RGB */
> >> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> >> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> >> --
> >> 2.9.3
>
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v6] drm: add fourcc codes for 16bit R and RG
2017-01-11 15:05 ` Ville Syrjälä
@ 2017-01-11 15:44 ` Ben Widawsky
2017-01-11 16:41 ` Ville Syrjälä
0 siblings, 1 reply; 20+ messages in thread
From: Ben Widawsky @ 2017-01-11 15:44 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, linux-kernel, dri-devel, Rainer Hochecker, fernetmenta
On 17-01-11 17:05:04, Ville Syrjälä wrote:
>On Thu, Jan 05, 2017 at 02:45:37PM +0100, Christian König wrote:
>> Am 05.01.2017 um 12:37 schrieb Ville Syrjälä:
>> > On Wed, Jan 04, 2017 at 07:38:55PM +0100, Rainer Hochecker wrote:
>> >> From: Rainer Hochecker <fernetmenta@online.de>
>> >>
>> >> This adds fourcc codes for 16bit planes required for DRM buffer
>> >> export to mesa.
>> >>
>> >> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
>> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Good to see some work landing on that part, patch is Acked-by: Christian
>> König <christian.koenig@amd.com>.
>
>Has the userspace side of this been reviewed already?
>
>/me wonders if it's safe to push this...
>
I acked the mesa side, and Rainer sent a version 2 which also looked fine to me.
Let me bump that thread...
>>
>> >
>> >> ---
>> >> include/uapi/drm/drm_fourcc.h | 7 +++++++
>> >> 1 file changed, 7 insertions(+)
>> >>
>> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
>> >> index a5890bf..d230e58 100644
>> >> --- a/include/uapi/drm/drm_fourcc.h
>> >> +++ b/include/uapi/drm/drm_fourcc.h
>> >> @@ -41,10 +41,17 @@ extern "C" {
>> >> /* 8 bpp Red */
>> >> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
>> >>
>> >> +/* 16 bpp Red */
>> >> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
>> >> +
>> >> /* 16 bpp RG */
>> >> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
>> >> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
>> >>
>> >> +/* 32 bpp RG */
>> >> +#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
>> >> +#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
>> >> +
>> >> /* 8 bpp RGB */
>> >> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
>> >> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
>> >> --
>> >> 2.9.3
>>
>
>--
>Ville Syrjälä
>Intel OTC
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^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH v6] drm: add fourcc codes for 16bit R and RG
2017-01-11 15:44 ` Ben Widawsky
@ 2017-01-11 16:41 ` Ville Syrjälä
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjälä @ 2017-01-11 16:41 UTC (permalink / raw)
To: Ben Widawsky
Cc: Christian König, Rainer Hochecker, intel-gfx, linux-kernel,
dri-devel, fernetmenta
On Wed, Jan 11, 2017 at 07:44:05AM -0800, Ben Widawsky wrote:
> On 17-01-11 17:05:04, Ville Syrjälä wrote:
> >On Thu, Jan 05, 2017 at 02:45:37PM +0100, Christian König wrote:
> >> Am 05.01.2017 um 12:37 schrieb Ville Syrjälä:
> >> > On Wed, Jan 04, 2017 at 07:38:55PM +0100, Rainer Hochecker wrote:
> >> >> From: Rainer Hochecker <fernetmenta@online.de>
> >> >>
> >> >> This adds fourcc codes for 16bit planes required for DRM buffer
> >> >> export to mesa.
> >> >>
> >> >> Signed-off-by: Rainer Hochecker <fernetmenta@online.de>
> >> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Good to see some work landing on that part, patch is Acked-by: Christian
> >> König <christian.koenig@amd.com>.
> >
> >Has the userspace side of this been reviewed already?
> >
> >/me wonders if it's safe to push this...
> >
>
> I acked the mesa side, and Rainer sent a version 2 which also looked fine to me.
> Let me bump that thread...
Thanks everyone. I've pushed this patch to drm-misc-next.
>
> >>
> >> >
> >> >> ---
> >> >> include/uapi/drm/drm_fourcc.h | 7 +++++++
> >> >> 1 file changed, 7 insertions(+)
> >> >>
> >> >> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> >> >> index a5890bf..d230e58 100644
> >> >> --- a/include/uapi/drm/drm_fourcc.h
> >> >> +++ b/include/uapi/drm/drm_fourcc.h
> >> >> @@ -41,10 +41,17 @@ extern "C" {
> >> >> /* 8 bpp Red */
> >> >> #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
> >> >>
> >> >> +/* 16 bpp Red */
> >> >> +#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
> >> >> +
> >> >> /* 16 bpp RG */
> >> >> #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
> >> >> #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
> >> >>
> >> >> +/* 32 bpp RG */
> >> >> +#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
> >> >> +#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
> >> >> +
> >> >> /* 8 bpp RGB */
> >> >> #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
> >> >> #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
> >> >> --
> >> >> 2.9.3
> >>
> >
> >--
> >Ville Syrjälä
> >Intel OTC
--
Ville Syrjälä
Intel OTC
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✗ Fi.CI.BAT: failure for drm: add fourcc codes for 16bit R and RG (rev2)
2017-01-03 16:56 ` [PATCH] drm: add fourcc codes for 16bit R and GR Rainer Hochecker
` (4 preceding siblings ...)
2017-01-04 13:50 ` [PATCH v4] " Rainer Hochecker
@ 2017-01-04 18:53 ` Patchwork
2017-01-04 19:15 ` ✓ Fi.CI.BAT: success for drm: add fourcc codes for 16bit R and RG (rev3) Patchwork
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2017-01-04 18:53 UTC (permalink / raw)
To: Rainer Hochecker; +Cc: intel-gfx
== Series Details ==
Series: drm: add fourcc codes for 16bit R and RG (rev2)
URL : https://patchwork.freedesktop.org/series/17471/
State : failure
== Summary ==
Series 17471v2 drm: add fourcc codes for 16bit R and RG
https://patchwork.freedesktop.org/api/1.0/series/17471/revisions/2/mbox/
Test gem_sync:
Subgroup basic-store-all:
pass -> FAIL (fi-ivb-3770)
Test pm_rpm:
Subgroup basic-pci-d3-state:
pass -> INCOMPLETE (fi-byt-n2820)
fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27
fi-byt-n2820 total:214 pass:182 dwarn:0 dfail:0 fail:0 skip:31
fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-ivb-3770 total:246 pass:224 dwarn:0 dfail:0 fail:1 skip:21
fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-skl-6700hq total:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20
fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21
fi-skl-6770hq total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
ea0500897bf72bbbf6eca6e695c9d49289dfc768 drm-tip: 2017y-01m-04d-16h-46m-35s UTC integration manifest
a08b183 drm: add fourcc codes for 16bit R and RG
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3433/
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Fi.CI.BAT: success for drm: add fourcc codes for 16bit R and RG (rev3)
2017-01-03 16:56 ` [PATCH] drm: add fourcc codes for 16bit R and GR Rainer Hochecker
` (5 preceding siblings ...)
2017-01-04 18:53 ` ✗ Fi.CI.BAT: failure for drm: add fourcc codes for 16bit R and RG (rev2) Patchwork
@ 2017-01-04 19:15 ` Patchwork
6 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2017-01-04 19:15 UTC (permalink / raw)
To: Rainer Hochecker; +Cc: intel-gfx
== Series Details ==
Series: drm: add fourcc codes for 16bit R and RG (rev3)
URL : https://patchwork.freedesktop.org/series/17471/
State : success
== Summary ==
Series 17471v3 drm: add fourcc codes for 16bit R and RG
https://patchwork.freedesktop.org/api/1.0/series/17471/revisions/3/mbox/
fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39
fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27
fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19
fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-skl-6700hq total:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20
fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21
fi-skl-6770hq total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13
fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-byt-n2820 failed to collect. IGT log at Patchwork_3434/fi-byt-n2820/igt.log
ea0500897bf72bbbf6eca6e695c9d49289dfc768 drm-tip: 2017y-01m-04d-16h-46m-35s UTC integration manifest
94b6499 drm: add fourcc codes for 16bit R and RG
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3434/
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread