From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51C90C77B73 for ; Wed, 24 May 2023 22:00:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7045510E619; Wed, 24 May 2023 22:00:49 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6A81910E619; Wed, 24 May 2023 22:00:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684965647; x=1716501647; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=1ULzqC2txlMhPdXlBt+qNeooRrlJetQ5sEpiTcnPM30=; b=R3s0fMhbPAjmpFMibLT0Xd6qyMaCjTmV4iC4Mytr1b8/fYoywubKR0wr lohmyjgy8KGMySIFr/0Hxv9u6eHn9SrlloX9KGbwGnmY0ZtD14ec6aVAE IXPaLmeAzYQ24Qf2TuKVTe6IunIai1bDplpz6imjCGpGkYLJq3V7qx/L3 XOD+qvYwCqqkhhC1w4iObcAuqKeG8j/V9e7FjI+Lm/VkcwwWU+SToSiZJ +eKW7h1tBlih51PedrYfiuO/zsokb78LF0kucYWu4aFiFBz+2n75L1aOp nfldei8onWI3c6rixXOOY4nmdFyn7inXNQ7EOfxgvGjL2ZkBjn701A9/V w==; X-IronPort-AV: E=McAfee;i="6600,9927,10720"; a="338276648" X-IronPort-AV: E=Sophos;i="6.00,190,1681196400"; d="scan'208";a="338276648" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2023 15:00:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10720"; a="654955858" X-IronPort-AV: E=Sophos;i="6.00,190,1681196400"; d="scan'208";a="654955858" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.209.17.238]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2023 15:00:21 -0700 Date: Wed, 24 May 2023 14:46:04 -0700 Message-ID: <87zg5tmmhv.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Andrzej Hajda In-Reply-To: <86c706cc-9d98-3b28-d713-853938cabf74@intel.com> References: <20230523151918.4170499-1-ashutosh.dixit@intel.com> <20230523151918.4170499-2-ashutosh.dixit@intel.com> <86c706cc-9d98-3b28-d713-853938cabf74@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Turn off the timer to sample frequencies when GT is parked X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, 24 May 2023 02:12:31 -0700, Andrzej Hajda wrote: > Hi Andrzej, > On 23.05.2023 17:19, Ashutosh Dixit wrote: > > pmu_needs_timer() keeps the timer running even when GT is parked, > > ostensibly to sample requested/actual frequencies. However > > frequency_sample() has the following: > > > > /* Report 0/0 (actual/requested) frequency while parked. */ > > if (!intel_gt_pm_get_if_awake(gt)) > > return; > > > > The above code prevents frequencies to be sampled while the GT is > > parked. So we might as well turn off the sampling timer itself in this > > case and save CPU cycles/power. > > > > v2: Instead of turning freq bits off, return false, since no counters will > > run after this change when GT is parked (Tvrtko) > > > > Signed-off-by: Ashutosh Dixit > > Reviewed-by: Tvrtko Ursulin > > --- > > drivers/gpu/drm/i915/i915_pmu.c | 12 +++++------- > > 1 file changed, 5 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > > index a814583e19fd7..b47d890d4ada1 100644 > > --- a/drivers/gpu/drm/i915/i915_pmu.c > > +++ b/drivers/gpu/drm/i915/i915_pmu.c > > @@ -144,6 +144,10 @@ static bool pmu_needs_timer(struct i915_pmu *pmu, bool gpu_active) > > struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu); > > u32 enable; > > + /* When GPU is idle, at present no counters need to run */ > > + if (!gpu_active) > > + return false; > > + > > What is then purpose of calling pmu_needs_timer with 2nd arg false? > Why not just replace all occurrences of pmu_needs_timer(.., false) with > false? And remove the 2nd argument. OK, this didn't seem unreasonable so I went ahead and made this change in Patch v3. Copying Tvrtko too in case he prefers v2 for any reason. Please review. Thanks. -- Ashutosh > > > > > /* > > * Only some counters need the sampling timer. > > * > > @@ -157,17 +161,11 @@ static bool pmu_needs_timer(struct i915_pmu *pmu, bool gpu_active) > > */ > > enable &= frequency_enabled_mask() | ENGINE_SAMPLE_MASK; > > - /* > > - * When the GPU is idle per-engine counters do not need to be > > - * running so clear those bits out. > > - */ > > - if (!gpu_active) > > - enable &= ~ENGINE_SAMPLE_MASK; > > /* > > * Also there is software busyness tracking available we do not > > * need the timer for I915_SAMPLE_BUSY counter. > > */ > > - else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS) > > + if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS) > > enable &= ~BIT(I915_SAMPLE_BUSY); > > /* >