public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: bradley.d.volkin@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 04/13] drm/i915: Reject privileged commands
Date: Wed, 05 Feb 2014 17:22:33 +0200	[thread overview]
Message-ID: <87zjm51t52.fsf@intel.com> (raw)
In-Reply-To: <1391032514-19136-5-git-send-email-bradley.d.volkin@intel.com>

On Wed, 29 Jan 2014, bradley.d.volkin@intel.com wrote:
> From: Brad Volkin <bradley.d.volkin@intel.com>
>
> The spec defines most of these commands as privileged. A few others,
> like the semaphore mbox command and some display commands, are also
> reserved for the driver's use. Subsequent patches relax some of
> these restrictions.
>
> Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_cmd_parser.c | 54 ++++++++++++++++++++++++----------
>  drivers/gpu/drm/i915/i915_reg.h        | 31 +++++++++----------
>  2 files changed, 54 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 2e27bad..cc2f68c 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -57,27 +57,27 @@
>  static const struct drm_i915_cmd_descriptor common_cmds[] = {
>  	CMD(  MI_NOOP,                          SMI,    F,  1,      S  ),
>  	CMD(  MI_USER_INTERRUPT,                SMI,    F,  1,      S  ),
> -	CMD(  MI_WAIT_FOR_EVENT,                SMI,    F,  1,      S  ),
> +	CMD(  MI_WAIT_FOR_EVENT,                SMI,    F,  1,      R  ),
>  	CMD(  MI_ARB_CHECK,                     SMI,    F,  1,      S  ),
>  	CMD(  MI_REPORT_HEAD,                   SMI,    F,  1,      S  ),
>  	CMD(  MI_SUSPEND_FLUSH,                 SMI,    F,  1,      S  ),
> -	CMD(  MI_SEMAPHORE_MBOX,                SMI,   !F,  0xFF,   S  ),
> -	CMD(  MI_STORE_DWORD_INDEX,             SMI,   !F,  0xFF,   S  ),
> -	CMD(  MI_LOAD_REGISTER_IMM(1),          SMI,   !F,  0xFF,   S  ),
> -	CMD(  MI_STORE_REGISTER_MEM(1),         SMI,   !F,  0xFF,   S  ),
> -	CMD(  MI_LOAD_REGISTER_MEM,             SMI,   !F,  0xFF,   S  ),
> +	CMD(  MI_SEMAPHORE_MBOX,                SMI,   !F,  0xFF,   R  ),
> +	CMD(  MI_STORE_DWORD_INDEX,             SMI,   !F,  0xFF,   R  ),
> +	CMD(  MI_LOAD_REGISTER_IMM(1),          SMI,   !F,  0xFF,   R  ),
> +	CMD(  MI_STORE_REGISTER_MEM(1),         SMI,   !F,  0xFF,   R  ),
> +	CMD(  MI_LOAD_REGISTER_MEM,             SMI,   !F,  0xFF,   R  ),
>  	CMD(  MI_BATCH_BUFFER_START,            SMI,   !F,  0xFF,   S  ),
>  };
>  
>  static const struct drm_i915_cmd_descriptor render_cmds[] = {
>  	CMD(  MI_FLUSH,                         SMI,    F,  1,      S  ),
> -	CMD(  MI_ARB_ON_OFF,                    SMI,    F,  1,      S  ),
> +	CMD(  MI_ARB_ON_OFF,                    SMI,    F,  1,      R  ),
>  	CMD(  MI_PREDICATE,                     SMI,    F,  1,      S  ),
>  	CMD(  MI_TOPOLOGY_FILTER,               SMI,    F,  1,      S  ),
> -	CMD(  MI_DISPLAY_FLIP,                  SMI,   !F,  0xFF,   S  ),
> -	CMD(  MI_SET_CONTEXT,                   SMI,   !F,  0xFF,   S  ),
> +	CMD(  MI_DISPLAY_FLIP,                  SMI,   !F,  0xFF,   R  ),
> +	CMD(  MI_SET_CONTEXT,                   SMI,   !F,  0xFF,   R  ),
>  	CMD(  MI_URB_CLEAR,                     SMI,   !F,  0xFF,   S  ),
> -	CMD(  MI_UPDATE_GTT,                    SMI,   !F,  0xFF,   S  ),
> +	CMD(  MI_UPDATE_GTT,                    SMI,   !F,  0xFF,   R  ),
>  	CMD(  MI_CLFLUSH,                       SMI,   !F,  0x3FF,  S  ),
>  	CMD(  MI_CONDITIONAL_BATCH_BUFFER_END,  SMI,   !F,  0xFF,   S  ),
>  	CMD(  GFX_OP_3DSTATE_VF_STATISTICS,     S3D,    F,  1,      S  ),
> @@ -92,7 +92,9 @@ static const struct drm_i915_cmd_descriptor hsw_render_cmds[] = {
>  	CMD(  MI_RS_CONTROL,                    SMI,    F,  1,      S  ),
>  	CMD(  MI_URB_ATOMIC_ALLOC,              SMI,    F,  1,      S  ),
>  	CMD(  MI_RS_CONTEXT,                    SMI,    F,  1,      S  ),
> -	CMD(  MI_LOAD_REGISTER_REG,             SMI,   !F,  0xFF,   S  ),
> +	CMD(  MI_LOAD_SCAN_LINES_INCL,          SMI,   !F,  0x3F,   R  ),
> +	CMD(  MI_LOAD_SCAN_LINES_EXCL,          SMI,   !F,  0x3F,   R  ),
> +	CMD(  MI_LOAD_REGISTER_REG,             SMI,   !F,  0xFF,   R  ),
>  	CMD(  MI_RS_STORE_DATA_IMM,             SMI,   !F,  0xFF,   S  ),
>  	CMD(  MI_LOAD_URB_MEM,                  SMI,   !F,  0xFF,   S  ),
>  	CMD(  MI_STORE_URB_MEM,                 SMI,   !F,  0xFF,   S  ),
> @@ -107,8 +109,9 @@ static const struct drm_i915_cmd_descriptor hsw_render_cmds[] = {
>  };
>  
>  static const struct drm_i915_cmd_descriptor video_cmds[] = {
> -	CMD(  MI_ARB_ON_OFF,                    SMI,    F,  1,      S  ),
> +	CMD(  MI_ARB_ON_OFF,                    SMI,    F,  1,      R  ),
>  	CMD(  MI_STORE_DWORD_IMM,               SMI,   !F,  0xFF,   S  ),
> +	CMD(  MI_UPDATE_GTT,                    SMI,   !F,  0x3F,   R  ),
>  	CMD(  MI_CONDITIONAL_BATCH_BUFFER_END,  SMI,   !F,  0xFF,   S  ),
>  	/*
>  	 * MFX_WAIT doesn't fit the way we handle length for most commands.
> @@ -119,18 +122,25 @@ static const struct drm_i915_cmd_descriptor video_cmds[] = {
>  };
>  
>  static const struct drm_i915_cmd_descriptor vecs_cmds[] = {
> -	CMD(  MI_ARB_ON_OFF,                    SMI,    F,  1,      S  ),
> +	CMD(  MI_ARB_ON_OFF,                    SMI,    F,  1,      R  ),
>  	CMD(  MI_STORE_DWORD_IMM,               SMI,   !F,  0xFF,   S  ),
> +	CMD(  MI_UPDATE_GTT,                    SMI,   !F,  0x3F,   R  ),
>  	CMD(  MI_CONDITIONAL_BATCH_BUFFER_END,  SMI,   !F,  0xFF,   S  ),
>  };
>  
>  static const struct drm_i915_cmd_descriptor blt_cmds[] = {
> -	CMD(  MI_DISPLAY_FLIP,                  SMI,   !F,  0xFF,   S  ),
> +	CMD(  MI_DISPLAY_FLIP,                  SMI,   !F,  0xFF,   R  ),
>  	CMD(  MI_STORE_DWORD_IMM,               SMI,   !F,  0x3FF,  S  ),
> +	CMD(  MI_UPDATE_GTT,                    SMI,   !F,  0x3F,   R  ),
>  	CMD(  COLOR_BLT,                        S2D,   !F,  0x3F,   S  ),
>  	CMD(  SRC_COPY_BLT,                     S2D,   !F,  0x3F,   S  ),
>  };
>  
> +static const struct drm_i915_cmd_descriptor hsw_blt_cmds[] = {
> +	CMD(  MI_LOAD_SCAN_LINES_INCL,          SMI,   !F,  0x3F,   R  ),
> +	CMD(  MI_LOAD_SCAN_LINES_EXCL,          SMI,   !F,  0x3F,   R  ),
> +};
> +
>  #undef CMD
>  #undef SMI
>  #undef S3D
> @@ -169,6 +179,12 @@ static const struct drm_i915_cmd_table gen7_blt_cmds[] = {
>  	{ blt_cmds, ARRAY_SIZE(blt_cmds) },
>  };
>  
> +static const struct drm_i915_cmd_table hsw_blt_ring_cmds[] = {
> +	{ common_cmds, ARRAY_SIZE(common_cmds) },
> +	{ blt_cmds, ARRAY_SIZE(blt_cmds) },
> +	{ hsw_blt_cmds, ARRAY_SIZE(hsw_blt_cmds) },
> +};
> +
>  #define CLIENT_MASK      0xE0000000
>  #define SUBCLIENT_MASK   0x18000000
>  #define MI_CLIENT        0x00000000
> @@ -305,8 +321,14 @@ void i915_cmd_parser_init_ring(struct intel_ring_buffer *ring)
>  		ring->get_cmd_length_mask = gen7_bsd_get_cmd_length_mask;
>  		break;
>  	case BCS:
> -		ring->cmd_tables = gen7_blt_cmds;
> -		ring->cmd_table_count = ARRAY_SIZE(gen7_blt_cmds);
> +		if (IS_HASWELL(ring->dev)) {
> +			ring->cmd_tables = hsw_blt_ring_cmds;
> +			ring->cmd_table_count = ARRAY_SIZE(hsw_blt_ring_cmds);
> +		} else {
> +			ring->cmd_tables = gen7_blt_cmds;
> +			ring->cmd_table_count = ARRAY_SIZE(gen7_blt_cmds);
> +		}
> +
>  		ring->get_cmd_length_mask = gen7_blt_get_cmd_length_mask;
>  		break;
>  	case VECS:
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 13ed6ed..2b7c26e 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -339,21 +339,22 @@
>  /*
>   * Commands used only by the command parser
>   */
> -#define MI_SET_PREDICATE       MI_INSTR(0x01, 0)
> -#define MI_ARB_CHECK           MI_INSTR(0x05, 0)
> -#define MI_RS_CONTROL          MI_INSTR(0x06, 0)
> -#define MI_URB_ATOMIC_ALLOC    MI_INSTR(0x09, 0)
> -#define MI_PREDICATE           MI_INSTR(0x0C, 0)
> -#define MI_RS_CONTEXT          MI_INSTR(0x0F, 0)
> -#define MI_TOPOLOGY_FILTER     MI_INSTR(0x0D, 0)
> -#define MI_URB_CLEAR           MI_INSTR(0x19, 0)
> -#define MI_UPDATE_GTT          MI_INSTR(0x23, 0)
> -#define MI_CLFLUSH             MI_INSTR(0x27, 0)
> -#define MI_LOAD_REGISTER_MEM   MI_INSTR(0x29, 0)
> -#define MI_LOAD_REGISTER_REG   MI_INSTR(0x2A, 0)
> -#define MI_RS_STORE_DATA_IMM   MI_INSTR(0x2B, 0)
> -#define MI_LOAD_URB_MEM        MI_INSTR(0x2C, 0)
> -#define MI_STORE_URB_MEM       MI_INSTR(0x2D, 0)
> +#define MI_SET_PREDICATE        MI_INSTR(0x01, 0)
> +#define MI_ARB_CHECK            MI_INSTR(0x05, 0)
> +#define MI_RS_CONTROL           MI_INSTR(0x06, 0)
> +#define MI_URB_ATOMIC_ALLOC     MI_INSTR(0x09, 0)
> +#define MI_PREDICATE            MI_INSTR(0x0C, 0)
> +#define MI_RS_CONTEXT           MI_INSTR(0x0F, 0)
> +#define MI_TOPOLOGY_FILTER      MI_INSTR(0x0D, 0)
> +#define MI_LOAD_SCAN_LINES_EXCL MI_INSTR(0x13, 0)
> +#define MI_URB_CLEAR            MI_INSTR(0x19, 0)
> +#define MI_UPDATE_GTT           MI_INSTR(0x23, 0)
> +#define MI_CLFLUSH              MI_INSTR(0x27, 0)
> +#define MI_LOAD_REGISTER_MEM    MI_INSTR(0x29, 0)
> +#define MI_LOAD_REGISTER_REG    MI_INSTR(0x2A, 0)
> +#define MI_RS_STORE_DATA_IMM    MI_INSTR(0x2B, 0)
> +#define MI_LOAD_URB_MEM         MI_INSTR(0x2C, 0)
> +#define MI_STORE_URB_MEM        MI_INSTR(0x2D, 0)

Superfluous whitespace change hunk.


>  #define MI_CONDITIONAL_BATCH_BUFFER_END MI_INSTR(0x36, 0)
>  
>  #define PIPELINE_SELECT                ((0x3<<29)|(0x1<<27)|(0x1<<24)|(0x4<<16))
> -- 
> 1.8.5.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center

  reply	other threads:[~2014-02-05 15:18 UTC|newest]

Thread overview: 139+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-26 16:51 [RFC 00/22] Gen7 batch buffer command parser bradley.d.volkin
2013-11-26 16:51 ` [RFC 01/22] drm/i915: Add data structures for " bradley.d.volkin
2013-11-26 16:51 ` [RFC 02/22] drm/i915: Initial command parser table definitions bradley.d.volkin
2013-11-26 16:51 ` [RFC 03/22] drm/i915: Hook command parser tables up to rings bradley.d.volkin
2013-11-26 16:51 ` [RFC 04/22] drm/i915: Add per-ring command length decode functions bradley.d.volkin
2013-11-26 16:51 ` [RFC 05/22] drm/i915: Implement command parsing bradley.d.volkin
2013-11-26 17:29   ` Chris Wilson
2013-11-26 17:38     ` Volkin, Bradley D
2013-11-26 17:56       ` Chris Wilson
2013-11-26 18:55         ` Volkin, Bradley D
2013-12-05 21:10         ` Volkin, Bradley D
2013-11-26 16:51 ` [RFC 06/22] drm/i915: Add a HAS_CMD_PARSER getparam bradley.d.volkin
2013-11-27 12:51   ` Daniel Vetter
2013-12-05  9:38     ` Kenneth Graunke
2013-12-05 17:22       ` Volkin, Bradley D
2013-12-05 17:26         ` Daniel Vetter
2013-11-26 16:51 ` [RFC 07/22] drm/i915: Add support for rejecting commands during parsing bradley.d.volkin
2013-11-26 16:51 ` [RFC 08/22] drm/i915: Add support for checking register accesses bradley.d.volkin
2013-11-26 16:51 ` [RFC 09/22] drm/i915: Add support for rejecting commands via bitmasks bradley.d.volkin
2013-11-26 16:51 ` [RFC 10/22] drm/i915: Reject unsafe commands bradley.d.volkin
2013-11-26 16:51 ` [RFC 11/22] drm/i915: Add register whitelists for mesa bradley.d.volkin
2013-11-26 16:51 ` [RFC 12/22] drm/i915: Enable register whitelist checks bradley.d.volkin
2013-11-26 16:51 ` [RFC 13/22] drm/i915: Enable bit checking for some commands bradley.d.volkin
2013-11-26 16:51 ` [RFC 14/22] drm/i915: Enable PPGTT command parser checks bradley.d.volkin
2013-11-26 16:51 ` [RFC 15/22] drm/i915: Reject commands that would store to global HWS page bradley.d.volkin
2013-11-26 16:51 ` [RFC 16/22] drm/i915: Reject additional commands bradley.d.volkin
2013-11-26 16:51 ` [RFC 17/22] drm/i915: Add parser data for perf monitoring GL extensions bradley.d.volkin
2013-11-26 16:51 ` [RFC 18/22] drm/i915: Reject MI_ARB_ON_OFF on VECS bradley.d.volkin
2013-11-26 16:51 ` [RFC 19/22] drm/i915: Fix length handling for MFX_WAIT bradley.d.volkin
2013-11-26 16:51 ` [RFC 20/22] drm/i915: Fix MI_STORE_DWORD_IMM parser defintion bradley.d.volkin
2013-11-26 18:08   ` Chris Wilson
2013-11-26 18:55     ` Volkin, Bradley D
2013-11-26 16:51 ` [RFC 21/22] drm/i915: Clean up command parser enable decision bradley.d.volkin
2013-11-26 16:51 ` [RFC 22/22] drm/i915: Enable command parsing by default bradley.d.volkin
2013-11-26 19:35 ` [RFC 00/22] Gen7 batch buffer command parser Daniel Vetter
2013-11-26 20:24   ` Volkin, Bradley D
2013-11-27  1:32     ` ykzhao
2013-11-27  8:10       ` Daniel Vetter
2013-11-27  8:23         ` Xiang, Haihao
2013-11-27  8:31           ` Daniel Vetter
2013-11-27  8:42             ` Xiang, Haihao
2013-11-27  8:47               ` Daniel Vetter
2013-11-27  8:54                 ` Xiang, Haihao
2013-11-27  8:55                 ` ykzhao
2013-12-04  8:13     ` Daniel Vetter
2013-12-04  8:22       ` Daniel Vetter
2013-12-05  1:40       ` Volkin, Bradley D
2013-12-05  7:48         ` Daniel Vetter
2013-12-05 20:47     ` Volkin, Bradley D
2013-12-05 23:42       ` Daniel Vetter
2013-11-27  1:26   ` Xiang, Haihao
2013-12-11  0:58   ` Volkin, Bradley D
2013-12-11  9:54     ` Daniel Vetter
2013-12-11 18:04       ` Volkin, Bradley D
2013-12-11 18:46         ` Daniel Vetter
2014-01-29 21:55 ` [PATCH 00/13] " bradley.d.volkin
2014-01-29 21:55   ` [PATCH 01/13] drm/i915: Refactor shmem pread setup bradley.d.volkin
2014-01-30  8:36     ` Daniel Vetter
2014-01-29 21:55   ` [PATCH 02/13] drm/i915: Implement command buffer parsing logic bradley.d.volkin
2014-01-29 22:28     ` Chris Wilson
2014-01-30  8:53       ` Daniel Vetter
2014-01-30  9:05         ` Daniel Vetter
2014-01-30  9:12           ` Daniel Vetter
2014-01-30 11:07             ` Daniel Vetter
2014-01-30 18:05               ` Volkin, Bradley D
2014-02-03 23:00                 ` Volkin, Bradley D
2014-02-04 10:20                   ` Daniel Vetter
2014-02-04 18:45                     ` Volkin, Bradley D
2014-02-04 19:33                       ` Daniel Vetter
2014-02-05  0:56                         ` Volkin, Bradley D
2014-01-30 17:55             ` Volkin, Bradley D
2014-01-30  9:07     ` Daniel Vetter
2014-01-30 10:57       ` Chris Wilson
2014-02-05 15:15     ` Jani Nikula
2014-02-05 18:36       ` Volkin, Bradley D
2014-02-07 13:58     ` Jani Nikula
2014-02-07 14:45       ` Daniel Vetter
2014-02-11 18:12         ` Volkin, Bradley D
2014-02-11 18:21           ` Jani Nikula
2014-01-29 21:55   ` [PATCH 03/13] drm/i915: Initial command parser table definitions bradley.d.volkin
2014-02-05 14:22     ` Jani Nikula
2014-01-29 21:55   ` [PATCH 04/13] drm/i915: Reject privileged commands bradley.d.volkin
2014-02-05 15:22     ` Jani Nikula [this message]
2014-02-05 18:42       ` Volkin, Bradley D
2014-01-29 21:55   ` [PATCH 05/13] drm/i915: Allow some privileged commands from master bradley.d.volkin
2014-01-29 21:55   ` [PATCH 06/13] drm/i915: Add register whitelists for mesa bradley.d.volkin
2014-02-05 15:29     ` Jani Nikula
2014-02-05 18:47       ` Volkin, Bradley D
2014-01-29 21:55   ` [PATCH 07/13] drm/i915: Add register whitelist for DRM master bradley.d.volkin
2014-01-29 22:37     ` Chris Wilson
2014-01-29 23:18       ` Volkin, Bradley D
2014-01-30  9:02         ` Daniel Vetter
     [not found]           ` <20140130172206.GA26611@vpg-ubuntu-bdvolkin>
2014-01-30 20:41             ` Daniel Vetter
2014-01-29 21:55   ` [PATCH 08/13] drm/i915: Enable register whitelist checks bradley.d.volkin
2014-02-05 15:33     ` Jani Nikula
2014-02-05 18:49       ` Volkin, Bradley D
2014-01-29 21:55   ` [PATCH 09/13] drm/i915: Reject commands that explicitly generate interrupts bradley.d.volkin
2014-01-29 21:55   ` [PATCH 10/13] drm/i915: Enable PPGTT command parser checks bradley.d.volkin
2014-01-29 22:33     ` Chris Wilson
2014-01-29 23:00       ` Volkin, Bradley D
2014-01-29 23:08         ` Chris Wilson
2014-02-05 15:37     ` Jani Nikula
2014-02-05 18:54       ` Volkin, Bradley D
2014-01-29 21:55   ` [PATCH 11/13] drm/i915: Reject commands that would store to global HWS page bradley.d.volkin
2014-02-05 15:39     ` Jani Nikula
2014-01-29 21:55   ` [PATCH 12/13] drm/i915: Add a CMD_PARSER_VERSION getparam bradley.d.volkin
2014-01-30  9:19     ` Daniel Vetter
2014-01-30 17:25       ` Volkin, Bradley D
2014-01-29 21:55   ` [PATCH 13/13] drm/i915: Enable command parsing by default bradley.d.volkin
2014-01-29 22:11   ` [PATCH 00/13] Gen7 batch buffer command parser Daniel Vetter
2014-01-29 22:22     ` Volkin, Bradley D
2014-01-29 23:31       ` Daniel Vetter
2014-02-05 15:41   ` Jani Nikula
2014-01-29 21:57 ` [PATCH] intel: Merge i915_drm.h with cmd parser define bradley.d.volkin
2014-01-29 22:13   ` Chris Wilson
2014-01-29 22:26     ` Volkin, Bradley D
2014-01-30  9:20       ` Daniel Vetter
2014-01-30 17:28         ` Volkin, Bradley D
2014-02-04 10:26           ` Daniel Vetter
2014-01-29 21:58 ` [PATCH 1/6] tests: Add a test for the command parser bradley.d.volkin
2014-01-29 21:58   ` [PATCH 2/6] tests/gem_exec_parse: Add tests for rejected commands bradley.d.volkin
2014-01-29 21:58   ` [PATCH 3/6] tests/gem_exec_parse: Add tests for register whitelist bradley.d.volkin
2014-01-29 21:58   ` [PATCH 4/6] tests/gem_exec_parse: Add tests for bitmask checks bradley.d.volkin
2014-01-29 21:58   ` [PATCH 5/6] tests/gem_exec_parse: Test for batches w/o MI_BATCH_BUFFER_END bradley.d.volkin
2014-01-29 22:10     ` Chris Wilson
2014-01-30 11:46       ` Chris Wilson
2014-03-25 13:17         ` Daniel Vetter
2014-03-25 19:49           ` Volkin, Bradley D
2014-01-29 21:58   ` [PATCH 6/6] tests/gem_exec_parse: Test a command crossing a page boundary bradley.d.volkin
2014-01-29 22:12     ` Chris Wilson
2014-03-25 13:20       ` Daniel Vetter
2014-02-05 10:28 ` [RFC 00/22] Gen7 batch buffer command parser Chris Wilson
2014-02-05 18:18   ` Volkin, Bradley D
2014-02-05 18:25     ` Chris Wilson
2014-02-05 18:30     ` Daniel Vetter
2014-02-05 19:00       ` Volkin, Bradley D
2014-02-05 19:17         ` Daniel Vetter
2014-02-05 19:55           ` Volkin, Bradley D
  -- strict thread matches above, loose matches on Subject: below --
2014-02-18 18:15 [PATCH 00/13] " bradley.d.volkin
2014-02-18 18:15 ` [PATCH 04/13] drm/i915: Reject privileged commands bradley.d.volkin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87zjm51t52.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=bradley.d.volkin@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox