From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, kenneth@whitecape.org
Subject: Re: [PATCH v2 3/3] drm/i915: Ensure the HiZ RAW Stall Optimization is on for Cherryview.
Date: 14 Jan 2015 22:07:19 -0800 [thread overview]
Message-ID: <898e4a$d4bco9@FMSMGA003.fm.intel.com> (raw)
In-Reply-To: <1421182013-751-3-git-send-email-kenneth@whitecape.org>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5578
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -1 353/353 352/353
ILK 355/355 355/355
SNB 400/422 400/422
IVB 487/487 487/487
BYT 296/296 296/296
HSW +22 486/508 508/508
BDW -1 402/402 401/402
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gen3_render_linear_blits PASS(3, M25M23) CRASH(1, M23)
HSW igt_kms_cursor_crc_cursor-size-change NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_kms_fence_pin_leak NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_kms_flip_event_leak NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_lpsp_non-edp NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_cursor NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_cursor-dpms NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_dpms-mode-unset-non-lpsp NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_dpms-non-lpsp NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_drm-resources-equal NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_fences NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_fences-dpms NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_gem-execbuf NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_gem-mmap-cpu NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_gem-mmap-gtt NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_gem-pread NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_i2c NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_modeset-non-lpsp NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_modeset-non-lpsp-stress-no-wait NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_pci-d3-state NSPT(1, M40)PASS(2, M20) PASS(1, M20)
HSW igt_pm_rpm_rte NSPT(1, M40)PASS(2, M20) PASS(1, M20)
*BDW igt_gem_concurrent_blit_gtt-rcs-early-read-interruptible PASS(5, M30M28) DMESG_WARN(1, M28)
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-01-15 6:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-13 20:46 [PATCH v2 1/3] drm/i915: Improve HiZ throughput on Cherryview Kenneth Graunke
2015-01-13 20:46 ` [PATCH v2 2/3] drm/i915: Enable the HiZ RAW Stall Optimization on Broadwell Kenneth Graunke
2015-01-13 20:46 ` [PATCH v2 3/3] drm/i915: Ensure the HiZ RAW Stall Optimization is on for Cherryview Kenneth Graunke
2015-01-15 6:07 ` shuang.he [this message]
2015-01-16 11:35 ` Ville Syrjälä
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