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From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
	intel-gfx@lists.freedesktop.org, sonika.jindal@intel.com
Subject: Re: [PATCH 4/4] drm/i915/skl: Program PLL for edp1.4 intermediate frequencies
Date: 21 Feb 2015 00:23:04 -0800	[thread overview]
Message-ID: <898e4a$dkdfef@FMSMGA003.fm.intel.com> (raw)
In-Reply-To: <1424497333-1393-5-git-send-email-sonika.jindal@intel.com>

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5802
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -5              277/277              272/277
ILK                                  313/313              313/313
SNB                                  309/309              309/309
IVB                                  382/382              382/382
BYT                                  296/296              296/296
HSW                                  425/425              425/425
BDW                 -1              318/318              317/318
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt_gem_fence_thrash_bo-write-verify-none      NRUN(1)PASS(6)      FAIL(1)PASS(1)
*PNV  igt_gem_fence_thrash_bo-write-verify-x      PASS(7)      FAIL(1)NO_RESULT(1)
*PNV  igt_gem_fence_thrash_bo-write-verify-y      NO_RESULT(1)PASS(7)      FAIL(1)NO_RESULT(1)
 PNV  igt_gem_userptr_blits_coherency-sync      NO_RESULT(1)CRASH(6)NRUN(1)PASS(6)      NO_RESULT(1)CRASH(1)
*PNV  igt_gem_userptr_blits_coherency-unsync      CRASH(4)NRUN(1)PASS(4)      NO_RESULT(1)CRASH(1)
*BDW  igt_gem_gtt_hog      PASS(19)      DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
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  reply	other threads:[~2015-02-21  8:38 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-21  5:42 [PATCH 0/4] drm/i915/skl: Support for edp1.4 intermediate frequencies Sonika Jindal
2015-02-21  5:42 ` [PATCH 1/4] drm: Adding edp1.4 specific dpcd macros Sonika Jindal
2015-02-21  5:42 ` [PATCH 2/4] drm/i915/skl: Read sink supported rates from edp panel Sonika Jindal
2015-03-04 10:00   ` Ville Syrjälä
2015-03-05  4:33     ` [PATCH] " Sonika Jindal
2015-03-05 13:11       ` shuang.he
2015-02-21  5:42 ` [PATCH 3/4] drm/i915/skl: Add support for edp 1.4 intermediate frequencies Sonika Jindal
2015-03-04 11:24   ` Ville Syrjälä
2015-03-05  4:32     ` [PATCH] " Sonika Jindal
2015-03-05 12:02       ` Daniel Vetter
2015-02-21  5:42 ` [PATCH 4/4] drm/i915/skl: Program PLL for edp1.4 " Sonika Jindal
2015-02-21  8:23   ` shuang.he [this message]
2015-03-04 11:25   ` Ville Syrjälä
2015-02-27  6:08 ` [PATCH 0/4] drm/i915/skl: Support " Jindal, Sonika

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