From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] i915: Initialize panel timing registers if VBIOS did not. Date: Thu, 14 Oct 2010 09:22:06 +0100 Message-ID: <89k83a$a0d8uk@azsmga001.ch.intel.com> References: <89k77n$p5t7tl@fmsmga001.fm.intel.com> <8u3s94$go0npa@orsmga002.jf.intel.com> <20101008141708.1c243a99@jbarnes-desktop> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 318D69E937 for ; Thu, 14 Oct 2010 01:22:10 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Olof Johansson , Jesse Barnes Cc: intel-gfx@lists.freedesktop.org, Mandeep Baines List-Id: intel-gfx@lists.freedesktop.org On Wed, 13 Oct 2010 16:00:44 -0500, Olof Johansson wrote: > On Fri, Oct 8, 2010 at 4:17 PM, Jesse Barnes wrote: > > I can't vouch for any particular set of values, but Bryan's analysis > > looks good to me; only a few of the values actually matter, and for > > those having slightly longer delays should be safe. > > > > Sounds like a soft ack to me. :) Close enough. I rearranged the code slightly so that the act of fixing up registers was separated from the code who purpose is simply to parse the VBIOS and pushed into drm-intel-staging. If you could check it over for obvious mistakes as it will land in -next just as soon as I've fixed up a troublesome merge with nouveau. -Chris -- Chris Wilson, Intel Open Source Technology Centre