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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5341.namprd11.prod.outlook.com (2603:10b6:5:390::22) by SA2PR11MB5033.namprd11.prod.outlook.com (2603:10b6:806:115::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8511.27; Tue, 11 Mar 2025 12:07:33 +0000 Received: from DM4PR11MB5341.namprd11.prod.outlook.com ([fe80::397:7566:d626:e839]) by DM4PR11MB5341.namprd11.prod.outlook.com ([fe80::397:7566:d626:e839%7]) with mapi id 15.20.8489.025; Tue, 11 Mar 2025 12:07:33 +0000 Message-ID: <8d9f16f4-a93d-4a4b-abf9-2762741569bb@intel.com> Date: Tue, 11 Mar 2025 17:37:27 +0530 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/10] drm/i915/display: Configure the second scaler for sharpness To: Nemesa Garg , , , References: <20250304102857.326544-1-nemesa.garg@intel.com> <20250304102857.326544-8-nemesa.garg@intel.com> Content-Language: en-US From: "Nautiyal, Ankit K" In-Reply-To: <20250304102857.326544-8-nemesa.garg@intel.com> Content-Type: text/plain; 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Panel fitting will have the preference > over sharpness property. > > v2: Add the panel fitting check before enabling sharpness > v3: Reframe commit message[Arun] > v4: Replace string based comparison with plane_state[Jani] > v5: Rebase > v6: Fix build issue > v7: Remove scaler id from verify_crtc_state[Ankit] > v8: Change the patch title. Add code comment. > Move the config part in patch#6. [Ankit] > > Signed-off-by: Nemesa Garg > --- > drivers/gpu/drm/i915/display/intel_casf.c | 8 ++++++ > drivers/gpu/drm/i915/display/intel_casf.h | 1 + > drivers/gpu/drm/i915/display/intel_display.c | 6 +++-- > drivers/gpu/drm/i915/display/skl_scaler.c | 28 +++++++++++++++----- > 4 files changed, 35 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c > index 15ae555e571e..1d9196c4d22f 100644 > --- a/drivers/gpu/drm/i915/display/intel_casf.c > +++ b/drivers/gpu/drm/i915/display/intel_casf.c > @@ -115,6 +115,14 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state) > return 0; > } > > +bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state) > +{ > + if (crtc_state->hw.casf_params.casf_enable) > + return true; > + > + return false; > +} > + > static int casf_coeff_tap(int i) > { > return i % SCALER_FILTER_NUM_TAPS; > diff --git a/drivers/gpu/drm/i915/display/intel_casf.h b/drivers/gpu/drm/i915/display/intel_casf.h > index 507a3fe49753..c75a4b2f3133 100644 > --- a/drivers/gpu/drm/i915/display/intel_casf.h > +++ b/drivers/gpu/drm/i915/display/intel_casf.h > @@ -17,5 +17,6 @@ void intel_filter_lut_load(struct intel_crtc *crtc, > const struct intel_crtc_state *crtc_state); > void intel_casf_enable(struct intel_crtc_state *crtc_state); > void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state); > +bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state); > > #endif /* __INTEL_CASF_H__ */ > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index c4b0ec60fded..03acf01cac75 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -60,6 +60,7 @@ > #include "intel_audio.h" > #include "intel_bo.h" > #include "intel_bw.h" > +#include "intel_casf.h" > #include "intel_cdclk.h" > #include "intel_clock_gating.h" > #include "intel_color.h" > @@ -1956,7 +1957,7 @@ static void get_crtc_power_domains(struct intel_crtc_state *crtc_state, > set_bit(POWER_DOMAIN_PIPE(pipe), mask->bits); > set_bit(POWER_DOMAIN_TRANSCODER(cpu_transcoder), mask->bits); > if (crtc_state->pch_pfit.enabled || > - crtc_state->pch_pfit.force_thru) > + crtc_state->pch_pfit.force_thru || intel_casf_needs_scaler(crtc_state)) > set_bit(POWER_DOMAIN_PIPE_PANEL_FITTER(pipe), mask->bits); This should be a separate patch. This patch should be about how casf uses 2nd scaler as pipe scaler and the changes and checks required for intel_allocate_scaler. > > drm_for_each_encoder_mask(encoder, &dev_priv->drm, > @@ -2194,7 +2195,7 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state) > * PF-ID we'll need to adjust the pixel_rate here. > */ > > - if (!crtc_state->pch_pfit.enabled) > + if (!crtc_state->pch_pfit.enabled || intel_casf_needs_scaler(crtc_state)) Is this really needed?  I am not very sure about this. > return pixel_rate; > > drm_rect_init(&src, 0, 0, > @@ -5299,6 +5300,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > > PIPE_CONF_CHECK_I(scaler_state.scaler_id); > PIPE_CONF_CHECK_I(pixel_rate); > + PIPE_CONF_CHECK_BOOL(hw.casf_params.casf_enable); Again not part of this patch. > > PIPE_CONF_CHECK_X(gamma_mode); > if (IS_CHERRYVIEW(dev_priv)) > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c > index 39fc537e54f0..93a847c05535 100644 > --- a/drivers/gpu/drm/i915/display/skl_scaler.c > +++ b/drivers/gpu/drm/i915/display/skl_scaler.c > @@ -5,6 +5,7 @@ > > #include "i915_drv.h" > #include "i915_reg.h" > +#include "intel_casf.h" > #include "intel_casf_regs.h" > #include "intel_de.h" > #include "intel_display_trace.h" > @@ -272,7 +273,8 @@ int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state) > drm_rect_width(&crtc_state->pipe_src), > drm_rect_height(&crtc_state->pipe_src), > width, height, NULL, 0, > - crtc_state->pch_pfit.enabled); > + crtc_state->pch_pfit.enabled || > + intel_casf_needs_scaler(crtc_state)); > } > > /** > @@ -311,7 +313,9 @@ int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, > } > > static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state, > - struct intel_crtc *crtc) > + struct intel_crtc *crtc, > + struct intel_plane_state *plane_state, > + bool casf_scaler) > { > int i; > > @@ -319,6 +323,10 @@ static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state, > if (scaler_state->scalers[i].in_use) > continue; > > + /* CASF needs second scaler */ > + if (!plane_state && casf_scaler && i != 1) > + continue; > + > scaler_state->scalers[i].in_use = true; > > return i; > @@ -369,7 +377,7 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, > int num_scalers_need, struct intel_crtc *crtc, > const char *name, int idx, > struct intel_plane_state *plane_state, > - int *scaler_id) > + int *scaler_id, bool casf_scaler) > { > struct intel_display *display = to_intel_display(crtc); > struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state; > @@ -378,12 +386,15 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state, > int vscale = 0; > > if (*scaler_id < 0) > - *scaler_id = intel_allocate_scaler(scaler_state, crtc); > + *scaler_id = intel_allocate_scaler(scaler_state, crtc, plane_state, casf_scaler); > > if (drm_WARN(display->drm, *scaler_id < 0, > "Cannot find scaler for %s:%d\n", name, idx)) > return -EINVAL; > > + if (casf_scaler) > + mode = SKL_PS_SCALER_MODE_HQ; This change also should be a separate patch. Regards, Ankit > + > /* set scaler mode */ > if (plane_state && plane_state->hw.fb && > plane_state->hw.fb->format->is_yuv && > @@ -510,10 +521,14 @@ static int setup_crtc_scaler(struct intel_atomic_state *state, > struct intel_crtc_scaler_state *scaler_state = > &crtc_state->scaler_state; > > + if (intel_casf_needs_scaler(crtc_state) && crtc_state->pch_pfit.enabled) > + return -EINVAL; > + > return intel_atomic_setup_scaler(crtc_state, > hweight32(scaler_state->scaler_users), > crtc, "CRTC", crtc->base.base.id, > - NULL, &scaler_state->scaler_id); > + NULL, &scaler_state->scaler_id, > + intel_casf_needs_scaler(crtc_state)); > } > > static int setup_plane_scaler(struct intel_atomic_state *state, > @@ -548,7 +563,8 @@ static int setup_plane_scaler(struct intel_atomic_state *state, > return intel_atomic_setup_scaler(crtc_state, > hweight32(scaler_state->scaler_users), > crtc, "PLANE", plane->base.base.id, > - plane_state, &plane_state->scaler_id); > + plane_state, &plane_state->scaler_id, > + false); > } > > /**