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From: "Li, Weinan Z" <weinan.z.li@intel.com>
To: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Chris Wilson <chris@chris-wilson.co.uk>,
	intel-gvt-dev@lists.freedesktop.org,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 2/2] drm/i915: enable to read CSB and CSB write pointer from HWSP in GVT-g VM
Date: Mon, 9 Oct 2017 11:02:07 +0800	[thread overview]
Message-ID: <924f37c6-1901-4cd3-c715-e5fdeb66c758@intel.com> (raw)
In-Reply-To: <1506944235.6755.45.camel@linux.intel.com>



On 10/2/2017 7:37 PM, Joonas Lahtinen wrote:
> On Mon, 2017-10-02 at 11:23 +0100, Chris Wilson wrote:
>> Quoting Joonas Lahtinen (2017-10-02 11:03:30)
>>> On Sat, 2017-09-30 at 13:57 +0800, Weinan Li wrote:
>>>> Let GVT-g VM read the CSB and CSB write pointer from virtual HWSP, not all
>>>> the host support this feature, need to check the BIT(3) of caps in PVINFO.
>>>>
>>>> Signed-off-by: Weinan Li <weinan.z.li@intel.com>
>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>> <SNIP>
>>>
>>>> @@ -396,6 +393,12 @@ static bool csb_force_mmio(struct drm_i915_private *i915)
>>>>        if (intel_vtd_active())
>>>>                return true;
>>>>   
>>>> +     /* GVT emulation depends upon host kernel implementation, check
>>>> +      * support capbility by reading PV INFO before access HWSP.
>>>> +      */
>>> The comment can be dropped completely, the code is self-descriptive.
will remove it in next version.
>>>
>>>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>>>> @@ -722,7 +722,12 @@ static void intel_lrc_irq_handler(unsigned long data)
>>>>                        &engine->status_page.page_addr[I915_HWS_CSB_BUF0_INDEX];
>>>>                unsigned int head, tail;
>>>>   
>>>> -             /* However GVT emulation depends upon intercepting CSB mmio */
>>>> +             /* However GVT-g emulation depends upon host kernel
>>>> +              * implementation, need to check support capbility by reading PV
>>>> +              * INFO before access HWSP. Beside from this, another special
>>>> +              * configuration may also need to force use mmio, like IOMMU
>>>> +              * enabled.
>>>> +              */
>>> s/capbility/capability/ and please rephrase this to be a kerneldoc for
>>> csb_use_mmio at the declaration.
>> This is not a description of how to use the function or even on how
>> csb_use_mmio work, this is why we want certain logic paths. Just a regular
>> old comment.
> That's why I asked to "rephrase" :) Anyway, it seems like there already
> is kerneldoc for the csb_use_mmio, so this comment can be dropped.
will remove this comment in next version.
> Regards, Joonas

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  reply	other threads:[~2017-10-09  3:02 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-30  5:57 [PATCH v2 0/2] enable virtual HWSP in GVT-g Weinan Li
2017-09-30  5:57 ` [PATCH v2 1/2] drm/i915/gvt: update CSB and CSB write pointer in virtual HWSP Weinan Li
2017-09-30  5:57 ` [PATCH v2 2/2] drm/i915: enable to read CSB and CSB write pointer from HWSP in GVT-g VM Weinan Li
2017-10-02 10:03   ` Joonas Lahtinen
2017-10-02 10:23     ` Chris Wilson
2017-10-02 11:37       ` Joonas Lahtinen
2017-10-09  3:02         ` Li, Weinan Z [this message]
2017-09-30  6:06 ` ✗ Fi.CI.BAT: failure for enable virtual HWSP in GVT-g Patchwork

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