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14 Dec 2020 14:57:07 -0800 Received: from bgsmsx604.gar.corp.intel.com (10.67.234.6) by fmsmsx601.amr.corp.intel.com (10.18.126.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Mon, 14 Dec 2020 14:57:06 -0800 Received: from bgsmsx604.gar.corp.intel.com (10.67.234.6) by BGSMSX604.gar.corp.intel.com (10.67.234.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Tue, 15 Dec 2020 04:27:03 +0530 Received: from bgsmsx604.gar.corp.intel.com ([10.67.234.6]) by BGSMSX604.gar.corp.intel.com ([10.67.234.6]) with mapi id 15.01.1713.004; Tue, 15 Dec 2020 04:27:03 +0530 From: "Shankar, Uma" To: Andres Calderon Jaramillo , "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH] drm/i915/display: Prevent double YUV range correction on HDR planes Thread-Index: AQHW0mc48eW/5ImNekysZtw4zTvSo6n3M0Iw Date: Mon, 14 Dec 2020 22:57:03 +0000 Message-ID: <9448bc8ea67a49d6a1ebf208824e5472@intel.com> References: <20201214221934.2478240-1-andrescj@google.com> In-Reply-To: <20201214221934.2478240-1-andrescj@google.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 x-originating-ip: [10.223.10.1] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Prevent double YUV range correction on HDR planes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andres Calderon Jaramillo , "seanpaul@chromium.org" , "Venkatesh Reddy, Sushma" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" > -----Original Message----- > From: andrescj via sendgmr > On Behalf Of Andres Calderon Jaramillo > Sent: Tuesday, December 15, 2020 3:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: Shankar, Uma ; Venkatesh Reddy, Sushma > ; seanpaul@chromium.org; Andres > Calderon Jaramillo > Subject: [PATCH] drm/i915/display: Prevent double YUV range correction on HDR > planes > > From: Andres Calderon Jaramillo > > Prevent the ICL HDR plane pipeline from performing YUV color range correction > twice when the input is in limited range. > > Before this patch the following could happen: user space gives us a YUV buffer in > limited range; per the pipeline in [1], the plane would first go through a "YUV > Range correct" stage that expands the range; the plane would then go through > the "Input CSC" stage which would also expand the range because > icl_program_input_csc() would use a matrix and an offset that assume limited- > range input; this would ultimately cause dark and light colors to appear darker > and lighter than they should respectively. > > This is an issue because if a buffer switches between being scanned out and > being composited with the GPU, the user will see a color difference. > If this switching happens quickly and frequently, the user will perceive this as a > flickering. > > [1] https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-icllp- > vol12-displayengine_0.pdf#page=281 Change looks good to me, double conversion should not be done. Plane input csc coefficients take care of the limited range. Reviewed-by: Uma Shankar > Signed-off-by: Andres Calderon Jaramillo > --- > drivers/gpu/drm/i915/display/intel_display.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 761be8deaa9b..aeea344b06ad 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -4811,6 +4811,13 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state > *crtc_state, > plane_color_ctl |= > PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE; > } else if (fb->format->is_yuv) { > plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE; > + > + /* > + * Disable the YUV range correction stage because the input CSC > + * stage already takes care of range conversion by using separate > + * matrices and offsets depending on the color range. > + */ > + plane_color_ctl |= > PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE; > } > > return plane_color_ctl; > -- > 2.29.2.684.gfbc64c5ab5-goog _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx