From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00466C5AD49 for ; Fri, 6 Jun 2025 13:44:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 78D3C10EAA7; Fri, 6 Jun 2025 13:44:44 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="GioOEX+k"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by gabe.freedesktop.org (Postfix) with ESMTPS id B35DC10EAA3; Fri, 6 Jun 2025 13:44:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1749217482; x=1780753482; h=from:to:cc:subject:in-reply-to:references:date: message-id:mime-version:content-transfer-encoding; bh=GEDbSQ7ZOoJ6jzoRAHxI73TK4A+9fWa398kKpVNu4k8=; b=GioOEX+khf6kSZFnPlJ/gjDCOhWLyVH0EXoLlUDiF46h07fmkkRF1h1l iW2ZZQHajnwzo/LyW7iUfJulsjgTpXN3zYtuSoX/hwb2qP71TR5EnEqv+ tPIOXR6y7jGBem90DqJ3rS96uhG3qaQyOW03BzuY2sRHoacIkhODIFqzE RUsgwZWQVBgw3YP8ZJmiDC8OBbop7GiG7/0RCuMj3Js54MHzMJJ5prEQ+ ZwZOYFYP4j0w1OLJ1FTzmEXPRloKDPykLmEVbuP5jaGyJYOtwaDSwPBHq nQJQbqyMXeAwnGO2G8fa/14m+Jf2nrVsTDOfwKlgC08mCJESKZHuQWZ5+ A==; X-CSE-ConnectionGUID: FKbDz0S5TE2ndaOniAVHig== X-CSE-MsgGUID: OZdjfsyMQtCOMHuDi4r76g== X-IronPort-AV: E=McAfee;i="6800,10657,11456"; a="76764995" X-IronPort-AV: E=Sophos;i="6.16,215,1744095600"; d="scan'208";a="76764995" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jun 2025 06:44:41 -0700 X-CSE-ConnectionGUID: /7d4reggQ1+T89F8ESL6cA== X-CSE-MsgGUID: rntDNyotQg6Jdy7x/yJ2mQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.16,215,1744095600"; d="scan'208";a="149669988" Received: from pgcooper-mobl3.ger.corp.intel.com (HELO localhost) ([10.245.245.33]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jun 2025 06:44:40 -0700 From: Jani Nikula To: Imre Deak , intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Ville =?utf-8?B?U3lyasOkbMOk?= Subject: Re: [PATCH v3 5/5] drm/i915/dp: Disable the AUX DPCD probe quirk if it's not required In-Reply-To: <20250605082850.65136-6-imre.deak@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20250605082850.65136-1-imre.deak@intel.com> <20250605082850.65136-6-imre.deak@intel.com> Date: Fri, 06 Jun 2025 16:44:37 +0300 Message-ID: <99b831c92a446eb5e33d8d9536f6750d4a6e3ae8@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 05 Jun 2025, Imre Deak wrote: > Reading DPCD registers has side-effects and some of these can cause a > problem for instance during link training. Based on this it's better to > avoid the probing quirk done before each DPCD register read, limiting > this to the monitor which requires it. The only known problematic > monitor is an external SST sink, so keep the quirk disabled always for > eDP and MST sinks. Reenable the quirk after a hotplug event and after > resuming from a power state without hotplug support, until the > subsequent EDID based detection. > > Cc: Ville Syrj=C3=A4l=C3=A4 > Cc: Jani Nikula > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++++-- > drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 ++ > drivers/gpu/drm/i915/display/intel_hotplug.c | 10 ++++++++++ > 3 files changed, 21 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i9= 15/display/intel_dp.c > index 208a953b04a2f..d65a18fc1aeb9 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -5747,6 +5747,11 @@ intel_dp_set_edid(struct intel_dp *intel_dp) > /* Below we depend on display info having been updated */ > drm_edid_connector_update(&connector->base, drm_edid); >=20=20 > + if (!intel_dp_is_edp(intel_dp)) Why does this depend on !edp? Feels like unnecessary optimization based on your knowledge of that one specific display. > + drm_dp_dpcd_set_probe_quirk(&intel_dp->aux, > + drm_edid_has_quirk(&connector->base, > + DRM_EDID_QUIRK_DP_DPCD_PROBE)); > + > vrr_capable =3D intel_vrr_is_capable(connector); > drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] VRR capable: %s\n", > connector->base.base.id, connector->base.name, str_yes_no(vrr_capa= ble)); > @@ -5881,6 +5886,7 @@ intel_dp_detect(struct drm_connector *_connector, > intel_dp_print_rates(intel_dp); >=20=20 > if (intel_dp->is_mst) { > + drm_dp_dpcd_set_probe_quirk(&intel_dp->aux, false); Isn't this excessive? Haven't we already set the quirk state? > /* > * If we are in MST mode then this connector > * won't appear connected or have anything > @@ -6321,10 +6327,11 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig= _port, bool long_hpd) > * complete the DP tunnel BW request for the latter connector/encoder > * waiting for this encoder's DPRX read, perform a dummy read here. > */ > - if (long_hpd) > + if (long_hpd) { > + drm_dp_dpcd_set_probe_quirk(&intel_dp->aux, true); > + > intel_dp_read_dprx_caps(intel_dp, dpcd); >=20=20 > - if (long_hpd) { > intel_dp->reset_link_params =3D true; > intel_dp_invalidate_source_oui(intel_dp); >=20=20 > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/dr= m/i915/display/intel_dp_aux.c > index bf8e8e0cc19c9..410252ba6fd16 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c > @@ -835,6 +835,8 @@ void intel_dp_aux_init(struct intel_dp *intel_dp) >=20=20 > intel_dp->aux.transfer =3D intel_dp_aux_transfer; > cpu_latency_qos_add_request(&intel_dp->pm_qos, PM_QOS_DEFAULT_VALUE); > + > + drm_dp_dpcd_set_probe_quirk(&intel_dp->aux, !intel_dp_is_edp(intel_dp)); > } >=20=20 > static enum aux_ch default_aux_ch(struct intel_encoder *encoder) > diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/d= rm/i915/display/intel_hotplug.c > index 74fe398663d63..1093c6c3714c0 100644 > --- a/drivers/gpu/drm/i915/display/intel_hotplug.c > +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c > @@ -33,6 +33,7 @@ > #include "intel_display_core.h" > #include "intel_display_rpm.h" > #include "intel_display_types.h" > +#include "intel_dp.h" > #include "intel_hdcp.h" > #include "intel_hotplug.h" > #include "intel_hotplug_irq.h" > @@ -906,9 +907,18 @@ void intel_hpd_poll_enable(struct intel_display *dis= play) > */ > void intel_hpd_poll_disable(struct intel_display *display) > { > + struct intel_encoder *encoder; > + > if (!HAS_DISPLAY(display)) > return; >=20=20 > + for_each_intel_dp(display->drm, encoder) { > + struct intel_dp *intel_dp =3D enc_to_intel_dp(encoder); > + > + if (!intel_dp_is_edp(intel_dp)) > + drm_dp_dpcd_set_probe_quirk(&intel_dp->aux, true); > + } > + > WRITE_ONCE(display->hotplug.poll_enabled, false); >=20=20 > spin_lock_irq(&display->irq.lock); --=20 Jani Nikula, Intel