From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?Q?Peter_Fr=C3=BChberger?= Subject: Re: drm/i915 4.5/4.6 stable backport request for CHV Date: Wed, 22 Jun 2016 15:55:11 +0200 Message-ID: References: <1464337832-15948-1-git-send-email-ville.syrjala@linux.intel.com> <20160604210658.GA4068@kroah.com> <20160606093216.GD4329@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0830179214==" Return-path: Received: from mail-io0-x22e.google.com (mail-io0-x22e.google.com [IPv6:2607:f8b0:4001:c06::22e]) by gabe.freedesktop.org (Postfix) with ESMTPS id BE54B6E05C for ; Wed, 22 Jun 2016 13:55:12 +0000 (UTC) Received: by mail-io0-x22e.google.com with SMTP id g13so37773467ioj.1 for ; Wed, 22 Jun 2016 06:55:12 -0700 (PDT) In-Reply-To: <20160606093216.GD4329@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: =?UTF-8?B?VmlsbGUgU3lyasOkbMOk?= Cc: Greg KH , intel-gfx@lists.freedesktop.org, stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org --===============0830179214== Content-Type: multipart/alternative; boundary=94eb2c18a67443a1f90535de493d --94eb2c18a67443a1f90535de493d Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Hi guys, 2016-06-06 11:32 GMT+02:00 Ville Syrj=C3=A4l=C3=A4 : > On Sat, Jun 04, 2016 at 02:06:58PM -0700, Greg KH wrote: > > On Fri, May 27, 2016 at 11:30:30AM +0300, ville.syrjala@linux.intel.com > wrote: > > > From: Ville Syrj=C3=A4l=C3=A4 > > > > > > Several nasty i915 regressions affecting CHV slipped through > > > to 4.5 and 4.6. > > > > > > The first fix we want in 4.5 and 4.6 is > > > commit caed361d83b2 ("drm/i915: Fix watermarks for VLV/CHV") > > > It won't cherry-pick cleanly to either one, so I've included conflict > > > free versions for both. This one fixes display FIFO underruns that ca= n > > > lead to the screen totally blanking out. > > > > Now applied, thanks. > > > > > The other one I'd like to have in 4.6 is > > > commit 9f6151c90390 ("drm/i915: Pass the correct crtc state to > .update_plane()") > > > which avoids a totally corrupted display in some cases. > > > > Now applied. > > > > > And the third on is a bit more annoying. The regression is caused by > > > commit 9dbaab56ac09 ("drm/i915: Exit cherryview_irq_handler() after > one pass") > > > which I though we had prevented from getting out on its own, but turn= s > > > out I was wrong. It basically makes the GPU unusable, so we do need t= o > > > fix it somehow. The simple solution would be to revert it in 4.6 only= . > > > The more complicated solution is to backport the proper fix, which mo= re > > > or less requires the following set of commits [1], which is maybe a b= it > > > too much for stable. I could try to trim it a bit perhaps, but then w= e > > > start to enter the territory of untested code which I don't > particularly > > > like. Let me know what you think. > > > > > > [1] > > > 1e1cace942ef ("drm/i915: Eliminate loop from VLV irq handler") > > > a5e485a95c9c ("drm/i915: Clear VLV_IER around irq processing") > > > 4a0a0202b023 ("drm/i915: Clear VLV_MASTER_IER around irq processing"= ) > > > 7ce4d1f2730f ("drm/i915: Clear VLV_IIR after PIPESTAT") > > > 34c7b8a7b8b5 ("drm/i915: Set up VLV_MASTER_IER consistently") > > > e5328c43d46e ("drm/i915: Use GEN8_MASTER_IRQ_CONTROL consistently") > > > 71b8b41d5b35 ("drm/i915: Move DPINVGTT setup to > vlv_display_irq_reset()") > > > 6b7eafc1b43d ("drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh > display irq postinstall") > > > 9ab981f22bef ("drm/i915: Use GEN5_IRQ_INIT() in > vlv_display_irq_postinstall()") > > > d6c698035892 ("drm/i915: Clear display interrupt before enabling whe= n > turning on the power well") > > > 8bb613068a63 ("drm/i915: Move vlv/chv display irq code to a more > logical place") > > > 9918271efc7a ("drm/i915: Skip display irq setup if display irqs > aren't flagged as enabled") > > > ad22d10654ea ("drm/i915: Fix up vlv/chv display irq setup") > > > 93de68f94081 ("drm/i915: Remove "VLV magic" from irq setup") > > > > I think reverting that one patch for 4.6 makes more sense than adding > > all of these patches. I'll do that if you want me to. > > That works for me. Thanks. > > -- > Ville Syrj=C3=A4l=C3=A4 > Intel OTC Sorry for bothering you. Will the revert make it into 4.6.3? Without it BSW on 4.6 is not really usable. Thanks much in advance Peter --=20 Key-ID: 0x1A995A9B keyserver: pgp.mit.edu =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Fingerprint: 4606 DA19 EC2E 9A0B 0157 C81B DA07 CF63 1A99 5A9B --94eb2c18a67443a1f90535de493d Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Hi guys,

2016-06-06 11:32 GMT+02:00 Ville Syrj=C3=A4l=C3=A4 <vi= lle.syrjala@linux.intel.com>:
On Sat, Jun 04, 2016 at 02:06:58= PM -0700, Greg KH wrote:
> On Fri, May 27, 2016 at 11:30:30AM +0300, ville.syrjala@linux.intel.com wrote:
> > From: Ville Syrj=C3=A4l=C3=A4 <ville.syrjala@linux.intel.com>
> >
> > Several nasty i915 regressions affecting CHV slipped through
> > to 4.5 and 4.6.
> >
> > The first fix we want in 4.5 and 4.6 is
> > commit caed361d83b2 ("drm/i915: Fix watermarks for VLV/CHV&q= uot;)
> > It won't cherry-pick cleanly to either one, so I've inclu= ded conflict
> > free versions for both. This one fixes display FIFO underruns tha= t can
> > lead to the screen totally blanking out.
>
> Now applied, thanks.
>
> > The other one I'd like to have in 4.6 is
> > commit 9f6151c90390 ("drm/i915: Pass the correct crtc state = to .update_plane()")
> > which avoids a totally corrupted display in some cases.
>
> Now applied.
>
> > And the third on is a bit more annoying. The regression is caused= by
> > commit 9dbaab56ac09 ("drm/i915: Exit cherryview_irq_handler(= ) after one pass")
> > which I though we had prevented from getting out on its own, but = turns
> > out I was wrong. It basically makes the GPU unusable, so we do ne= ed to
> > fix it somehow. The simple solution would be to revert it in 4.6 = only.
> > The more complicated solution is to backport the proper fix, whic= h more
> > or less requires the following set of commits [1], which is maybe= a bit
> > too much for stable. I could try to trim it a bit perhaps, but th= en we
> > start to enter the territory of untested code which I don't p= articularly
> > like. Let me know what you think.
> >
> > [1]
> >=C2=A0 1e1cace942ef ("drm/i915: Eliminate loop from VLV irq h= andler")
> >=C2=A0 a5e485a95c9c ("drm/i915: Clear VLV_IER around irq proc= essing")
> >=C2=A0 4a0a0202b023 ("drm/i915: Clear VLV_MASTER_IER around i= rq processing")
> >=C2=A0 7ce4d1f2730f ("drm/i915: Clear VLV_IIR after PIPESTAT&= quot;)
> >=C2=A0 34c7b8a7b8b5 ("drm/i915: Set up VLV_MASTER_IER consist= ently")
> >=C2=A0 e5328c43d46e ("drm/i915: Use GEN8_MASTER_IRQ_CONTROL c= onsistently")
> >=C2=A0 71b8b41d5b35 ("drm/i915: Move DPINVGTT setup to vlv_di= splay_irq_reset()")
> >=C2=A0 6b7eafc1b43d ("drm/i915: Warn if irq_mask isn't ~0= during vlv/cvh display irq postinstall")
> >=C2=A0 9ab981f22bef ("drm/i915: Use GEN5_IRQ_INIT() in vlv_di= splay_irq_postinstall()")
> >=C2=A0 d6c698035892 ("drm/i915: Clear display interrupt befor= e enabling when turning on the power well")
> >=C2=A0 8bb613068a63 ("drm/i915: Move vlv/chv display irq code= to a more logical place")
> >=C2=A0 9918271efc7a ("drm/i915: Skip display irq setup if dis= play irqs aren't flagged as enabled")
> >=C2=A0 ad22d10654ea ("drm/i915: Fix up vlv/chv display irq se= tup")
> >=C2=A0 93de68f94081 ("drm/i915: Remove "VLV magic" = from irq setup")
>
> I think reverting that one patch for 4.6 makes more sense than adding<= br> > all of these patches.=C2=A0 I'll do that if you want me to.

That works for me. Thanks.

--
Ville Syrj=C3=A4l=C3=A4
Intel OTC

Sorry for bothering you. W= ill the revert make it into 4.6.3? Without it BSW on 4.6 is not really usab= le.

Thanks much in advance
Peter=C2=A0



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