Re: [PATCH v10 21/21] gpu: nova-core: Use runtime BAR1 size instead of hardcoded 256MB

Joel Fernandes
2026-04-15T20:24:06Z

On Thu, Apr 02, 2026 at 02:54:30PM +0900, Eliot Courtney wrote:
> On Wed Apr 1, 2026 at 6:20 AM JST, Joel Fernandes wrote:
> > From: Zhi Wang <zhiw@nvidia.com>
> >
> > Remove the hardcoded BAR1_SIZE = SZ_256M constant. On GPUs like L40 the
> > BAR1 aperture is larger than 256MB; using a hardcoded size prevents large
> > BAR1 from working and mapping it would fail.
> >
> > Signed-off-by: Zhi Wang <zhiw@nvidia.com>
> > Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
> > ---
> > drivers/gpu/nova-core/driver.rs | 8 ++------
> > drivers/gpu/nova-core/gpu.rs | 7 +------
> > 2 files changed, 3 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs
> > index b1aafaff0cee..6f95f8672158 100644
> > --- a/drivers/gpu/nova-core/driver.rs
> > +++ b/drivers/gpu/nova-core/driver.rs
> > @@ -13,10 +13,7 @@
> > Vendor, //
> > },
> > prelude::*,
> > - sizes::{
> > - SZ_16M,
> > - SZ_256M, //
> > - },
> > + sizes::SZ_16M,
> > sync::{
> > atomic::{
> > Atomic,
> > @@ -40,7 +37,6 @@ pub(crate) struct NovaCore {
> > }
> >
> > const BAR0_SIZE: usize = SZ_16M;
> > -pub(crate) const BAR1_SIZE: usize = SZ_256M;
> >
> > // For now we only support Ampere which can use up to 47-bit DMA addresses.
> > //
> > @@ -51,7 +47,7 @@ pub(crate) struct NovaCore {
> > const GPU_DMA_BITS: u32 = 47;
> >
> > pub(crate) type Bar0 = pci::Bar<BAR0_SIZE>;
> > -pub(crate) type Bar1 = pci::Bar<BAR1_SIZE>;
> > +pub(crate) type Bar1 = pci::Bar;
> >
> > kernel::pci_device_table!(
> > PCI_TABLE,
> > diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
> > index 8206ec015b26..ba6f1f6f0485 100644
> > --- a/drivers/gpu/nova-core/gpu.rs
> > +++ b/drivers/gpu/nova-core/gpu.rs
> > @@ -353,16 +353,11 @@ pub(crate) fn run_selftests(
> >
> > #[cfg(CONFIG_NOVA_MM_SELFTESTS)]
> > fn run_mm_selftests(self: Pin<&mut Self>, pdev: &pci::Device<device::Bound>) -> Result {
> > - use crate::driver::BAR1_SIZE;
> > -
> > // PRAMIN aperture self-tests.
> > crate::mm::pramin::run_self_test(pdev.as_ref(), self.mm.pramin(), self.spec.chipset)?;
> >
> > // BAR1 self-tests.
> > - let bar1 = Arc::pin_init(
> > - pdev.iomap_region_sized::<BAR1_SIZE>(1, c"nova-core/bar1"),
> > - GFP_KERNEL,
> > - )?;
> > + let bar1 = Arc::pin_init(pdev.iomap_region(1, c"nova-core/bar1"), GFP_KERNEL)?;
> > let bar1_access = bar1.access(pdev.as_ref())?;
> >
> > crate::mm::bar_user::run_self_test(
>
> Can we move this directly after patch 17 which adds the fixed bar1? Or
> alternatively fold it in while preserving Zhi's attribution (I am not
> sure what the conventional method for this is).

Generally, squashing and attribution works. I will do that with attribution.
(Zhi did tell me he would be Ok with that as well in this instance).

thanks,

--
Joel Fernandes