* [PATCH 0/2] Limit minimum BPP to 30 for HDR content.
@ 2025-07-30 5:55 Chaitanya Kumar Borah
2025-07-30 5:55 ` [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse Chaitanya Kumar Borah
` (5 more replies)
0 siblings, 6 replies; 9+ messages in thread
From: Chaitanya Kumar Borah @ 2025-07-30 5:55 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: imre.deak, ville.syrjala, uma.shankar, chaitanya.kumar.borah
Bandwidth calculations in intel_dp_compute_link_config_wide() can lead
to selecting of lower bpp (18/24). It does not account for the fact that
user content can be HDR and needs 10bpc (BPP/3) for fidelity.
This can specifically happen in cases of DRRS eDP panel where we keep the
link rate running according to the highest refresh rate the panel
supports [1]. If such panel support 10bpc (without DSC) only at a lower
refresh rate mode, the inflated link rate forces a lower BPP selection.
This series takes into account the "HDR_OUTPUT_METADATA" connector property
and limits the minimum BPP to 30 in case user-space sets the property with
ST2084 metadata. If the required bandwidth for 30 bpp cannot be supported,
the driver will either fall back to DSC or reject the mode
during atomic check if DSC is not supported.
This approach preserves the DRRS behaviour of the panel and makes the assumption
that it will support 10bpc with all it's advertised modes atleast with DSC.
[1] https://lore.kernel.org/intel-gfx/20220907091057.11572-16-ville.syrjala@linux.intel.com/
Chaitanya Kumar Borah (2):
drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse
drm/i915/dp: Set min_bpp limit to 30 in HDR mode
drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++----
drivers/gpu/drm/i915/display/intel_dp.h | 3 ++-
.../drm/i915/display/intel_dp_aux_backlight.c | 13 ----------
drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +++++----
4 files changed, 29 insertions(+), 22 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse
2025-07-30 5:55 [PATCH 0/2] Limit minimum BPP to 30 for HDR content Chaitanya Kumar Borah
@ 2025-07-30 5:55 ` Chaitanya Kumar Borah
2025-08-11 5:33 ` Shankar, Uma
2025-07-30 5:55 ` [PATCH 2/2] drm/i915/dp: Set min_bpp limit to 30 in HDR mode Chaitanya Kumar Borah
` (4 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Chaitanya Kumar Borah @ 2025-07-30 5:55 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: imre.deak, ville.syrjala, uma.shankar, chaitanya.kumar.borah
The intel_dp_in_hdr_mode() helper was previously defined in
intel_dp_aux_backlight.c but is generally useful beyond that
context. Move the function to intel_dp.c and declare it in
intel_dp.h to make it accessible to other DP-related code
paths that need to check HDR metadata state.
This is a pure refactor with no functional change and
prepares for a follow-up patch that uses this helper.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++++++++
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
.../gpu/drm/i915/display/intel_dp_aux_backlight.c | 13 -------------
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 54d88f24b689..59d814abd3a9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2917,6 +2917,19 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
}
}
+bool
+intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state)
+{
+ struct hdr_output_metadata *hdr_metadata;
+
+ if (!conn_state->hdr_output_metadata)
+ return false;
+
+ hdr_metadata = conn_state->hdr_output_metadata->data;
+
+ return hdr_metadata->hdmi_metadata_type1.eotf == HDMI_EOTF_SMPTE_ST2084;
+}
+
static void
intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 0657f5681196..5def589e3c0e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -214,5 +214,6 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
+bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state);
#endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 41228478b21c..12084a542fc5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -225,19 +225,6 @@ intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state,
connector->base.base.id, connector->base.name);
}
-static bool
-intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state)
-{
- struct hdr_output_metadata *hdr_metadata;
-
- if (!conn_state->hdr_output_metadata)
- return false;
-
- hdr_metadata = conn_state->hdr_output_metadata->data;
-
- return hdr_metadata->hdmi_metadata_type1.eotf == HDMI_EOTF_SMPTE_ST2084;
-}
-
static void
intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state, u32 level)
{
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915/dp: Set min_bpp limit to 30 in HDR mode
2025-07-30 5:55 [PATCH 0/2] Limit minimum BPP to 30 for HDR content Chaitanya Kumar Borah
2025-07-30 5:55 ` [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse Chaitanya Kumar Borah
@ 2025-07-30 5:55 ` Chaitanya Kumar Borah
2025-08-11 5:38 ` Shankar, Uma
2025-07-30 12:21 ` ✗ i915.CI.BAT: failure for Limit minimum BPP to 30 for HDR content Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 9+ messages in thread
From: Chaitanya Kumar Borah @ 2025-07-30 5:55 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: imre.deak, ville.syrjala, uma.shankar, chaitanya.kumar.borah
Update intel_dp_compute_config_limits() to use a minimum of
30 bits per pixel when the connector is in HDR mode
(specifically, when EOTF is SMPTE ST2084), aligning with HDR
display requirements.
To support this, the function now takes a drm_connector_state
instead of an intel_connector, and the required updates are
made in all call sites, including MST handling.
This ensures sufficient bitdepth for HDR content to avoid
banding.
If the required bandwidth for 30 bpp cannot be supported,
the driver will either fall back to DSC or reject the mode
during atomic check if DSC is not supported.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++----
drivers/gpu/drm/i915/display/intel_dp.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +++++++----
3 files changed, 15 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 59d814abd3a9..49a3ff414dc4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2536,13 +2536,15 @@ intel_dp_dsc_compute_pipe_bpp_limits(struct intel_dp *intel_dp,
bool
intel_dp_compute_config_limits(struct intel_dp *intel_dp,
- struct intel_connector *connector,
+ struct drm_connector_state *conn_state,
struct intel_crtc_state *crtc_state,
bool respect_downstream_limits,
bool dsc,
struct link_config_limits *limits)
{
bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
+ struct intel_connector *connector =
+ to_intel_connector(conn_state->connector);
limits->min_rate = intel_dp_min_link_rate(intel_dp);
limits->max_rate = intel_dp_max_link_rate(intel_dp);
@@ -2552,7 +2554,8 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
limits->min_lane_count = intel_dp_min_lane_count(intel_dp);
limits->max_lane_count = intel_dp_max_lane_count(intel_dp);
- limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);
+ limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 :
+ intel_dp_min_bpp(crtc_state->output_format);
if (is_mst) {
/*
* FIXME: If all the streams can't fit into the link with their
@@ -2651,7 +2654,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
- !intel_dp_compute_config_limits(intel_dp, connector, pipe_config,
+ !intel_dp_compute_config_limits(intel_dp, conn_state, pipe_config,
respect_downstream_limits,
false,
&limits);
@@ -2685,7 +2688,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
str_yes_no(ret), str_yes_no(joiner_needs_dsc),
str_yes_no(intel_dp->force_dsc_en));
- if (!intel_dp_compute_config_limits(intel_dp, connector, pipe_config,
+ if (!intel_dp_compute_config_limits(intel_dp, conn_state, pipe_config,
respect_downstream_limits,
true,
&limits))
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 5def589e3c0e..f90cfd1dbbd0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -193,7 +193,7 @@ void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
int intel_dp_output_bpp(enum intel_output_format output_format, int bpp);
bool intel_dp_compute_config_limits(struct intel_dp *intel_dp,
- struct intel_connector *connector,
+ struct drm_connector_state *conn_state,
struct intel_crtc_state *crtc_state,
bool respect_downstream_limits,
bool dsc,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 74497c9a0554..352f7ef29c28 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -611,12 +611,15 @@ adjust_limits_for_dsc_hblank_expansion_quirk(struct intel_dp *intel_dp,
static bool
mst_stream_compute_config_limits(struct intel_dp *intel_dp,
- struct intel_connector *connector,
+ struct drm_connector_state *conn_state,
struct intel_crtc_state *crtc_state,
bool dsc,
struct link_config_limits *limits)
{
- if (!intel_dp_compute_config_limits(intel_dp, connector,
+ struct intel_connector *connector =
+ to_intel_connector(conn_state->connector);
+
+ if (!intel_dp_compute_config_limits(intel_dp, conn_state,
crtc_state, false, dsc,
limits))
return false;
@@ -665,7 +668,7 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
- !mst_stream_compute_config_limits(intel_dp, connector,
+ !mst_stream_compute_config_limits(intel_dp, conn_state,
pipe_config, false, &limits);
if (!dsc_needed) {
@@ -691,7 +694,7 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
str_yes_no(intel_dp->force_dsc_en));
- if (!mst_stream_compute_config_limits(intel_dp, connector,
+ if (!mst_stream_compute_config_limits(intel_dp, conn_state,
pipe_config, true,
&limits))
return -EINVAL;
--
2.25.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ i915.CI.BAT: failure for Limit minimum BPP to 30 for HDR content.
2025-07-30 5:55 [PATCH 0/2] Limit minimum BPP to 30 for HDR content Chaitanya Kumar Borah
2025-07-30 5:55 ` [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse Chaitanya Kumar Borah
2025-07-30 5:55 ` [PATCH 2/2] drm/i915/dp: Set min_bpp limit to 30 in HDR mode Chaitanya Kumar Borah
@ 2025-07-30 12:21 ` Patchwork
2025-08-04 9:19 ` ✓ i915.CI.BAT: success " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2025-07-30 12:21 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4932 bytes --]
== Series Details ==
Series: Limit minimum BPP to 30 for HDR content.
URL : https://patchwork.freedesktop.org/series/152253/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16939 -> Patchwork_152253v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_152253v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_152253v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/index.html
Participating hosts (45 -> 44)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_152253v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-mtlp-8/igt@i915_selftest@live.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-mtlp-8/igt@i915_selftest@live.html
Known issues
------------
Here are the changes found in Patchwork_152253v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-n3050: [PASS][3] -> [ABORT][4] ([i915#12904]) +1 other test abort
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
* igt@i915_selftest@live@workarounds:
- bat-dg2-11: [PASS][5] -> [DMESG-FAIL][6] ([i915#12061]) +1 other test dmesg-fail
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-dg2-11/igt@i915_selftest@live@workarounds.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-dg2-11/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@dmabuf@all-tests:
- bat-apl-1: [ABORT][7] ([i915#12904]) -> [PASS][8] +1 other test pass
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-apl-1/igt@dmabuf@all-tests.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-apl-1/igt@dmabuf@all-tests.html
* igt@i915_selftest@live:
- bat-jsl-1: [DMESG-WARN][9] ([i915#13827]) -> [PASS][10] +1 other test pass
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-jsl-1/igt@i915_selftest@live.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-jsl-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- bat-mtlp-6: [DMESG-FAIL][11] ([i915#12061]) -> [PASS][12] +1 other test pass
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-atsm-1: [DMESG-FAIL][13] ([i915#12061] / [i915#14204]) -> [DMESG-FAIL][14] ([i915#12061] / [i915#13929])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-atsm-1/igt@i915_selftest@live.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][15] ([i915#14204]) -> [DMESG-FAIL][16] ([i915#13929])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-atsm-1/igt@i915_selftest@live@mman.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#13827]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13827
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
Build changes
-------------
* Linux: CI_DRM_16939 -> Patchwork_152253v1
CI-20190529: 20190529
CI_DRM_16939: 9378b693d04cb60c6d1b13150244c480a7cd2741 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8478: 3e7c2bd685397f852853878aef4d9c1e4889a28b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_152253v1: 9378b693d04cb60c6d1b13150244c480a7cd2741 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/index.html
[-- Attachment #2: Type: text/html, Size: 6185 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ i915.CI.BAT: success for Limit minimum BPP to 30 for HDR content.
2025-07-30 5:55 [PATCH 0/2] Limit minimum BPP to 30 for HDR content Chaitanya Kumar Borah
` (2 preceding siblings ...)
2025-07-30 12:21 ` ✗ i915.CI.BAT: failure for Limit minimum BPP to 30 for HDR content Patchwork
@ 2025-08-04 9:19 ` Patchwork
2025-08-18 7:54 ` ✓ i915.CI.BAT: success for Limit minimum BPP to 30 for HDR content. (rev2) Patchwork
2025-08-18 9:11 ` ✓ i915.CI.Full: " Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2025-08-04 9:19 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4883 bytes --]
== Series Details ==
Series: Limit minimum BPP to 30 for HDR content.
URL : https://patchwork.freedesktop.org/series/152253/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16939 -> Patchwork_152253v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/index.html
Participating hosts (45 -> 44)
------------------------------
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_152253v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-n3050: [PASS][1] -> [ABORT][2] ([i915#12904]) +1 other test abort
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][3] -> [INCOMPLETE][4] ([i915#14765])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-mtlp-8/igt@i915_selftest@live.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-mtlp-8/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_tlb:
- bat-mtlp-8: [PASS][5] -> [INCOMPLETE][6] ([i915#14781])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-mtlp-8/igt@i915_selftest@live@gt_tlb.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-mtlp-8/igt@i915_selftest@live@gt_tlb.html
* igt@i915_selftest@live@workarounds:
- bat-dg2-11: [PASS][7] -> [DMESG-FAIL][8] ([i915#12061]) +1 other test dmesg-fail
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-dg2-11/igt@i915_selftest@live@workarounds.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-dg2-11/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@dmabuf@all-tests:
- bat-apl-1: [ABORT][9] ([i915#12904]) -> [PASS][10] +1 other test pass
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-apl-1/igt@dmabuf@all-tests.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-apl-1/igt@dmabuf@all-tests.html
* igt@i915_selftest@live:
- bat-jsl-1: [DMESG-WARN][11] ([i915#13827]) -> [PASS][12] +1 other test pass
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-jsl-1/igt@i915_selftest@live.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-jsl-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- bat-mtlp-6: [DMESG-FAIL][13] ([i915#12061]) -> [PASS][14] +1 other test pass
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-mtlp-6/igt@i915_selftest@live@workarounds.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-atsm-1: [DMESG-FAIL][15] ([i915#12061] / [i915#14204]) -> [DMESG-FAIL][16] ([i915#12061] / [i915#13929])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-atsm-1/igt@i915_selftest@live.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][17] ([i915#14204]) -> [DMESG-FAIL][18] ([i915#13929])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16939/bat-atsm-1/igt@i915_selftest@live@mman.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#13827]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13827
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
[i915#14765]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14765
[i915#14781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14781
Build changes
-------------
* Linux: CI_DRM_16939 -> Patchwork_152253v1
CI-20190529: 20190529
CI_DRM_16939: 9378b693d04cb60c6d1b13150244c480a7cd2741 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8478: 3e7c2bd685397f852853878aef4d9c1e4889a28b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_152253v1: 9378b693d04cb60c6d1b13150244c480a7cd2741 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v1/index.html
[-- Attachment #2: Type: text/html, Size: 6147 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse
2025-07-30 5:55 ` [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse Chaitanya Kumar Borah
@ 2025-08-11 5:33 ` Shankar, Uma
0 siblings, 0 replies; 9+ messages in thread
From: Shankar, Uma @ 2025-08-11 5:33 UTC (permalink / raw)
To: Borah, Chaitanya Kumar, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Deak, Imre, ville.syrjala@linux.intel.com
> -----Original Message-----
> From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Sent: Wednesday, July 30, 2025 11:25 AM
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Deak, Imre <imre.deak@intel.com>; ville.syrjala@linux.intel.com; Shankar,
> Uma <uma.shankar@intel.com>; Borah, Chaitanya Kumar
> <chaitanya.kumar.borah@intel.com>
> Subject: [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader
> reuse
>
> The intel_dp_in_hdr_mode() helper was previously defined in
> intel_dp_aux_backlight.c but is generally useful beyond that context. Move the
> function to intel_dp.c and declare it in intel_dp.h to make it accessible to other DP-
> related code paths that need to check HDR metadata state.
>
> This is a pure refactor with no functional change and prepares for a follow-up
> patch that uses this helper.
Change Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 13 +++++++++++++
> drivers/gpu/drm/i915/display/intel_dp.h | 1 +
> .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 13 -------------
> 3 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 54d88f24b689..59d814abd3a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2917,6 +2917,19 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp
> *intel_dp,
> }
> }
>
> +bool
> +intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state) {
> + struct hdr_output_metadata *hdr_metadata;
> +
> + if (!conn_state->hdr_output_metadata)
> + return false;
> +
> + hdr_metadata = conn_state->hdr_output_metadata->data;
> +
> + return hdr_metadata->hdmi_metadata_type1.eotf ==
> +HDMI_EOTF_SMPTE_ST2084; }
> +
> static void
> intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
> struct intel_crtc_state *crtc_state, diff -
> -git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 0657f5681196..5def589e3c0e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -214,5 +214,6 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state
> *crtc_state,
>
> int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector); void
> intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
> +bool intel_dp_in_hdr_mode(const struct drm_connector_state
> +*conn_state);
>
> #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 41228478b21c..12084a542fc5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -225,19 +225,6 @@ intel_dp_aux_hdr_set_aux_backlight(const struct
> drm_connector_state *conn_state,
> connector->base.base.id, connector->base.name); }
>
> -static bool
> -intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state) -{
> - struct hdr_output_metadata *hdr_metadata;
> -
> - if (!conn_state->hdr_output_metadata)
> - return false;
> -
> - hdr_metadata = conn_state->hdr_output_metadata->data;
> -
> - return hdr_metadata->hdmi_metadata_type1.eotf ==
> HDMI_EOTF_SMPTE_ST2084;
> -}
> -
> static void
> intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state,
> u32 level) {
> --
> 2.25.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH 2/2] drm/i915/dp: Set min_bpp limit to 30 in HDR mode
2025-07-30 5:55 ` [PATCH 2/2] drm/i915/dp: Set min_bpp limit to 30 in HDR mode Chaitanya Kumar Borah
@ 2025-08-11 5:38 ` Shankar, Uma
0 siblings, 0 replies; 9+ messages in thread
From: Shankar, Uma @ 2025-08-11 5:38 UTC (permalink / raw)
To: Borah, Chaitanya Kumar, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Deak, Imre, ville.syrjala@linux.intel.com
> -----Original Message-----
> From: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Sent: Wednesday, July 30, 2025 11:25 AM
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Deak, Imre <imre.deak@intel.com>; ville.syrjala@linux.intel.com; Shankar,
> Uma <uma.shankar@intel.com>; Borah, Chaitanya Kumar
> <chaitanya.kumar.borah@intel.com>
> Subject: [PATCH 2/2] drm/i915/dp: Set min_bpp limit to 30 in HDR mode
>
> Update intel_dp_compute_config_limits() to use a minimum of
> 30 bits per pixel when the connector is in HDR mode (specifically, when EOTF is
> SMPTE ST2084), aligning with HDR display requirements.
>
> To support this, the function now takes a drm_connector_state instead of an
> intel_connector, and the required updates are made in all call sites, including MST
> handling.
>
> This ensures sufficient bitdepth for HDR content to avoid banding.
>
> If the required bandwidth for 30 bpp cannot be supported, the driver will either fall
> back to DSC or reject the mode during atomic check if DSC is not supported.
There will be some case where sink supports HDR but at a lower clock with same mode
and lower refresh rate. After driver rejects, since there is no reason for userspace to know,
it may end up not enabling HDR at all. Not sure, how many such real world sinks we have though.
This can be taken up later if something comes along like above.
For now, this Change Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++----
> drivers/gpu/drm/i915/display/intel_dp.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 +++++++----
> 3 files changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 59d814abd3a9..49a3ff414dc4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2536,13 +2536,15 @@ intel_dp_dsc_compute_pipe_bpp_limits(struct
> intel_dp *intel_dp,
>
> bool
> intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> - struct intel_connector *connector,
> + struct drm_connector_state *conn_state,
> struct intel_crtc_state *crtc_state,
> bool respect_downstream_limits,
> bool dsc,
> struct link_config_limits *limits) {
> bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
> + struct intel_connector *connector =
> + to_intel_connector(conn_state->connector);
>
> limits->min_rate = intel_dp_min_link_rate(intel_dp);
> limits->max_rate = intel_dp_max_link_rate(intel_dp); @@ -2552,7
> +2554,8 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> limits->min_lane_count = intel_dp_min_lane_count(intel_dp);
> limits->max_lane_count = intel_dp_max_lane_count(intel_dp);
>
> - limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);
> + limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 :
> + intel_dp_min_bpp(crtc_state->output_format);
> if (is_mst) {
> /*
> * FIXME: If all the streams can't fit into the link with their @@ -
> 2651,7 +2654,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
> joiner_needs_dsc = intel_dp_joiner_needs_dsc(display,
> num_joined_pipes);
>
> dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
> - !intel_dp_compute_config_limits(intel_dp, connector,
> pipe_config,
> + !intel_dp_compute_config_limits(intel_dp, conn_state,
> +pipe_config,
> respect_downstream_limits,
> false,
> &limits);
> @@ -2685,7 +2688,7 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
> str_yes_no(ret), str_yes_no(joiner_needs_dsc),
> str_yes_no(intel_dp->force_dsc_en));
>
> - if (!intel_dp_compute_config_limits(intel_dp, connector,
> pipe_config,
> + if (!intel_dp_compute_config_limits(intel_dp, conn_state,
> +pipe_config,
> respect_downstream_limits,
> true,
> &limits))
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index 5def589e3c0e..f90cfd1dbbd0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -193,7 +193,7 @@ void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
> int intel_dp_output_bpp(enum intel_output_format output_format, int bpp);
>
> bool intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> - struct intel_connector *connector,
> + struct drm_connector_state *conn_state,
> struct intel_crtc_state *crtc_state,
> bool respect_downstream_limits,
> bool dsc,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 74497c9a0554..352f7ef29c28 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -611,12 +611,15 @@ adjust_limits_for_dsc_hblank_expansion_quirk(struct
> intel_dp *intel_dp,
>
> static bool
> mst_stream_compute_config_limits(struct intel_dp *intel_dp,
> - struct intel_connector *connector,
> + struct drm_connector_state *conn_state,
> struct intel_crtc_state *crtc_state,
> bool dsc,
> struct link_config_limits *limits) {
> - if (!intel_dp_compute_config_limits(intel_dp, connector,
> + struct intel_connector *connector =
> + to_intel_connector(conn_state->connector);
> +
> + if (!intel_dp_compute_config_limits(intel_dp, conn_state,
> crtc_state, false, dsc,
> limits))
> return false;
> @@ -665,7 +668,7 @@ static int mst_stream_compute_config(struct
> intel_encoder *encoder,
> joiner_needs_dsc = intel_dp_joiner_needs_dsc(display,
> num_joined_pipes);
>
> dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
> - !mst_stream_compute_config_limits(intel_dp, connector,
> + !mst_stream_compute_config_limits(intel_dp, conn_state,
> pipe_config, false, &limits);
>
> if (!dsc_needed) {
> @@ -691,7 +694,7 @@ static int mst_stream_compute_config(struct
> intel_encoder *encoder,
> str_yes_no(intel_dp->force_dsc_en));
>
>
> - if (!mst_stream_compute_config_limits(intel_dp, connector,
> + if (!mst_stream_compute_config_limits(intel_dp, conn_state,
> pipe_config, true,
> &limits))
> return -EINVAL;
> --
> 2.25.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ i915.CI.BAT: success for Limit minimum BPP to 30 for HDR content. (rev2)
2025-07-30 5:55 [PATCH 0/2] Limit minimum BPP to 30 for HDR content Chaitanya Kumar Borah
` (3 preceding siblings ...)
2025-08-04 9:19 ` ✓ i915.CI.BAT: success " Patchwork
@ 2025-08-18 7:54 ` Patchwork
2025-08-18 9:11 ` ✓ i915.CI.Full: " Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2025-08-18 7:54 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 1086 bytes --]
== Series Details ==
Series: Limit minimum BPP to 30 for HDR content. (rev2)
URL : https://patchwork.freedesktop.org/series/152253/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17020 -> Patchwork_152253v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v2/index.html
Participating hosts (43 -> 42)
------------------------------
Missing (1): fi-snb-2520m
Changes
-------
No changes found
Build changes
-------------
* Linux: CI_DRM_17020 -> Patchwork_152253v2
CI-20190529: 20190529
CI_DRM_17020: e96ac495247bb459351af3e70cad06769afbb1a2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8495: b412b144685feadfd5675f3108de3d6820a4d1db @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_152253v2: e96ac495247bb459351af3e70cad06769afbb1a2 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v2/index.html
[-- Attachment #2: Type: text/html, Size: 1651 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ i915.CI.Full: success for Limit minimum BPP to 30 for HDR content. (rev2)
2025-07-30 5:55 [PATCH 0/2] Limit minimum BPP to 30 for HDR content Chaitanya Kumar Borah
` (4 preceding siblings ...)
2025-08-18 7:54 ` ✓ i915.CI.BAT: success for Limit minimum BPP to 30 for HDR content. (rev2) Patchwork
@ 2025-08-18 9:11 ` Patchwork
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2025-08-18 9:11 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 1140 bytes --]
== Series Details ==
Series: Limit minimum BPP to 30 for HDR content. (rev2)
URL : https://patchwork.freedesktop.org/series/152253/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_17020_full -> Patchwork_152253v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 14)
------------------------------
Additional (1): shard-snb-0
Missing (1): shard-dg2-set2
Changes
-------
No changes found
Build changes
-------------
* Linux: CI_DRM_17020 -> Patchwork_152253v2
CI-20190529: 20190529
CI_DRM_17020: e96ac495247bb459351af3e70cad06769afbb1a2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8495: b412b144685feadfd5675f3108de3d6820a4d1db @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_152253v2: e96ac495247bb459351af3e70cad06769afbb1a2 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152253v2/index.html
[-- Attachment #2: Type: text/html, Size: 1709 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2025-08-18 9:11 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-07-30 5:55 [PATCH 0/2] Limit minimum BPP to 30 for HDR content Chaitanya Kumar Borah
2025-07-30 5:55 ` [PATCH 1/2] drm/i915/dp: Refactor intel_dp_in_hdr_mode() for broader reuse Chaitanya Kumar Borah
2025-08-11 5:33 ` Shankar, Uma
2025-07-30 5:55 ` [PATCH 2/2] drm/i915/dp: Set min_bpp limit to 30 in HDR mode Chaitanya Kumar Borah
2025-08-11 5:38 ` Shankar, Uma
2025-07-30 12:21 ` ✗ i915.CI.BAT: failure for Limit minimum BPP to 30 for HDR content Patchwork
2025-08-04 9:19 ` ✓ i915.CI.BAT: success " Patchwork
2025-08-18 7:54 ` ✓ i915.CI.BAT: success for Limit minimum BPP to 30 for HDR content. (rev2) Patchwork
2025-08-18 9:11 ` ✓ i915.CI.Full: " Patchwork
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