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DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?AyVSVrEGdZORZzq0tQ0JwFbVgI8TFvOwpMFpdhv4ZhXefm2zWCNqwuVMuH74?= =?us-ascii?Q?8ayAn74wZYriQDHLIZAf468FOVV/KJPZhBjo3MQMKBXrSUcJTIDYiwdQxbHC?= =?us-ascii?Q?Eszp1QtZPKOzwr76GYr8AtNuw9lqHUQxfluulSIUI+eojc3OZcB5UlwOtizB?= =?us-ascii?Q?y3CwNLmCre24X2HSFvaFbCkWTSB0U21rM5ts6+BZEgS6lK0MW4nrbgbGtqH0?= =?us-ascii?Q?SyH6SNKiPQJ2rVjoqMsb2W4BonZyJedbnwWi91EBuOOtOsCaa8doHkjeu6Rm?= =?us-ascii?Q?GCniQez8t4pMD6BlE6tu4fCw9Z2PIwTDbtieni0vIo6PuZ/U/eaVOqIL9MUF?= =?us-ascii?Q?3sRyI4VioAjMRwLF8gIpNMHmNVv6vasbw2yyFmaeHihdW3fooaNq37LfOmTQ?= =?us-ascii?Q?21PulT0wvwdF1WRr+u7uobKqbxxWTuAlXG4xSAeZqgC1krsNPBg73cHW9mQh?= =?us-ascii?Q?taYEHgSKT8HW0OTuBam2c+bwRmL0t22SopSPpgWpI17iGppaCQwrYghQVFT0?= =?us-ascii?Q?Pa46ptTuzHdA9goAafa8/aiv/W8lsh2KdeS9rp9S8S03kk8Awc2SXgi3uFPw?= =?us-ascii?Q?hSeaZUFs4rvEw3JDeaheizNuiKMYlBgG+O2RtktgqE3zm/avtWIeH2KjbQea?= =?us-ascii?Q?aPx2saUXl2j9OONhVC4zchpBbEDhCVc4XQQFHVU+wM06VhcLSADKgeUnbQOU?= =?us-ascii?Q?EQiB4UC/WOci6o44IasxShQh+yLnVeTYwL29cJVQljFJyVRrFrF/Ys4Azxei?= =?us-ascii?Q?cxXNkeU1/NbZjwtDYoZLfPKrnweYZOrfe0TziNdighP8xNP1YxsB/lAFZz2S?= =?us-ascii?Q?/5yb+HFhwZ3BQYCb0EeX5WEi4JzQwnw6+n+NkGLQsGYEIF0J11yF5YrvfZL8?= =?us-ascii?Q?Qe5W8IrigXMIopvk8cNEf+2wTicE/syVNydoC4dbXk79gx1qjGzT+g0k7X1E?= =?us-ascii?Q?XD2PRl8Br45pqEd+Mm+VIARJf8uOOusWHpB4ByV7xwMkc728G6YTPlnYw/uX?= =?us-ascii?Q?H6mxQRyjaA+NAUUD/fAiZJNGYRYfHR+FUtajwZGc75kyuJaUoBBpnBt4eXZg?= =?us-ascii?Q?MKhd4nQpuZAzw4xVQrbEMWo7bdYywVc/OkoB+JKxF6DacyyvoYLgnKSKeiKr?= =?us-ascii?Q?P7bmFpvEvREAxZRZt1QcrFk0spVOI9pM4mGkbqM6ErVw5gX7cZbAILIbf7TS?= =?us-ascii?Q?ZTFjKQIgQLpY7TCuuLLTV/loiZBxO38xt9w6PeoROvmpjq2kS30Q8TrhfLwv?= =?us-ascii?Q?dulnWNPp54DmOGMPqogkNJDaI7DoD+/bnM14t1eRKZh6K2Qt9PxWgp/iWTHi?= =?us-ascii?Q?9wNzMI3ucbSqf0opF021ROyJsGmKVJQLxZeLA3peLTnYQyoDyM25w5GLVioC?= =?us-ascii?Q?zxNVG6DA4BPsWQSHzXRKHmuU+cQ8ZrBOGdcKyJ0ajvoN7607VvSFeeUhf+I+?= =?us-ascii?Q?4LRGt5/sXPVYBG8sTcFRknPLs0ud7TwN4H88Ly9GnpCtO0PR2ryvogmO145T?= =?us-ascii?Q?KQBXMMCvtNfruUOpAB766Tuo4TSRw1b4qTMyqEtyQUxUYQm0VsFXQTIGbn+K?= =?us-ascii?Q?CIWAPXsB6JlUPJo3cKANYkYUHtMJ79kw0uuewNd7q3e+zcYCH18wZOFqzJCq?= =?us-ascii?Q?Gg=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 06d1bffa-a4ec-4ec2-5a7e-08db08639900 X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6059.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2023 17:00:06.7589 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: iBiNeB0JZUTvyFkMfxuojGSXGgbovn/tV62DCGKc8OA18YYGyaCtxTj0Kq87K4D7bkdpFbgF3veujgkM+rtRjA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR11MB7346 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH] drm/i915/gt: Fix sphinx warnings for workarounds documentation X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, Jan 31, 2023 at 02:03:01PM +0100, Mauro Carvalho Chehab wrote: > > On 1/24/23 20:39, Rodrigo Vivi wrote: > > On Sat, Jan 21, 2023 at 04:08:53PM -0300, Gustavo Sousa wrote: > > > The wildchar ("*") used in the function name patterns in the > > > documentation was taken as a start of an "emphasis" inline markup. Wrap > > > the patterns with the inline literal markup and, for consistency, do the > > > same for the other function names mentioned. > > > > > > Fixes: 0c3064cf33fb ("drm/i915/doc: Document where to implement register workarounds") > > > Reported-by: kernel test robot > > > Signed-off-by: Gustavo Sousa > > Cc: Mauro Carvalho Chehab > > > > just in case he sees some better alternative for the escaping the '*' > > > > My fear is that this ``*_fn_name()`` could create invalid links in the doc... > > > Seems OK to me. ``foo`` is literal inline. It won't try to generate > cross-references. > > > Reviewed-by: Mauro Carvalho Chehab Gustavo and Mauro, please accept my apologies here. I ended up pushing the patch from Bagas that had a escape \* instead of the `` wrapper. For some unexcused reason I had missed Mauro's response here and forgot about this. I'm really sorry. And the escape sounded more natural so I just pushed it immediately. > > > > > > > > > --- > > > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++++++++++---------- > > > 1 file changed, 10 insertions(+), 10 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > > > index 918a271447e2..e849035d8dc5 100644 > > > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > > > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > > > @@ -30,8 +30,8 @@ > > > * creation to have a "primed golden context", i.e. a context image that > > > * already contains the changes needed to all the registers. > > > * > > > - * Context workarounds should be implemented in the *_ctx_workarounds_init() > > > - * variants respective to the targeted platforms. > > > + * Context workarounds should be implemented in the > > > + * ``*_ctx_workarounds_init()`` variants respective to the targeted platforms. > > > * > > > * - Engine workarounds: the list of these WAs is applied whenever the specific > > > * engine is reset. It's also possible that a set of engine classes share a > > > @@ -46,16 +46,16 @@ > > > * ``drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c`` for reference. > > > * > > > * Workarounds for registers specific to RCS and CCS should be implemented in > > > - * rcs_engine_wa_init() and ccs_engine_wa_init(), respectively; those for > > > - * registers belonging to BCS, VCS or VECS should be implemented in > > > - * xcs_engine_wa_init(). Workarounds for registers not belonging to a specific > > > - * engine's MMIO range but that are part of of the common RCS/CCS reset domain > > > - * should be implemented in general_render_compute_wa_init(). > > > + * ``rcs_engine_wa_init()`` and ``ccs_engine_wa_init()``, respectively; those > > > + * for registers belonging to BCS, VCS or VECS should be implemented in > > > + * ``xcs_engine_wa_init()``. Workarounds for registers not belonging to a > > > + * specific engine's MMIO range but that are part of of the common RCS/CCS > > > + * reset domain should be implemented in ``general_render_compute_wa_init()``. > > > * > > > * - GT workarounds: the list of these WAs is applied whenever these registers > > > * revert to their default values: on GPU reset, suspend/resume [1]_, etc. > > > * > > > - * GT workarounds should be implemented in the *_gt_workarounds_init() > > > + * GT workarounds should be implemented in the ``*_gt_workarounds_init()`` > > > * variants respective to the targeted platforms. > > > * > > > * - Register whitelist: some workarounds need to be implemented in userspace, > > > @@ -64,8 +64,8 @@ > > > * this is just a special case of a MMIO workaround (as we write the list of > > > * these to/be-whitelisted registers to some special HW registers). > > > * > > > - * Register whitelisting should be done in the *_whitelist_build() variants > > > - * respective to the targeted platforms. > > > + * Register whitelisting should be done in the ``*_whitelist_build()`` > > > + * variants respective to the targeted platforms. > > > * > > > * - Workaround batchbuffers: buffers that get executed automatically by the > > > * hardware on every HW context restore. These buffers are created and > > > -- > > > 2.39.0 > > >