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DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?TfkB93TgbIZAPnuq5a9CKzx0BuQDDHTESpt0lB4ChGhrgmoVKmLIesnP+4ti?= =?us-ascii?Q?RgwqZmV5J/AkwBxrOA7q4WfC8f781k20nBDd4WJr4VEeDE1wP7f4Ib1JSQrf?= =?us-ascii?Q?y6+naEGRYqGaEtrWPiGUor3DfMMOTbCH9n5m7Oct5p5vr9DyF93cIDuRF2Lu?= =?us-ascii?Q?EV/A3goCfGy57fTK0MVfud3PNsvmkLX5YlAt4rwKH6HSDt1Lgxbue07MfxN2?= =?us-ascii?Q?Eu5BHzIZQ/NcjnG6ZNIIUaDZaKvPfkGNY2xQpnFn+up0hNcJf+B3fBR6Ncbe?= =?us-ascii?Q?73BwOo80gz6gPNO4EWznjJc9Egw35Ss413I6dhRCX1FJ7VZbYAQw+GwcRghA?= =?us-ascii?Q?pBJ8Z/MbRthnqBGfdi6E9d1QOsiAqfr5B6sRFuNWZZ1H35Q3p4AQDpCxUz9Z?= =?us-ascii?Q?FCd4VFp7Vi8JCdgvIXdpHtIOsxm+qxuwMsTaHnDnSI8E7MDleDcvA5aQMWSR?= =?us-ascii?Q?7lVRWMY0OY8cur455LVYUpq7A6jou1nYW1EnRyOY5fF+6OLwuoOPcUMMUeEX?= =?us-ascii?Q?LFv0q9ChtuHVm33DlknasB+u7o1MGXWsOxtaRdjjXiHDbGGf4hCeiGfB1VMg?= =?us-ascii?Q?PpX87K3NYuIzImThr+49jkCm/+Pgg9V/kyPhAkdyLgCL6Gl9h79QzMJB9n0Z?= =?us-ascii?Q?/5rp+BB7P2cQtm+g+0inm9kZWoCmuDrGLIlGAxie6mFNou1UCoevqOylPkC6?= =?us-ascii?Q?MpUSQA4fLdFNMXw3eFLrG6gheXFSZNjVl0+cwemTXfebuZ6Dx//dFOGxFfdI?= =?us-ascii?Q?4HfXWatjCnstHoTWw1MQ4C2XbayejfTuSfRQfHU8+BZUL+D11cWSKajRRXL3?= =?us-ascii?Q?IVTdyRnY3f3x1op7JfOehMXUaZ6UAyT1RVwdfBR3OS4cpbNvT+QyXFG4DYJw?= =?us-ascii?Q?IJ0TANx5seOQTvYs3ZuAWQ11+ncqDNY5b7QJoDkvYCOsfVwnnYd0/rxUxuNs?= =?us-ascii?Q?V7nwFeGN5dEFWFSKuQx88UVopOPcfGAbtKTRyxJq83GB/gj124l2XTo6a2Df?= =?us-ascii?Q?YmRuKQVgwqBMhQJVJ6IejVEwPjrBBejnvI7T/MeYC0w83GkTP3r5InHinmOO?= =?us-ascii?Q?tuU2245ZHSEBlA1taDEUIHKdeA95jhfyiG/W3TVC2TAkUZF+FNNvfR8bCBnC?= =?us-ascii?Q?GTd4MfFMvjObWk3woRKlSms/POTQE6Pby3hPWiSKmgWb9Uy5JPscfiezLfDO?= =?us-ascii?Q?NKc4DdFUSOXawSl8bp0iPxqRETXcgvyE6i9fDFxulzsfg/Wk2CozRAeapv24?= =?us-ascii?Q?zM5wcjmXg3PWS3tYbOd6OQkpcDzRKO/JQ4N5kWYjxy2OaciC5fZu9NpARCCC?= =?us-ascii?Q?wETjJZQWifml5kJeLi6qnq3Zp3FwSLVGXuCiS/+y9nVTnzwOQPB1eY7W84On?= =?us-ascii?Q?1yaqA1/mmbLRgW48cIeCPfAEWSabZxJj3Iwr0Xx9sOgFI2kV57i9DPXvRS9Y?= =?us-ascii?Q?d0kjja6aVDGfyoXDGg4a5JbWZ8D7pT7uO+3C5M3wRFmBNBee3suqSlOyK+jN?= =?us-ascii?Q?E/Ksh5YVu1e1KXzYGos+qMKPMrhtP+XTAW1pDa6nYjEbdHT8t1mQcTouxQmJ?= =?us-ascii?Q?RT3OnI3Ju8IxSWxDZO72R37ivZ3/FaOu1EXBt7LOs5oeLnd+MemHxWOBDPT5?= =?us-ascii?Q?vA=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: e0c2db91-e887-4847-d622-08daac6285cd X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6059.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Oct 2022 15:00:38.3189 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: DfYINmgQpx87fnVpbgCoCvmMCUDTAgO815Pb1KRVWl/NBNlnkzpkb2JkhjkcUtg2LgwPXXW7kz1bwJ5kDQEQeQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR11MB6325 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH] drm/i915/dgfx: Temporary hammer to keep autosuspend control 'on' X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, matthew.auld@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Oct 12, 2022 at 01:26:45PM +0300, Joonas Lahtinen wrote: > I think I commented on this already, but the patch subject should really be as > informative as possible like: "Disable PCI runtime PM on dGPUs" as that is exactly > what the patch does. +1 here. > > Also bit unsure if the Fixes: tag should really point to the runtime PM > commit but maybe instead to the introduction of LMEM commit. indeed. if the runtime_pm by default came earlier then the LMEM, the HAS_LMEM() won't even exist and it will break the ports. So, I'd say to go to whatever patch is the most recent between the 2. With those changes: Reviewed-by: Rodrigo Vivi > > Regards, Joonas > > Quoting Anshuman Gupta (2022-10-12 11:34:02) > > DGFX platforms has lmem and cpu can access the lmem objects > > via mmap and i915 internal i915_gem_object_pin_map() for > > i915 own usages. Both of these methods has pre-requisite > > requirement to keep GFX PCI endpoint in D0 for a supported > > iomem transaction over PCI link. (Refer PCIe specs 5.3.1.4.1) > > > > Both DG1/DG2 have a hardware bug that violates the PCIe specs > > and support the iomem read write transaction over PCIe bus despite > > endpoint is D3 state. > > Due to above H/W bug, we had never observed any issue with i915 runtime > > PM versus lmem access. > > But this issue becomes visible when PCIe gfx endpoint's upstream > > bridge enters to D3, at this point any lmem read/write access will be > > returned as unsupported request. But again this issue is not observed > > on every platform because it has been observed on few host machines > > DG1/DG2 endpoint's upstream bridge does not bind with pcieport driver. > > which really disables the PCIe power savings and leaves the bridge > > at D0 state. > > > > Till we fix all issues related to runtime PM, we need > > to keep autosupend control to 'on' on all discrete platforms with lmem. > > > > Fixes: 527bab0473f2 ("drm/i915/rpm: Enable runtime pm autosuspend by default") > > Suggested-by: Rodrigo Vivi > > Signed-off-by: Anshuman Gupta > > --- > > drivers/gpu/drm/i915/intel_runtime_pm.c | 11 +++++++++-- > > 1 file changed, 9 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > > index 6ed5786bcd29..410a5cb58a61 100644 > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > @@ -591,8 +591,15 @@ void intel_runtime_pm_enable(struct intel_runtime_pm *rpm) > > pm_runtime_use_autosuspend(kdev); > > } > > > > - /* Enable by default */ > > - pm_runtime_allow(kdev); > > + /* > > + * FIXME: Temp hammer to keep autosupend disable on lmem supported platforms. > > + * As per PCIe specs 5.3.1.4.1, all iomem read write request over a PCIe > > + * function will be unsupported in case PCIe endpoint function is in D3. > > + * Let's keep i915 autosuspend control 'on' till we fix all known issue > > + * with lmem access in D3. > > + */ > > + if (!HAS_LMEM(i915)) > > + pm_runtime_allow(kdev); > > > > /* > > * The core calls the driver load handler with an RPM reference held. > > -- > > 2.25.1 > >