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DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?7FzbI+6sfz67D/Qb4I7WihhN0fIV2LR2pQdNM4si1MEmGbzByZXSnXUnef1s?= =?us-ascii?Q?QNeTO4kPxLOAcEF3XH7m2RD7tdTLuNd477/+S3ZHTv8LKf4oV/9hn1+npn7t?= =?us-ascii?Q?IRb/Ju3aA4/l1ylmRb4yb5idbKRaiPpUgah5fPdBk33y1mX+cKT3zS4M0mhb?= =?us-ascii?Q?bczx7AG/Zpda6iL8DWokjtW5m0/xtbQkeMLl8QcuoC8X3x8H5Kw9wbS2lVD5?= =?us-ascii?Q?XBDrDpqhbGjcKyyaD8vHjMCquBW7M2Spmovay9qmRsNHSoORHPLBMbrOhLum?= =?us-ascii?Q?JixH5O9BzlAvNYxeHbCsCHQd44ImoapzVg5adhwXfUHMljh0bf4stQzn8van?= =?us-ascii?Q?RzQ3puigwnBa3nkuqEStLb8RElcMgg2s5Kfey9v7HMkRiao08kP1otEKNvkR?= =?us-ascii?Q?lY5FtYoyIaJ9NKXwiWmLeiw4Yu8C8LH5Qi7esXBXz7c/EwNu4nGHupy8Vth0?= =?us-ascii?Q?3Ms3TuGic8//Z3KHmWkknJTlXagCaHjF9WFngU7oRxwFKbwgFTmUWfvsN9kv?= =?us-ascii?Q?/4cqbUMx8OSU2w3CyJjZ0PzJSyvIZGOLOuA3ehSBm2i28ihRzkLvUDZG+x3c?= =?us-ascii?Q?HDPf3XbUHdElo3FBKiOMxyTJEBhmTwS7vR6qwHNOaDiXznKkoReSAB8r+BTn?= =?us-ascii?Q?gPzhHOQqxsxjgcIIiXc9sDl7em1rVWFDwgfCUzz9g/kvLALw/PqoEBYjPal5?= =?us-ascii?Q?1kDl29Pd4PNdPQqLsRPclUIPKvCbEePA7cziguOrZXcrnl2ylADcsvz1gGPR?= =?us-ascii?Q?2qyLfpk9mMB07MZd2NpVE6ejvFscmdpBsdXEcK0PVKVAR5ecCms4QihfKLwr?= =?us-ascii?Q?sREWhYEJ22vEF+cUrggPlIf5rxnG4W2kr1v1pu1uB3TYCz30LrHREXFQfXcF?= =?us-ascii?Q?f0KL1OKjeaWto97TxbWWTf7ZCOxRBfngxbHwcU8mrdXsHcMcvfTFtegvmQQE?= =?us-ascii?Q?cfvtdaUg0Q2RXwu4KhiBlz7R2bea54cVt0RN9gD8hsfUr6F/hU2A1Nyiimq2?= =?us-ascii?Q?MFHj4CQzXc8d/wMAzrUHjewa2URN1hrMF+zShkBbNBp3N9RGCBQYiA3RV/tV?= =?us-ascii?Q?uOku8vED7j6+PIRys0ixhJIUiDUhh8yUykT685dYDJz/AiKBykRfhnctU2Ph?= =?us-ascii?Q?uP+fyryLS1bftuGTqLY84RvPLFGcVbXWQabg1jTnNsc+l359kkLntGJRIE1f?= =?us-ascii?Q?tBrPsn4bjVJ3hcsqSpfFVKSTrQYdxTbrfrGR3W3c3lbeiPlP7Xpnbal/O6lQ?= =?us-ascii?Q?/ak+BrrjNp70+ow8bFHHlkjc60UFLE1CTJMAQcwC+SJaVKcXTN3RXAq57CE2?= =?us-ascii?Q?XaPzE7w2xelb0etqIyFSlnpsJSPe3dLlvxNPGuXKMCZNIp/8mp9H8FRlQy4N?= =?us-ascii?Q?3Rp4AtsBQLDkX77DZk1NVVlS/a6tOHyzzjpE1IQoC2Pc5gOCihfjGfNplB2m?= =?us-ascii?Q?p8ufcRi3Zv/WQQWk9muhyv2HXfPRmm8Nw3Ux5BELZgKZC0xxyHGdrl7R0Xtb?= =?us-ascii?Q?0HGRre5wyv+7JaRWIDxCQ/mhlyDotJ4El88oTCY9gai61sfdidxA9infTl/O?= =?us-ascii?Q?0rYMeUybe7MWILu2OL4cCMrqqDQtwyHA674gLHVpdhTz/RUnbHFf4bympLvO?= =?us-ascii?Q?IQ=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 76f377bb-1dad-4478-f124-08dacd811d71 X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6059.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Nov 2022 18:32:45.7773 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 7rFhl9VN1JmOh7RARmSV0IQq1L8K7RB/SfMWQHllLVrBDLNNaAkTL3xH2omA21HwTeb31NgH8qLKaqYOvAPz7w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR11MB5633 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH 4/6] drm/i915/gsc: Do a driver-FLR on unload if GSC was loaded X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Alan Previn , dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, Nov 22, 2022 at 02:50:17PM -0800, Ceraolo Spurio, Daniele wrote: > > > On 11/22/2022 12:46 PM, Rodrigo Vivi wrote: > > On Mon, Nov 21, 2022 at 03:16:15PM -0800, Daniele Ceraolo Spurio wrote: > > > If the GSC was loaded, the only way to stop it during the driver unload > > > flow is to do a driver-FLR. > > > The driver-FLR is not the same as PCI config space FLR in that > > > it doesn't reset the SGUnit and doesn't modify the PCI config > > > space. Thus, it doesn't require a re-enumeration of the PCI BARs. > > > However, the driver-FLR does cause a memory wipe of graphics memory > > > on all discrete GPU platforms or a wipe limited to stolen memory > > > on the integrated GPU platforms. > > Nothing major or blocking, but a few thoughts: > > > > 1. Should we document this in the code, at least in a comment in the > > flr function? > > Sure, I'll add it in > > > 2. Should we call this driver_initiated_flr, aiming to reduce even more > > the ambiguity of it? > > ok > > > > > > We perform the FLR as the last action before releasing the MMIO bar, so > > > that we don't have to care about the consequences of the reset on the > > > unload flow. > > 3. should we try to implement this already in the gt_reset case as the > > last resrouce before wedging the gt? So we can already test this flow > > in the current platforms? > > This would be nice to have, but very complicated to implement. The fact that > FLR kills everything on the system, including resetting display and wiping > LMEM, means that we would need a new recovery path to re-initialize all > components. There are also potential questions on how to handle LMEM: do we > try to migrate it to SMEM before triggering the FLR (potentially via CPU > memcpy if the GT is dead), or do we just let it get wiped? > > The reason why I wanted the FLR to be the very last thing before releasing > MMIO access was exactly to not have to care about the recovery path ;) it makes sense indeed. > > Daniele > > > > > > Signed-off-by: Daniele Ceraolo Spurio > > > Signed-off-by: Alan Previn > > > --- > > > drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 9 +++++ > > > drivers/gpu/drm/i915/i915_reg.h | 3 ++ > > > drivers/gpu/drm/i915/intel_uncore.c | 45 +++++++++++++++++++++++ > > > drivers/gpu/drm/i915/intel_uncore.h | 13 +++++++ > > > 4 files changed, 70 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c > > > index 510fb47193ec..5dad3c19c445 100644 > > > --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c > > > +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c > > > @@ -173,6 +173,15 @@ int intel_gsc_fw_upload(struct intel_gsc_uc *gsc) > > > if (err) > > > goto fail; > > > + /* > > > + * Once the GSC FW is loaded, the only way to kill it on driver unload > > > + * is to do a driver FLR. Given this is a very disruptive action, we > > > + * want to do it as the last action before releasing the access to the > > > + * MMIO bar, which means we need to do it as part of the primary uncore > > > + * cleanup. > > > + */ > > > + intel_uncore_set_flr_on_fini(>->i915->uncore); > > > + > > > /* FW is not fully operational until we enable SW proxy */ > > > intel_uc_fw_change_status(gsc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > > index 8e1892d14774..60e55245200b 100644 > > > --- a/drivers/gpu/drm/i915/i915_reg.h > > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > > @@ -118,6 +118,9 @@ > > > #define GU_CNTL _MMIO(0x101010) > > > #define LMEM_INIT REG_BIT(7) > > > +#define DRIVERFLR REG_BIT(31) > > > +#define GU_DEBUG _MMIO(0x101018) > > > +#define DRIVERFLR_STATUS REG_BIT(31) > > > #define GEN6_STOLEN_RESERVED _MMIO(0x1082C0) > > > #define GEN6_STOLEN_RESERVED_ADDR_MASK (0xFFF << 20) > > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > > > index 8006a6c61466..c1befa33ff59 100644 > > > --- a/drivers/gpu/drm/i915/intel_uncore.c > > > +++ b/drivers/gpu/drm/i915/intel_uncore.c > > > @@ -2703,6 +2703,48 @@ void intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore, > > > } > > > } > > > +static void driver_flr(struct intel_uncore *uncore) > > > +{ > > > + struct drm_i915_private *i915 = uncore->i915; > > > + const unsigned int flr_timeout_ms = 3000; /* specs recommend a 3s wait */ > > > + int ret; > > > + > > > + drm_dbg(&i915->drm, "Triggering Driver-FLR\n"); > > > + > > > + /* > > > + * Make sure any pending FLR requests have cleared by waiting for the > > > + * FLR trigger bit to go to zero. Also clear GU_DEBUG's DRIVERFLR_STATUS > > > + * to make sure it's not still set from a prior attempt (it's a write to > > > + * clear bit). > > > + * Note that we should never be in a situation where a previous attempt > > > + * is still pending (unless the HW is totally dead), but better to be > > > + * safe in case something unexpected happens > > > + */ > > > + ret = intel_wait_for_register_fw(uncore, GU_CNTL, DRIVERFLR, 0, flr_timeout_ms); > > > + if (ret) { > > > + drm_err(&i915->drm, > > > + "Failed to wait for Driver-FLR bit to clear! %d\n", > > > + ret); > > > + return; > > > + } > > > + intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS); > > > + > > > + /* Trigger the actual Driver-FLR */ > > > + intel_uncore_rmw_fw(uncore, GU_CNTL, 0, DRIVERFLR); > > > + > > > + ret = intel_wait_for_register_fw(uncore, GU_DEBUG, > > > + DRIVERFLR_STATUS, DRIVERFLR_STATUS, > > > + flr_timeout_ms); > > > + if (ret) { > > > + drm_err(&i915->drm, "wait for Driver-FLR completion failed! %d\n", ret); > > > + return; > > > + } > > > + > > > + intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS); > > > + > > > + return; > > > +} > > > + > > > /* Called via drm-managed action */ > > > void intel_uncore_fini_mmio(struct drm_device *dev, void *data) > > > { > > > @@ -2716,6 +2758,9 @@ void intel_uncore_fini_mmio(struct drm_device *dev, void *data) > > > intel_uncore_fw_domains_fini(uncore); > > > iosf_mbi_punit_release(); > > > } > > > + > > > + if (intel_uncore_needs_flr_on_fini(uncore)) > > > + driver_flr(uncore); > > > } > > > /** > > > diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h > > > index 5449146a0624..a9fa0b11e7e4 100644 > > > --- a/drivers/gpu/drm/i915/intel_uncore.h > > > +++ b/drivers/gpu/drm/i915/intel_uncore.h > > > @@ -153,6 +153,7 @@ struct intel_uncore { > > > #define UNCORE_HAS_FPGA_DBG_UNCLAIMED BIT(1) > > > #define UNCORE_HAS_DBG_UNCLAIMED BIT(2) > > > #define UNCORE_HAS_FIFO BIT(3) > > > +#define UNCORE_NEEDS_FLR_ON_FINI BIT(3) > > > const struct intel_forcewake_range *fw_domains_table; > > > unsigned int fw_domains_table_entries; > > > @@ -223,6 +224,18 @@ intel_uncore_has_fifo(const struct intel_uncore *uncore) > > > return uncore->flags & UNCORE_HAS_FIFO; > > > } > > > +static inline bool > > > +intel_uncore_needs_flr_on_fini(const struct intel_uncore *uncore) > > > +{ > > > + return uncore->flags & UNCORE_NEEDS_FLR_ON_FINI; > > > +} > > > + > > > +static inline bool > > > +intel_uncore_set_flr_on_fini(struct intel_uncore *uncore) > > > +{ > > > + return uncore->flags |= UNCORE_NEEDS_FLR_ON_FINI; > > > +} > > > + > > > void intel_uncore_mmio_debug_init_early(struct drm_i915_private *i915); > > > void intel_uncore_init_early(struct intel_uncore *uncore, > > > struct intel_gt *gt); > > > -- > > > 2.37.3 > > > >