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DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?lIBUmnZZru9hOjiBvUWXy+OUBfy0cnubFJVsZiikUgzdOXNrqw7vQhgxXatU?= =?us-ascii?Q?e+p+gaSEoQ/ZTp3tTdNaiF6iqa4Ht82tJUmTqV6jPtjKRaT4ppDm9Ikhx1rk?= =?us-ascii?Q?Mau2bUcee1+moBhZurr5TgP8YKZ9ZrfCGbu8VV0/KrbOybe9BDAXY3+KheFg?= =?us-ascii?Q?c2zHKQJLlBfe2DzNT/agOzv4AaoasphTz3bc2aHtaK9/qBIXaIW42Mxhas9C?= =?us-ascii?Q?qrBdFsArMfzKpdzOonQi0d0CN+tnQgi++jKLwJX3hfJ/yBmIaDmQYBMHEC0W?= =?us-ascii?Q?rlOVKl513FBoOekKFitq9c5Oz7Ptyq6ety95YrmVLnQn6dNEp6JynObRrWgn?= =?us-ascii?Q?pll2I/YsO+bikYqznMprcCJw+e72r0t2MFjMmHdAbqBpRW6iF2+iunrQZ1sC?= =?us-ascii?Q?ke5VRVmmV03hBQdy0HuzaVaAaJoUF5S52mkNUh9vo4PzRDwfvXKu+YCbIt7Q?= =?us-ascii?Q?kNxZvA0AeunxyUGcahvR/AMVNu4+/yfevac9wOgBH4vOwaznlcURxoSh+jTC?= =?us-ascii?Q?EwWtpCB5bcc4uDCjazLgWh2ogUVLKwYVvRSWyG2vHSXQdanHYwjacWjMbE+f?= =?us-ascii?Q?VBt31vU0SvLrrDCG5Kgm50KWZEHiUMiqv2mZnqZggT5AO/FnOWi1qmdc4vI8?= =?us-ascii?Q?8GYWjUlVkKCR+PJcsVoLJg2Oh/8i9qQvsFiazPsZvIqtStXimSg7CHblojFB?= =?us-ascii?Q?iPp40GAzM2Kp1C3SUTiZM2O5U8I1AsU/6/69UwvzYHPBHLpQV1dkPO1AIX2/?= =?us-ascii?Q?anUMpsSTkiJ8ewhlQ60T3ZYR+AE+yfgK+npl0tHmtp6bxvW6bIghvWc7Ooaz?= =?us-ascii?Q?SSCUJy62VkYT4JDZhVjjR5Xc+UhFgcd3qwZ4pvKGB1K31NAAf83JJghRaMCj?= =?us-ascii?Q?JEXGeWzRYsE5O5Fbg25YGEZzpufB2ynHHaVfmdpyiUPw93FXENYn8FxGyX6b?= =?us-ascii?Q?2m/p9eWiaovOJY+mHOf9Toct23kNA5twRIp36w9uwwZLGM+rM9ULHeynXrPa?= =?us-ascii?Q?I7a1v31NMeAE93/6TcaBUYyfnUh548E165UASnxK8Kp8S9QdrzXFqMSXG5tC?= =?us-ascii?Q?q46mM1EX/EojDxaGXv49fbplYUKEmhGkyiluIPUt0Egug54rBov9uHBCIzH7?= =?us-ascii?Q?WzL8z0HWWktgYA7CBdNIzCN6zv7oyA58uWIr3sByelUNfkm9Jhi2Xqb9Os1C?= =?us-ascii?Q?fkxivquZ6af6x+UgmIFs/ZD91RmVXlgXoEL4yZ4vjhkWrnkTZIaZxIEv5mg/?= =?us-ascii?Q?LQD9t3l5z1GY+wJeekyVRiCOj+uycIZgaV7c63T+ljuDAEjOxEoUVqHZCfFR?= =?us-ascii?Q?TXCGbv8V01oHdF91dP3Y8ZklmYuiqI9+X/9PEcWBUcpKBzSnQ+D8OozyjV2b?= =?us-ascii?Q?yEMCETlJsST6O5KMSAiBBn1ue7YBlmOGnH53Tu6plQjPk1LuhpomBHjhzOlT?= =?us-ascii?Q?A/b4f9BHty7yQpZ58EWROUWdj97TSBFpgUPvDdsVfVYe1W5/jqBpr9xz6Zfk?= =?us-ascii?Q?1Y6/i8D1v0Ah64onQcPoP2imxr++Q0B3np6K6ZLT6aYzwlKuGF6cyu/SIQRs?= =?us-ascii?Q?6WRxfWwVL2y9SzjKxYtuaYHktp9jN+7cLXD15tl8?= X-MS-Exchange-CrossTenant-Network-Message-Id: ee07c8b1-f261-41a6-4fc7-08dac8b55d03 X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6059.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2022 16:04:10.4917 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: JGCELHIgxmS12Mu0WIFeN/m5KCJ+oDPs27FWJ0IBd5QCnRxs0QIHWluBZX80DLZ0LBmJrd53txIQy7WFN0tY0g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB7094 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH v4 2/6] drm/i915/pxp: Make intel_pxp_is_enabled implicitly sort PXP-owning-GT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Nov 16, 2022 at 04:30:14PM -0800, Alan Previn wrote: > Make intel_pxp_is_enabled a global check and implicitly find the > PXP-owning-GT. > > PXP feature support is a device-config flag. In preparation for MTL > PXP control-context shall reside on of the two GT's. That said, > update intel_pxp_is_enabled to take in i915 as its input and internally > find the right gt to check if PXP is enabled so its transparent to > callers of this functions. > > However we also need to expose the per-gt variation of this internal > pxp files to use (like what intel_pxp_enabled was prior) so also expose > a new intel_gtpxp_is_enabled function for replacement. > > Signed-off-by: Alan Previn > --- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- > drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp.c | 28 ++++++++++++++++++-- > drivers/gpu/drm/i915/pxp/intel_pxp.h | 4 ++- > drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 8 +++--- > drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 4 +-- > 9 files changed, 40 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > index 7f2831efc798..c123f4847b19 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > @@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915, > > if (!protected) { > pc->uses_protected_content = false; > - } else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) { > + } else if (!intel_pxp_is_enabled(i915)) { if we are asking about pxp we should pass pxp, not i915... > ret = -ENODEV; > } else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) || > !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) { > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c > index 33673fe7ee0a..e44803f9bec4 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c > @@ -384,7 +384,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data > if (ext.flags) > return -EINVAL; > > - if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp)) > + if (!intel_pxp_is_enabled(ext_data->i915)) > return -ENODEV; > > ext_data->flags |= I915_BO_PROTECTED; > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c > index d993e752bd36..88105101af79 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c > @@ -9,6 +9,7 @@ > #include "intel_pxp_tee.h" > #include "gem/i915_gem_context.h" > #include "gt/intel_context.h" > +#include "gt/intel_gt.h" > #include "i915_drv.h" > > /** > @@ -58,11 +59,34 @@ bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp) > INTEL_INFO((pxp_to_gt(pxp))->i915)->has_pxp && VDBOX_MASK(pxp_to_gt(pxp))); > } > > -bool intel_pxp_is_enabled(const struct intel_pxp *pxp) > +bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp) > { > return pxp->ce; > } > > +static struct intel_gt *i915_to_pxp_gt(struct drm_i915_private *i915) > +{ > + struct intel_gt *gt = NULL; > + int i = 0; > + > + for_each_gt(gt, i915, i) { > + /* There can be only one GT that supports PXP */ > + if (intel_pxp_supported_on_gt(>->pxp)) > + return gt; > + } > + return NULL; > +} > + > +bool intel_pxp_is_enabled(struct drm_i915_private *i915) > +{ > + struct intel_gt *gt = i915_to_pxp_gt(i915); > + > + if (!gt) > + return false; > + > + return intel_pxp_is_enabled_on_gt(>->pxp); > +} > + > bool intel_pxp_is_active(const struct intel_pxp *pxp) > { > return pxp->arb_is_valid; > @@ -216,7 +240,7 @@ int intel_pxp_start(struct intel_pxp *pxp) > { > int ret = 0; > > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return -ENODEV; > > if (wait_for(pxp_component_bound(pxp), 250)) > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h > index efa83f9d5e24..3f71b1653f74 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h > @@ -11,12 +11,14 @@ > > struct intel_pxp; > struct drm_i915_gem_object; > +struct drm_i915_private; > > struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp); > > bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp); > > -bool intel_pxp_is_enabled(const struct intel_pxp *pxp); > +bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp); > +bool intel_pxp_is_enabled(struct drm_i915_private *i915); > bool intel_pxp_is_active(const struct intel_pxp *pxp); > > void intel_pxp_init(struct intel_pxp *pxp); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c > index f41e45763d0d..f322a49ebadc 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c > @@ -99,7 +99,7 @@ int intel_pxp_terminate_session(struct intel_pxp *pxp, u32 id) > u32 *cs; > int err = 0; > > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return 0; > > rq = i915_request_create(ce); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > index f0ad6f34624a..4d257055434b 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > @@ -18,7 +18,7 @@ static int pxp_info_show(struct seq_file *m, void *data) > { > struct intel_pxp *pxp = m->private; > struct drm_printer p = drm_seq_file_printer(m); > - bool enabled = intel_pxp_is_enabled(pxp); > + bool enabled = intel_pxp_is_enabled_on_gt(pxp); > > if (!enabled) { > drm_printf(&p, "pxp disabled\n"); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > index c28be430718a..d3c697bf9aab 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > @@ -22,7 +22,7 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir) > { > struct intel_gt *gt = pxp_to_gt(pxp); > > - if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp))) > + if (GEM_WARN_ON(!intel_pxp_is_enabled_on_gt(pxp))) > return; > > lockdep_assert_held(gt->irq_lock); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c > index 6a7d4e2ee138..19ac8828cbde 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c > @@ -11,7 +11,7 @@ > > void intel_pxp_suspend_prepare(struct intel_pxp *pxp) > { > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > pxp->arb_is_valid = false; > @@ -23,7 +23,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp) > { > intel_wakeref_t wakeref; > > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > with_intel_runtime_pm(&pxp_to_gt(pxp)->i915->runtime_pm, wakeref) { > @@ -34,7 +34,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp) > > void intel_pxp_resume(struct intel_pxp *pxp) > { > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > /* > @@ -50,7 +50,7 @@ void intel_pxp_resume(struct intel_pxp *pxp) > > void intel_pxp_runtime_suspend(struct intel_pxp *pxp) > { > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > pxp->arb_is_valid = false; > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > index b0c9170b1395..a5c9c692c20d 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > @@ -152,7 +152,7 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev, > return 0; > > /* the component is required to fully start the PXP HW */ > - if (intel_pxp_is_enabled(pxp)) > + if (intel_pxp_is_enabled_on_gt(pxp)) > intel_pxp_init_hw(pxp); > > intel_runtime_pm_put(&i915->runtime_pm, wakeref); > @@ -167,7 +167,7 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev, > struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev); > intel_wakeref_t wakeref; > > - if (intel_pxp_is_enabled(pxp)) > + if (intel_pxp_is_enabled_on_gt(pxp)) > with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref) > intel_pxp_fini_hw(pxp); > > -- > 2.34.1 >