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DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?+7u7rIE+iPlbhSA9R58znp2fdR+y/Acnf8cEhEh6ZA5L4OmotFXPqUS/X3JH?= =?us-ascii?Q?mROnpiJZ4TbDWtnvCAhcXlw38+0mtg4urg+I2yZdguPQTdbsNiFmFbp62fRS?= =?us-ascii?Q?s2gLRCm+NsDPANwbfTElQk4mMrlJYWeH0eiL9LL9d3xPePCAVUXSvj6vSD6Y?= =?us-ascii?Q?2S1NWUb47oPSLHiF3roChv94P7ietszdvAHwHAohys0LU5MAGFM5L92JcSXI?= =?us-ascii?Q?mqqN/qMo/knK6bYp96Jq7GA9mpgNqTm2A7wkUD+DizI9/H3CAIPxqM5u2TUG?= =?us-ascii?Q?5SdEqzop7Bos5rr84T3w/mHS2HIQwiKt2rtGrGDySef8FLRBemezRdD2LuPa?= =?us-ascii?Q?MAojKF/+zRCylerqq+Vs5lavFHvuBpQ8Ooszb7fULmHpSK73yiaEP7C4vBE8?= =?us-ascii?Q?PzRyUx+e4v5Ko/GWLHF6bTfbVGCAnAJ5fcWkNOdjros0QlNwUnQjYhwFkqot?= =?us-ascii?Q?7xAvBItXmbSIbAN+ib79S/RwylAHdw88RpPtasZ9tfGIqH1zLK/BEpL7IGtO?= =?us-ascii?Q?f2OA7MeVPhZNLfWmNOrDhjz3Udw5uwZzALhy6IPP1S1n7K2c/8/OLFPWoOF+?= =?us-ascii?Q?7u2NytyHxKWjWfEUHacbdac0YFKyjySvqqIiLSCXsvCiW0nRdT/KKiFPyRHN?= =?us-ascii?Q?Xu2aJY1NSNnQYY2tdcuY3UIO9KDyYXf85Er8ZWKw4BVhkguPVDkH4/8wVJdf?= =?us-ascii?Q?uS4MvpKv91PdKm1NWh7gnMQd92Kd/a60rFPmsPHQBpr2OoGJtQozVt+mvday?= =?us-ascii?Q?JvyEvOQxpjxqGaDx6NaRp7X3p+Elvsn0F8ife7xTl3f5wsZ0m7DurKIDF3R3?= =?us-ascii?Q?m/RVfFwYwDy0qZB3JIPv3X2sbrKH18H/kw5kAuLZ9ivIJoiQB0vBF/Grm9X/?= =?us-ascii?Q?1ptvutskjfcsIK1EeMeLUTT085WcWKOoEd633mbhWqf7Mye0h+lo5kAeTN+7?= =?us-ascii?Q?aXrBz4Yck+HDTSgn8rAHGdrQ9xILZr++fnagBqto5Pw1NuTl8DK30I//Y+Rr?= =?us-ascii?Q?3pl1XAdyt3wHBWx1ySCthC9d0rfZVISpY7sVnqq/k2TUj/FeqsY/v3cK1W9b?= =?us-ascii?Q?2zIjRJt3uwnfQaWAp8Myl39rTnJD6w4bq5klSvpMiyvTV2rqubiMCFGIwxN5?= =?us-ascii?Q?24A/OP9Q+wzQFPnxukLwfN+1PtU/GkYXg18IMcW/rnbtpog+3IZEVb2nbEeV?= =?us-ascii?Q?3bA7fNAOqXFyvR9b8vUeEB1BTRt/sfTO1rLEPt9uZw5eaEpB7GowyzLVHVPu?= =?us-ascii?Q?E4sn/76C+NkU+G9XZ+fzuNYIiMOaHFrIWEn5sove86q4A964rxdmhZcG4F0z?= =?us-ascii?Q?Vu4I9pMWQpAAxAK0v2RBAcnSGHzVqB18uLpvqnRHB1gFpRACQeAoTUPyak7w?= =?us-ascii?Q?kIIztTVZ/CAyb0wLodmZPvLAVI9uzwkT0h5Rpcz4daVmLyObWkZXVmhKsJbu?= =?us-ascii?Q?UqxCD4BCJDBLIN2DKNpoM9zRf9rFjJ83ZlBr3JOkWnO110zEUJS5rPHkfGz+?= =?us-ascii?Q?3eHZDP0so0d2jfSTJgnTfSoqJuc2T9PR3yam+nsGjnrXTvQa8qGCwUXf34tm?= =?us-ascii?Q?mjTZYYv3yUnBgUOE3VqeyCgaUp8ghmmTusYBHsF3?= X-MS-Exchange-CrossTenant-Network-Message-Id: fe83eb00-9260-4f22-685a-08dad7672ab1 X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6059.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Dec 2022 08:52:12.7813 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Yh+9dRkgAu8RnS66lIzfii+OAgcwcP2RDNp+hZDGWpa+Pz91MWsBJWsDDWKbz5LYqs/Pnp3TCFt3i0oZ2LhGxA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB4959 X-OriginatorOrg: intel.com Subject: Re: [Intel-gfx] [PATCH v2 4/6] drm/i915/gsc: Do a driver-FLR on unload if GSC was loaded X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Alan Previn Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, Dec 05, 2022 at 05:19:06PM -0800, Daniele Ceraolo Spurio wrote: > If the GSC was loaded, the only way to stop it during the driver unload > flow is to do a driver-FLR. > The driver-initiated FLR is not the same as PCI config space FLR in > that it doesn't reset the SGUnit and doesn't modify the PCI config > space. Thus, it doesn't require a re-enumeration of the PCI BARs. > However, the driver-FLR does cause a memory wipe of graphics memory > on all discrete GPU platforms or a wipe limited to stolen memory > on the integrated GPU platforms. > > We perform the FLR as the last action before releasing the MMIO bar, so > that we don't have to care about the consequences of the reset on the > unload flow. > > v2: rename FLR function, add comment to explain FLR impact (Rodrigo), > better explain why GSC needs FLR (Alan) > > Signed-off-by: Daniele Ceraolo Spurio > Signed-off-by: Alan Previn > Cc: Rodrigo Vivi Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 23 +++++++++ > drivers/gpu/drm/i915/i915_reg.h | 3 ++ > drivers/gpu/drm/i915/intel_uncore.c | 58 +++++++++++++++++++++++ > drivers/gpu/drm/i915/intel_uncore.h | 13 +++++ > 4 files changed, 97 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c > index f88069ab71ab..e73d4440c5e8 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c > @@ -166,6 +166,29 @@ int intel_gsc_uc_fw_upload(struct intel_gsc_uc *gsc) > if (err) > goto fail; > > + /* > + * GSC is only killed by an FLR, so we need to trigger one on unload to > + * make sure we stop it. This is because we assign a chunk of memory to > + * the GSC as part of the FW load , so we need to make sure it stops > + * using it when we release it to the system on driver unload. Note that > + * this is not a problem of the unload per-se, because the GSC will not > + * touch that memory unless there are requests for it coming from the > + * driver; therefore, no accesses will happen while i915 is not loaded, > + * but if we re-load the driver then the GSC might wake up and try to > + * access that old memory location again. > + * Given that an FLR is a very disruptive action (see the FLR function > + * for details), we want to do it as the last action before releasing > + * the access to the MMIO bar, which means we need to do it as part of > + * the primary uncore cleanup. > + * An alternative approach to the FLR would be to use a memory location > + * that survives driver unload, like e.g. stolen memory, and keep the > + * GSC loaded across reloads. However, this requires us to make sure we > + * preserve that memory location on unload and then determine and > + * reserve its offset on each subsequent load, which is not trivial, so > + * it is easier to just kill everything and start fresh. > + */ > + intel_uncore_set_flr_on_fini(>->i915->uncore); > + > err = gsc_fw_load(gsc); > if (err) > goto fail; > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 0b90fe6a28f7..b95d533652a4 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -118,6 +118,9 @@ > > #define GU_CNTL _MMIO(0x101010) > #define LMEM_INIT REG_BIT(7) > +#define DRIVERFLR REG_BIT(31) > +#define GU_DEBUG _MMIO(0x101018) > +#define DRIVERFLR_STATUS REG_BIT(31) > > #define GEN6_STOLEN_RESERVED _MMIO(0x1082C0) > #define GEN6_STOLEN_RESERVED_ADDR_MASK (0xFFF << 20) > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 8006a6c61466..3bfb4af0df78 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -2703,6 +2703,61 @@ void intel_uncore_prune_engine_fw_domains(struct intel_uncore *uncore, > } > } > > +/* > + * The driver-initiated FLR is the highest level of reset that we can trigger > + * from within the driver. It is different from the PCI FLR in that it doesn't > + * fully reset the SGUnit and doesn't modify the PCI config space and therefore > + * it doesn't require a re-enumeration of the PCI BARs. However, the > + * driver-initiated FLR does still cause a reset of both GT and display and a > + * memory wipe of local and stolen memory, so recovery would require a full HW > + * re-init and saving/restoring (or re-populating) the wiped memory. Since we > + * perform the FLR as the very last action before releasing access to the HW > + * during the driver release flow, we don't attempt recovery at all, because > + * if/when a new instance of i915 is bound to the device it will do a full > + * re-init anyway. > + */ > +static void driver_initiated_flr(struct intel_uncore *uncore) > +{ > + struct drm_i915_private *i915 = uncore->i915; > + const unsigned int flr_timeout_ms = 3000; /* specs recommend a 3s wait */ > + int ret; > + > + drm_dbg(&i915->drm, "Triggering Driver-FLR\n"); > + > + /* > + * Make sure any pending FLR requests have cleared by waiting for the > + * FLR trigger bit to go to zero. Also clear GU_DEBUG's DRIVERFLR_STATUS > + * to make sure it's not still set from a prior attempt (it's a write to > + * clear bit). > + * Note that we should never be in a situation where a previous attempt > + * is still pending (unless the HW is totally dead), but better to be > + * safe in case something unexpected happens > + */ > + ret = intel_wait_for_register_fw(uncore, GU_CNTL, DRIVERFLR, 0, flr_timeout_ms); > + if (ret) { > + drm_err(&i915->drm, > + "Failed to wait for Driver-FLR bit to clear! %d\n", > + ret); > + return; > + } > + intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS); > + > + /* Trigger the actual Driver-FLR */ > + intel_uncore_rmw_fw(uncore, GU_CNTL, 0, DRIVERFLR); > + > + ret = intel_wait_for_register_fw(uncore, GU_DEBUG, > + DRIVERFLR_STATUS, DRIVERFLR_STATUS, > + flr_timeout_ms); > + if (ret) { > + drm_err(&i915->drm, "wait for Driver-FLR completion failed! %d\n", ret); > + return; > + } > + > + intel_uncore_write_fw(uncore, GU_DEBUG, DRIVERFLR_STATUS); > + > + return; > +} > + > /* Called via drm-managed action */ > void intel_uncore_fini_mmio(struct drm_device *dev, void *data) > { > @@ -2716,6 +2771,9 @@ void intel_uncore_fini_mmio(struct drm_device *dev, void *data) > intel_uncore_fw_domains_fini(uncore); > iosf_mbi_punit_release(); > } > + > + if (intel_uncore_needs_flr_on_fini(uncore)) > + driver_initiated_flr(uncore); > } > > /** > diff --git a/drivers/gpu/drm/i915/intel_uncore.h b/drivers/gpu/drm/i915/intel_uncore.h > index e9e38490815d..9ea1f4864a3a 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.h > +++ b/drivers/gpu/drm/i915/intel_uncore.h > @@ -153,6 +153,7 @@ struct intel_uncore { > #define UNCORE_HAS_FPGA_DBG_UNCLAIMED BIT(1) > #define UNCORE_HAS_DBG_UNCLAIMED BIT(2) > #define UNCORE_HAS_FIFO BIT(3) > +#define UNCORE_NEEDS_FLR_ON_FINI BIT(4) > > const struct intel_forcewake_range *fw_domains_table; > unsigned int fw_domains_table_entries; > @@ -223,6 +224,18 @@ intel_uncore_has_fifo(const struct intel_uncore *uncore) > return uncore->flags & UNCORE_HAS_FIFO; > } > > +static inline bool > +intel_uncore_needs_flr_on_fini(const struct intel_uncore *uncore) > +{ > + return uncore->flags & UNCORE_NEEDS_FLR_ON_FINI; > +} > + > +static inline bool > +intel_uncore_set_flr_on_fini(struct intel_uncore *uncore) > +{ > + return uncore->flags |= UNCORE_NEEDS_FLR_ON_FINI; > +} > + > void intel_uncore_mmio_debug_init_early(struct drm_i915_private *i915); > void intel_uncore_init_early(struct intel_uncore *uncore, > struct intel_gt *gt); > -- > 2.37.3 >