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27 Jan 2021 15:15:32 -0800 Received: by stinkbox (sSMTP sendmail emulation); Thu, 28 Jan 2021 01:15:32 +0200 Date: Thu, 28 Jan 2021 01:15:32 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Tejas Upadhyay Message-ID: References: <20210127100830.162292-1-tejaskumarx.surendrakumar.upadhyay@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210127100830.162292-1-tejaskumarx.surendrakumar.upadhyay@intel.com> X-Patchwork-Hint: comment Subject: Re: [Intel-gfx] [PATCH] drm/i915/gen9bc: Handle TGP PCH during suspend/resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, hariom.pandey@intel.com Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Jan 27, 2021 at 03:38:30PM +0530, Tejas Upadhyay wrote: > For Legacy S3 suspend/resume GEN9 BC needs to enable and > setup TGP PCH. > = > Cc: Matt Roper > Signed-off-by: Tejas Upadhyay > --- > drivers/gpu/drm/i915/i915_irq.c | 36 ++++++++++++++++++++++++--------- > 1 file changed, 27 insertions(+), 9 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_= irq.c > index a31980f69120..6dcefc3e24ac 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -3026,8 +3026,20 @@ static void gen8_irq_reset(struct drm_i915_private= *dev_priv) > GEN3_IRQ_RESET(uncore, GEN8_DE_MISC_); > GEN3_IRQ_RESET(uncore, GEN8_PCU_); > = > - if (HAS_PCH_SPLIT(dev_priv)) > + if (INTEL_PCH_TYPE(dev_priv) >=3D PCH_ICP) > + GEN3_IRQ_RESET(uncore, SDE); > + else if (HAS_PCH_SPLIT(dev_priv)) > ibx_irq_reset(dev_priv); > + > + /* Wa_14010685332:cnp/cmp,tgp,adp */ > + if (INTEL_PCH_TYPE(dev_priv) =3D=3D PCH_CNP || > + (INTEL_PCH_TYPE(dev_priv) >=3D PCH_TGP && > + INTEL_PCH_TYPE(dev_priv) < PCH_DG1)) { > + intel_uncore_rmw(uncore, SOUTH_CHICKEN1, > + SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS); > + intel_uncore_rmw(uncore, SOUTH_CHICKEN1, > + SBCLK_RUN_REFCLK_DIS, 0); > + } Time to refactor instead of copypasta. > } > = > static void gen11_display_irq_reset(struct drm_i915_private *dev_priv) > @@ -3442,6 +3454,9 @@ static void spt_hpd_irq_setup(struct drm_i915_priva= te *dev_priv) > ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs); > = > spt_hpd_detection_setup(dev_priv); > + > + if (INTEL_PCH_TYPE(dev_priv) >=3D PCH_ICP) > + icp_hpd_irq_setup(dev_priv); > } > = > static u32 ilk_hotplug_enables(struct drm_i915_private *i915, > @@ -3729,9 +3744,19 @@ static void gen8_de_irq_postinstall(struct drm_i91= 5_private *dev_priv) > } > } > = > +static void icp_irq_postinstall(struct drm_i915_private *dev_priv) > +{ > + struct intel_uncore *uncore =3D &dev_priv->uncore; > + u32 mask =3D SDE_GMBUS_ICP; > + > + GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff); > +} > + > static void gen8_irq_postinstall(struct drm_i915_private *dev_priv) > { > - if (HAS_PCH_SPLIT(dev_priv)) > + if (INTEL_PCH_TYPE(dev_priv) >=3D PCH_ICP) > + icp_irq_postinstall(dev_priv); > + else if (HAS_PCH_SPLIT(dev_priv)) > ibx_irq_postinstall(dev_priv); > = > gen8_gt_irq_postinstall(&dev_priv->gt); > @@ -3740,13 +3765,6 @@ static void gen8_irq_postinstall(struct drm_i915_p= rivate *dev_priv) > gen8_master_intr_enable(dev_priv->uncore.regs); > } > = > -static void icp_irq_postinstall(struct drm_i915_private *dev_priv) > -{ > - struct intel_uncore *uncore =3D &dev_priv->uncore; > - u32 mask =3D SDE_GMBUS_ICP; > - > - GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff); > -} > = > static void gen11_irq_postinstall(struct drm_i915_private *dev_priv) > { > -- = > 2.30.0 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx