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Tue, 11 May 2021 08:13:56 -0700 (PDT) Date: Tue, 11 May 2021 17:13:54 +0200 From: Daniel Vetter To: Matthew Brost Message-ID: References: <20210506173049.72503-1-matthew.brost@intel.com> <20210506173049.72503-6-matthew.brost@intel.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210506173049.72503-6-matthew.brost@intel.com> X-Operating-System: Linux phenom 5.10.32scarlett+ Subject: Re: [Intel-gfx] [RFC PATCH 5/5] drm/i915: Update execbuf IOCTL to accept N BBs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jason.ekstrand@intel.com, daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, carl.zhang@intel.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, May 06, 2021 at 10:30:49AM -0700, Matthew Brost wrote: > Add I915_EXEC_NUMBER_BB_* to drm_i915_gem_execbuffer2.flags which allows > submitting N BBs per IOCTL. > > Cc: Tvrtko Ursulin > Cc: Tony Ye > CC: Carl Zhang > Cc: Daniel Vetter > Cc: Jason Ekstrand > Signed-off-by: Matthew Brost I dropped my big question on the previous patch already, I'll check this out again when it's all squashed into the parallel extension patch so we have everything in one commit. -Daniel > --- > include/uapi/drm/i915_drm.h | 21 ++++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) > > diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h > index 0175b12b33b8..d3072cad4a7e 100644 > --- a/include/uapi/drm/i915_drm.h > +++ b/include/uapi/drm/i915_drm.h > @@ -1291,7 +1291,26 @@ struct drm_i915_gem_execbuffer2 { > */ > #define I915_EXEC_USE_EXTENSIONS (1 << 21) > > -#define __I915_EXEC_UNKNOWN_FLAGS (-(I915_EXEC_USE_EXTENSIONS << 1)) > +/* > + * Number of BB in execbuf2 IOCTL - 1, used to submit more than BB in a single > + * execbuf2 IOCTL. > + * > + * Return -EINVAL if more than 1 BB (value 0) is specified if > + * I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT hasn't been called on the gem > + * context first. Also returns -EINVAL if gem context has been setup with > + * I915_PARALLEL_NO_PREEMPT_MID_BATCH and the number BBs not equal to the total > + * number hardware contexts in the gem context. > + */ > +#define I915_EXEC_NUMBER_BB_LSB (22) > +#define I915_EXEC_NUMBER_BB_MASK (0x3f << I915_EXEC_NUMBER_BB_LSB) > +#define I915_EXEC_NUMBER_BB_MSB (27) > +#define i915_execbuffer2_set_number_bb(eb2, num_bb) \ > + (eb2).flags = ((eb2).flags & ~I915_EXEC_NUMBER_BB_MASK) | \ > + (((num_bb - 1) << I915_EXEC_NUMBER_BB_LSB) & I915_EXEC_NUMBER_BB_MASK) > +#define i915_execbuffer2_get_number_bb(eb2) \ > + ((((eb2).flags & I915_EXEC_NUMBER_BB_MASK) >> I915_EXEC_NUMBER_BB_LSB) + 1) > + > +#define __I915_EXEC_UNKNOWN_FLAGS (-(1 << (I915_EXEC_NUMBER_BB_MSB + 1))) > > #define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) > #define i915_execbuffer2_set_context_id(eb2, context) \ > -- > 2.28.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx