From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBFBFC432BE for ; Fri, 27 Aug 2021 08:13:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2700A60F91 for ; Fri, 27 Aug 2021 08:13:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 2700A60F91 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ffwll.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A28CE6E8F0; Fri, 27 Aug 2021 08:13:41 +0000 (UTC) Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by gabe.freedesktop.org (Postfix) with ESMTPS id 76B386E8F0 for ; Fri, 27 Aug 2021 08:13:40 +0000 (UTC) Received: by mail-wr1-x436.google.com with SMTP id d26so9201251wrc.0 for ; Fri, 27 Aug 2021 01:13:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to; bh=2s59FfRG78bE8LxIeg1Zj8OdCh3zZnI3gg7/dazHWA4=; b=Kdeb1fAG7//r6DeGePhfvKFBXK0qvLA5s2kT1G9xMjshC5lbuti0zxpCZLjQ2B3gx6 Ur0e4z09eQenuGU9OQZxNV3LH7wV25UtCEWI1RDIaU+RF7z1nFkrZNsQS08xcBms0QOY YRbvAEG0SOGfCOPfMNp3r8pBX7v+hR7G17ugg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=2s59FfRG78bE8LxIeg1Zj8OdCh3zZnI3gg7/dazHWA4=; b=MXgH6HoJBlAA2ZILIlMt4lx+oh7kHw8U9RC4UkjpsAM+o0PdqO7MVIFZ28o0E1sl0F f10Q1csK6rh7suxBhwpdbSreRQ1xJL2Js3KJrXs+YVUaV7rgcS3zQYOUGQO4v3HZOXkH ScEKAi++4teqJTuKb0TqAc+RTEfFGnWNEIZs2MLWl4OSk2Kr+226LpyOOpbv4n5UXsW6 GXE4ly+EEizMVEHzbFiEEnKtlISI4iGSfg1QAI9r29DMI7s5D8tF7lNXCGMI3CkGnTQr u66kteUTQ3jIF0cwIAFYyGXu5igyrlHBZnEheDwONtxIeZrTD1b2DHw5GUssabyYwyRq vNVg== X-Gm-Message-State: AOAM533xUyB8iyhxPl2yv1v2M1F7TzTbVQo69U4I3Me71/4fQvwyJ05O sNw0wIi5ULzG3LbrcmCxjWRbfw== X-Google-Smtp-Source: ABdhPJxyr85yRqeMose6PPIDndQ8Z3GywH1iVXOk6X6WTLRuAPDm6BMdOKs0q/JSmV4qlZWreefNhg== X-Received: by 2002:adf:c10c:: with SMTP id r12mr1113052wre.142.1630052018990; Fri, 27 Aug 2021 01:13:38 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:57f4:0:efd0:b9e5:5ae6:c2fa]) by smtp.gmail.com with ESMTPSA id l1sm3718664wrb.15.2021.08.27.01.13.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 01:13:38 -0700 (PDT) Date: Fri, 27 Aug 2021 10:13:36 +0200 From: Daniel Vetter To: Rodrigo Vivi Cc: Intel Graphics Development , DRI Development , Daniel Vetter , Jon Bloomfield , Chris Wilson , Maarten Lankhorst , Joonas Lahtinen , Thomas =?iso-8859-1?Q?Hellstr=F6m?= , Matthew Auld , Lionel Landwerlin , Dave Airlie , Jason Ekstrand Message-ID: References: <20210820154932.296628-1-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Operating-System: Linux phenom 5.10.0-7-amd64 Subject: Re: [Intel-gfx] [PATCH] drm/i915: Actually delete gpu reloc selftests X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Fri, Aug 20, 2021 at 07:59:04PM +0200, Daniel Vetter wrote: > On Fri, Aug 20, 2021 at 7:00 PM Rodrigo Vivi wrote: > > > > On Fri, Aug 20, 2021 at 05:49:32PM +0200, Daniel Vetter wrote: > > > In > > > > > > commit 8e02cceb1f1f4f254625e5338dd997ff61ab40d7 > > > Author: Daniel Vetter > > > Date: Tue Aug 3 14:48:33 2021 +0200 > > > > > > drm/i915: delete gpu reloc code > > > > it would be better with dim cite format... > > > > do we need the Fixes: tag? > > I did delete the selftest, I just forgot to delete the code. So no > Fixes: imo. I'll bikeshed the commit citation. > > > anyway: > > > > Reviewed-by: Rodrigo Vivi > > Thanks for the review, will merge when CI approves too, one never knows. Well CI fell over in noise, but it builds still, so good enough for this one :-) -Daniel > -Daniel > > > > > > > > > > > I deleted the gpu relocation code and the selftest include and > > > enabling, but accidentally forgot about the selftest source code. > > > > > > Fix this oversight. > > > > > > Signed-off-by: Daniel Vetter > > > Cc: Jon Bloomfield > > > Cc: Chris Wilson > > > Cc: Maarten Lankhorst > > > Cc: Daniel Vetter > > > Cc: Joonas Lahtinen > > > Cc: "Thomas Hellström" > > > Cc: Matthew Auld > > > Cc: Lionel Landwerlin > > > Cc: Dave Airlie > > > Cc: Jason Ekstrand > > > --- > > > .../i915/gem/selftests/i915_gem_execbuffer.c | 190 ------------------ > > > 1 file changed, 190 deletions(-) > > > delete mode 100644 drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c > > > > > > diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c > > > deleted file mode 100644 > > > index 16162fc2782d..000000000000 > > > --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_execbuffer.c > > > +++ /dev/null > > > @@ -1,190 +0,0 @@ > > > -// SPDX-License-Identifier: MIT > > > -/* > > > - * Copyright © 2020 Intel Corporation > > > - */ > > > - > > > -#include "i915_selftest.h" > > > - > > > -#include "gt/intel_engine_pm.h" > > > -#include "selftests/igt_flush_test.h" > > > - > > > -static u64 read_reloc(const u32 *map, int x, const u64 mask) > > > -{ > > > - u64 reloc; > > > - > > > - memcpy(&reloc, &map[x], sizeof(reloc)); > > > - return reloc & mask; > > > -} > > > - > > > -static int __igt_gpu_reloc(struct i915_execbuffer *eb, > > > - struct drm_i915_gem_object *obj) > > > -{ > > > - const unsigned int offsets[] = { 8, 3, 0 }; > > > - const u64 mask = > > > - GENMASK_ULL(eb->reloc_cache.use_64bit_reloc ? 63 : 31, 0); > > > - const u32 *map = page_mask_bits(obj->mm.mapping); > > > - struct i915_request *rq; > > > - struct i915_vma *vma; > > > - int err; > > > - int i; > > > - > > > - vma = i915_vma_instance(obj, eb->context->vm, NULL); > > > - if (IS_ERR(vma)) > > > - return PTR_ERR(vma); > > > - > > > - err = i915_gem_object_lock(obj, &eb->ww); > > > - if (err) > > > - return err; > > > - > > > - err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, PIN_USER | PIN_HIGH); > > > - if (err) > > > - return err; > > > - > > > - /* 8-Byte aligned */ > > > - err = __reloc_entry_gpu(eb, vma, offsets[0] * sizeof(u32), 0); > > > - if (err <= 0) > > > - goto reloc_err; > > > - > > > - /* !8-Byte aligned */ > > > - err = __reloc_entry_gpu(eb, vma, offsets[1] * sizeof(u32), 1); > > > - if (err <= 0) > > > - goto reloc_err; > > > - > > > - /* Skip to the end of the cmd page */ > > > - i = PAGE_SIZE / sizeof(u32) - 1; > > > - i -= eb->reloc_cache.rq_size; > > > - memset32(eb->reloc_cache.rq_cmd + eb->reloc_cache.rq_size, > > > - MI_NOOP, i); > > > - eb->reloc_cache.rq_size += i; > > > - > > > - /* Force next batch */ > > > - err = __reloc_entry_gpu(eb, vma, offsets[2] * sizeof(u32), 2); > > > - if (err <= 0) > > > - goto reloc_err; > > > - > > > - GEM_BUG_ON(!eb->reloc_cache.rq); > > > - rq = i915_request_get(eb->reloc_cache.rq); > > > - reloc_gpu_flush(eb, &eb->reloc_cache); > > > - GEM_BUG_ON(eb->reloc_cache.rq); > > > - > > > - err = i915_gem_object_wait(obj, I915_WAIT_INTERRUPTIBLE, HZ / 2); > > > - if (err) { > > > - intel_gt_set_wedged(eb->engine->gt); > > > - goto put_rq; > > > - } > > > - > > > - if (!i915_request_completed(rq)) { > > > - pr_err("%s: did not wait for relocations!\n", eb->engine->name); > > > - err = -EINVAL; > > > - goto put_rq; > > > - } > > > - > > > - for (i = 0; i < ARRAY_SIZE(offsets); i++) { > > > - u64 reloc = read_reloc(map, offsets[i], mask); > > > - > > > - if (reloc != i) { > > > - pr_err("%s[%d]: map[%d] %llx != %x\n", > > > - eb->engine->name, i, offsets[i], reloc, i); > > > - err = -EINVAL; > > > - } > > > - } > > > - if (err) > > > - igt_hexdump(map, 4096); > > > - > > > -put_rq: > > > - i915_request_put(rq); > > > -unpin_vma: > > > - i915_vma_unpin(vma); > > > - return err; > > > - > > > -reloc_err: > > > - if (!err) > > > - err = -EIO; > > > - goto unpin_vma; > > > -} > > > - > > > -static int igt_gpu_reloc(void *arg) > > > -{ > > > - struct i915_execbuffer eb; > > > - struct drm_i915_gem_object *scratch; > > > - int err = 0; > > > - u32 *map; > > > - > > > - eb.i915 = arg; > > > - > > > - scratch = i915_gem_object_create_internal(eb.i915, 4096); > > > - if (IS_ERR(scratch)) > > > - return PTR_ERR(scratch); > > > - > > > - map = i915_gem_object_pin_map_unlocked(scratch, I915_MAP_WC); > > > - if (IS_ERR(map)) { > > > - err = PTR_ERR(map); > > > - goto err_scratch; > > > - } > > > - > > > - intel_gt_pm_get(&eb.i915->gt); > > > - > > > - for_each_uabi_engine(eb.engine, eb.i915) { > > > - if (intel_engine_requires_cmd_parser(eb.engine) || > > > - intel_engine_using_cmd_parser(eb.engine)) > > > - continue; > > > - > > > - reloc_cache_init(&eb.reloc_cache, eb.i915); > > > - memset(map, POISON_INUSE, 4096); > > > - > > > - intel_engine_pm_get(eb.engine); > > > - eb.context = intel_context_create(eb.engine); > > > - if (IS_ERR(eb.context)) { > > > - err = PTR_ERR(eb.context); > > > - goto err_pm; > > > - } > > > - eb.reloc_pool = NULL; > > > - eb.reloc_context = NULL; > > > - > > > - i915_gem_ww_ctx_init(&eb.ww, false); > > > -retry: > > > - err = intel_context_pin_ww(eb.context, &eb.ww); > > > - if (!err) { > > > - err = __igt_gpu_reloc(&eb, scratch); > > > - > > > - intel_context_unpin(eb.context); > > > - } > > > - if (err == -EDEADLK) { > > > - err = i915_gem_ww_ctx_backoff(&eb.ww); > > > - if (!err) > > > - goto retry; > > > - } > > > - i915_gem_ww_ctx_fini(&eb.ww); > > > - > > > - if (eb.reloc_pool) > > > - intel_gt_buffer_pool_put(eb.reloc_pool); > > > - if (eb.reloc_context) > > > - intel_context_put(eb.reloc_context); > > > - > > > - intel_context_put(eb.context); > > > -err_pm: > > > - intel_engine_pm_put(eb.engine); > > > - if (err) > > > - break; > > > - } > > > - > > > - if (igt_flush_test(eb.i915)) > > > - err = -EIO; > > > - > > > - intel_gt_pm_put(&eb.i915->gt); > > > -err_scratch: > > > - i915_gem_object_put(scratch); > > > - return err; > > > -} > > > - > > > -int i915_gem_execbuffer_live_selftests(struct drm_i915_private *i915) > > > -{ > > > - static const struct i915_subtest tests[] = { > > > - SUBTEST(igt_gpu_reloc), > > > - }; > > > - > > > - if (intel_gt_is_wedged(&i915->gt)) > > > - return 0; > > > - > > > - return i915_live_subtests(tests, i915); > > > -} > > > -- > > > 2.32.0 > > > > > > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch