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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 13/20] drm/i915/dp: Reorder intel_dp_compute_config() a bit
Date: Wed, 27 Oct 2021 11:49:08 +0300	[thread overview]
Message-ID: <YXkShFxx4NEvUXPn@intel.com> (raw)
In-Reply-To: <90e98c64-064d-fa5e-7ba5-a58b412f78b8@intel.com>

On Wed, Oct 27, 2021 at 12:36:17PM +0530, Nautiyal, Ankit K wrote:
> 
> On 10/15/2021 7:09 PM, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Consolidate the double pfit call, and reorder things so that
> > intel_dp_output_format() and intel_dp_compute_link_config() are
> > back-to-back. They are intimately related, and will need to be
> > called twice to properly handle the "4:2:0 also" modes.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >   drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++-------------
> >   1 file changed, 10 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 2440a6a2e4fc..de2b3d33a726 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1764,25 +1764,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >   	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && encoder->port != PORT_A)
> >   		pipe_config->has_pch_encoder = true;
> >   
> > -	pipe_config->output_format = intel_dp_output_format(&intel_connector->base,
> > -							    adjusted_mode);
> > -
> > -	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> > -		ret = intel_panel_fitting(pipe_config, conn_state);
> > -		if (ret)
> > -			return ret;
> > -	}
> > -
> >   	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config, conn_state);
> >   
> >   	if (intel_dp_is_edp(intel_dp) && intel_connector->panel.fixed_mode) {
> >   		ret = intel_panel_compute_config(intel_connector, adjusted_mode);
> >   		if (ret)
> >   			return ret;
> > -
> > -		ret = intel_panel_fitting(pipe_config, conn_state);
> > -		if (ret)
> > -			return ret;
> >   	}
> >   
> >   	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> > @@ -1798,10 +1785,20 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >   	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
> >   		return -EINVAL;
> >   
> > +	pipe_config->output_format = intel_dp_output_format(&intel_connector->base,
> > +							    adjusted_mode);
> > +
> >   	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
> >   	if (ret < 0)
> >   		return ret;
> >   
> > +	if ((intel_dp_is_edp(intel_dp) && intel_connector->panel.fixed_mode) ||
> > +	    pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> > +		ret = intel_panel_fitting(pipe_config, conn_state);
> 
> Panel fitting code will perhaps need handling for Big joiner.
> 
> In case of bigjoiner, we might need to set the pch_pfit->dest width 
> halved, otherwise we might have scaler width going out of bound.

Yes pfit vs. bigjoiner is known to be 100% broken.

> 
> Now that we already have pipe_config->bigjoiner set, we can use it in 
> pch_panel_fitting( ) to tweak dest width.
> 
> Something like 
> https://github.com/aknautiyal/drm-tip/commit/c15060be2eca81738f8f0d3431e04215777edfc9

Hmm. I gues that would be sufficient for the fullscreen case.
And we should probably just -EINVAL the other cases for now.

Actually doing borders correctly with bigjoiner would involve
doing this after/during the bigjoiner state copy.

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2021-10-27  8:49 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-15 13:39 [Intel-gfx] [PATCH 00/20] drm/i915: Fix up DP DFP 4:2:0 handling more Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 01/20] drm/i915/hdmi: Split intel_hdmi_bpc_possible() to source vs. sink pair Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 02/20] drm/i915/hdmi: Introduce intel_hdmi_is_ycbr420() Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 03/20] drm/i915/hdmi: Introduce intel_hdmi_tmds_clock() Ville Syrjala
2021-10-19 18:16   ` Jani Nikula
2021-10-19 18:19     ` Ville Syrjälä
2021-10-15 13:39 ` [Intel-gfx] [PATCH 04/20] drm/i915/hdmi: Unify "4:2:0 also" logic between .mode_valid() and .compute_config() Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 05/20] drm/i915/hdmi: Extract intel_hdmi_output_format() Ville Syrjala
2021-10-19 19:28   ` Jani Nikula
2021-10-15 13:39 ` [Intel-gfx] [PATCH 06/20] drm/i915/hdmi: Clean up TMDS clock limit exceeding user mode handling Ville Syrjala
2022-01-21  9:57   ` Lisovskiy, Stanislav
2021-10-15 13:39 ` [Intel-gfx] [PATCH 07/20] drm/i915/hdmi: Simplify intel_hdmi_mode_clock_valid() Ville Syrjala
2022-02-10 12:32   ` Nautiyal, Ankit K
2021-10-15 13:39 ` [Intel-gfx] [PATCH 08/20] drm/i915/dp: Reuse intel_hdmi_tmds_clock() Ville Syrjala
2022-02-10 12:34   ` Nautiyal, Ankit K
2021-10-15 13:39 ` [Intel-gfx] [PATCH 09/20] drm/i915/dp: Extract intel_dp_tmds_clock_valid() Ville Syrjala
2021-12-10  5:20   ` Nautiyal, Ankit K
2021-12-15 20:17     ` Ville Syrjälä
2021-10-15 13:39 ` [Intel-gfx] [PATCH 10/20] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 11/20] drm/i915/dp: Extract intel_dp_has_audio() Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 12/20] drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/ Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 13/20] drm/i915/dp: Reorder intel_dp_compute_config() a bit Ville Syrjala
2021-10-27  7:06   ` Nautiyal, Ankit K
2021-10-27  8:49     ` Ville Syrjälä [this message]
2021-10-15 13:39 ` [Intel-gfx] [PATCH 14/20] drm/i915/dp: Pass around intel_connector rather than drm_connector Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 15/20] drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 16/20] drm/i915/dp: Rework HDMI DFP TMDS clock handling Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 17/20] drm/i915/dp: Add support for "4:2:0 also" modes for DP Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 18/20] drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 19/20] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix Ville Syrjala
2021-10-15 13:39 ` [Intel-gfx] [PATCH 20/20] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now Ville Syrjala
2021-10-27  7:27   ` Nautiyal, Ankit K
2021-10-27  8:54     ` Ville Syrjälä
2021-12-10  6:04       ` Nautiyal, Ankit K
2021-10-15 14:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix up DP DFP 4:2:0 handling more Patchwork
2021-10-15 15:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-15 21:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-27  6:59 ` [Intel-gfx] [PATCH 00/20] " Nautiyal, Ankit K

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