From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Move dsc/joiner enable into hsw_crtc_enable()
Date: Tue, 25 Jan 2022 09:07:45 +0200 [thread overview]
Message-ID: <Ye+hwWx4rPJQHZmE@intel.com> (raw)
In-Reply-To: <87o8401f7c.fsf@intel.com>
On Tue, Jan 25, 2022 at 08:50:47AM +0200, Jani Nikula wrote:
> On Tue, 25 Jan 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Lift the dsc/joiner enable up from the wonky places where it
> > currently sits (ddi .pre_enable() or icl_ddi_bigjoiner_pre_enable())
> > into hsw_crtc_enable() where we write the other per-pipe stuff
> > as well. Makes the transcoder vs. pipe split less confusing.
> >
> > For DSI this results in slight reordering between the dsc/joiner
> > enable vs. transcoder timings setup, but I can't really think
> > why that should cause any issues since the transcoder isn't yet
> > enabled at that point.
> >
> > v2: Take care of dsi (Jani)
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> One question inline.
>
> > ---
> > drivers/gpu/drm/i915/display/icl_dsi.c | 2 --
> > drivers/gpu/drm/i915/display/intel_ddi.c | 6 ------
> > drivers/gpu/drm/i915/display/intel_display.c | 12 +++++-------
> > 3 files changed, 5 insertions(+), 15 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> > index 95f49535fa6e..16a611f7d659 100644
> > --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> > @@ -1233,8 +1233,6 @@ static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
> >
> > intel_dsc_dsi_pps_write(encoder, pipe_config);
> >
> > - intel_dsc_enable(pipe_config);
> > -
> > /* step6c: configure transcoder timings */
> > gen11_dsi_set_transcoder_timings(encoder, pipe_config);
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 2f20abc5122d..5d1f7d6218c5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -2425,9 +2425,6 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> > intel_ddi_enable_fec(encoder, crtc_state);
> >
> > intel_dsc_dp_pps_write(encoder, crtc_state);
> > -
> > - if (!crtc_state->bigjoiner)
> > - intel_dsc_enable(crtc_state);
> > }
> >
> > static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
> > @@ -2493,9 +2490,6 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
> > intel_ddi_enable_pipe_clock(encoder, crtc_state);
> >
> > intel_dsc_dp_pps_write(encoder, crtc_state);
> > -
> > - if (!crtc_state->bigjoiner)
> > - intel_dsc_enable(crtc_state);
> > }
> >
> > static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index d2906434ab3f..13b1de03640d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -1974,7 +1974,6 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
> > static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
> > const struct intel_crtc_state *crtc_state)
> > {
> > - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > struct intel_crtc_state *master_crtc_state;
> > struct intel_crtc *master_crtc;
> > struct drm_connector_state *conn_state;
> > @@ -2004,12 +2003,6 @@ static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
> >
> > if (crtc_state->bigjoiner_slave)
> > intel_encoders_pre_enable(state, master_crtc);
> > -
> > - /* need to enable VDSC, which we skipped in pre-enable */
> > - intel_dsc_enable(crtc_state);
> > -
> > - if (DISPLAY_VER(dev_priv) >= 13)
> > - intel_uncompressed_joiner_enable(crtc_state);
> > }
> >
> > static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
> > @@ -2057,6 +2050,11 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> > icl_ddi_bigjoiner_pre_enable(state, new_crtc_state);
> > }
> >
> > + intel_dsc_enable(new_crtc_state);
> > +
> > + if (DISPLAY_VER(dev_priv) >= 13)
> > + intel_uncompressed_joiner_enable(new_crtc_state);
> > +
>
> Should this call be moved inside intel_dsc_enable()? I mean it's not
> compression, but it's the same splitter/joiner/etc. block that handles
> all of this?
We probably want to restructure the code a bit more so that
it's not all pretending to be about dsc. Dunno if we should just have
some dss_enable() thing to configure everything about the
splitter/joiner stuff. Although maybe there are some conflicting
sequencing requirements for MSO, so maybe not all of it can go into
the same place? In which case I quess we should just have some kind
of joiner_enable() thing.
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2022-01-25 7:07 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-24 19:26 [Intel-gfx] [PATCH 1/5] drm/i915: Skip dsc readout if the transcoder is disabled Ville Syrjala
2022-01-24 19:26 ` [Intel-gfx] [PATCH 2/5] drm/i915: Simplify intel_dsc_source_support() Ville Syrjala
2022-01-24 19:26 ` [Intel-gfx] [PATCH 3/5] drm/i915: Use per-device debugs for bigjoiner stuff Ville Syrjala
2022-01-24 19:26 ` [Intel-gfx] [PATCH 4/5] drm/i915: Extract hsw_configure_cpu_transcoder() Ville Syrjala
2022-01-25 5:38 ` Jani Nikula
2022-01-24 19:26 ` [Intel-gfx] [PATCH 5/5] drm/i915: Move dsc/joiner enable into hsw_crtc_enable() Ville Syrjala
2022-01-25 5:40 ` Jani Nikula
2022-01-25 5:59 ` Ville Syrjälä
2022-01-25 6:39 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2022-01-25 6:50 ` Jani Nikula
2022-01-25 7:07 ` Ville Syrjälä [this message]
2022-01-24 23:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Skip dsc readout if the transcoder is disabled Patchwork
2022-01-25 5:36 ` [Intel-gfx] [PATCH 1/5] " Jani Nikula
2022-01-25 5:38 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] " Patchwork
2022-01-25 8:20 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/5] drm/i915: Skip dsc readout if the transcoder is disabled (rev2) Patchwork
2022-01-26 7:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Skip dsc readout if the transcoder is disabled (rev3) Patchwork
2022-01-26 10:00 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Ye+hwWx4rPJQHZmE@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox