From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5AACDC433EF for ; Thu, 13 Jan 2022 20:24:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B3BB10E2CA; Thu, 13 Jan 2022 20:24:00 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id BD1E810E12A for ; Thu, 13 Jan 2022 20:23:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1642105439; x=1673641439; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=VqLI5uwKuK5t8LrctpSrf42TV3Yp1qXJ4zhKYQgVxTs=; b=CjzSAJsbSnUDMfQOcvDydmScieYQ2g30vpQafhssbwxr3SuNCsLwZfys snAuJXoTDXzOiW+3F9J0zdY8p31OYYEOyFOERLb/J2y342kXbiAhR8uSS X7TdFufDAATAISmjLsmkqm08sQowPXVwKkv4aGaiyxMM9MJeKn7oU40zw Uy6F6zjEhid5mTfexiQFVfj6QHzEPDSKYEbPjq91PbCgR/A/cVvIQpkEH 7Yp6EP0U51X94fEzqF8g1EmjLPn+wjsoQ7VfbGOmfELT1HpV2sDne1EFE wGbTxFKLRCgkGVdj8UowODUO5KuIavSwWDUIYwlIYxF0EMrCb5i0VOW7t A==; X-IronPort-AV: E=McAfee;i="6200,9189,10226"; a="224796326" X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="224796326" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 12:23:54 -0800 X-IronPort-AV: E=Sophos;i="5.88,286,1635231600"; d="scan'208";a="670634185" Received: from cdaffron-mobl.amr.corp.intel.com (HELO intel.com) ([10.255.32.51]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2022 12:23:53 -0800 Date: Thu, 13 Jan 2022 15:23:52 -0500 From: Rodrigo Vivi To: Jani Nikula Message-ID: References: <20220111051600.3429104-1-matthew.d.roper@intel.com> <8735lr7et4.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8735lr7et4.fsf@intel.com> Subject: Re: [Intel-gfx] [PATCH v3 00/11] Start cleaning up register definitions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi , intel-gfx@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Jan 13, 2022 at 06:58:47PM +0200, Jani Nikula wrote: > On Wed, 12 Jan 2022, Rodrigo Vivi wrote: > > I understand that I'm late to the fun here, but I got myself wondering if > > we couldn't separated the registers in a "regs" directory > > and find some way to organize them in IP blocks matching the hw... > > > > mainly thinking about 2 cases: > > > > 1. searching for registers usages... > > 2. the idea of having some sort of auto generation from spec... > > At least to me it's more important to split these between display and > gt, and I'd prefer not to have them in the same directory. yeap, it makes sense... > > BR, > Jani. > > > -- > Jani Nikula, Intel Open Source Graphics Center