From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CFABEC433F5 for ; Thu, 24 Feb 2022 13:06:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5A97110E187; Thu, 24 Feb 2022 13:06:36 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 031EB10E187 for ; Thu, 24 Feb 2022 13:06:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1645707995; x=1677243995; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; 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charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <6dfd659cd15317139cade1c4c1e2825475167940.camel@intel.com> X-Patchwork-Hint: comment Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Allow users to disable PSR2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "intel-gfx@lists.freedesktop.org" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Feb 24, 2022 at 01:01:24PM +0000, Souza, Jose wrote: > On Thu, 2022-02-24 at 12:12 +0200, Ville Syrjälä wrote: > > On Wed, Feb 23, 2022 at 11:41:03AM -0800, José Roberto de Souza wrote: > > > Some users are suffering with PSR2 issues that are under debug or > > > issues that were root caused to panel firmware, to make life of those > > > users easier here adding a option to disable PSR1 with kernel > > > parameter. > > > > > > Using the same enable_psr that is current used to turn PSR1 and PSR2 > > > off or on and adding a new value to only disable PSR2. > > > The previous valid values did not had their behavior changed. > > > > > > Link: https://gitlab.freedesktop.org/drm/intel/-/issues/4951 > > > Cc: Jouni Högander > > > Signed-off-by: José Roberto de Souza > > > --- > > > drivers/gpu/drm/i915/display/intel_psr.c | 4 ++++ > > > drivers/gpu/drm/i915/i915_params.c | 2 +- > > > 2 files changed, 5 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > > > index 2e0b092f4b6be..fc6b684bb7bec 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > > > @@ -100,11 +100,15 @@ static bool psr_global_enabled(struct intel_dp *intel_dp) > > > > > > static bool psr2_global_enabled(struct intel_dp *intel_dp) > > > { > > > + struct drm_i915_private *i915 = dp_to_i915(intel_dp); > > > + > > > switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) { > > > case I915_PSR_DEBUG_DISABLE: > > > case I915_PSR_DEBUG_FORCE_PSR1: > > > return false; > > > default: > > > + if (i915->params.enable_psr == 2) > > > + return false; > > > return true; > > > } > > > } > > > diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c > > > index eea355c2fc28a..a9b97e6eb3df0 100644 > > > --- a/drivers/gpu/drm/i915/i915_params.c > > > +++ b/drivers/gpu/drm/i915/i915_params.c > > > @@ -94,7 +94,7 @@ i915_param_named_unsafe(enable_hangcheck, bool, 0400, > > > > > > i915_param_named_unsafe(enable_psr, int, 0400, > > > "Enable PSR " > > > - "(0=disabled, 1=enabled) " > > > + "(0=disabled, 1=enable up to PSR2 if supported, 2=enable up to PSR1) " > > > > That seems very unintuitive. I would just make it 1==PSR1 and 2==PSR2. > > This will break current behavior. It's a modparam. We routinely break those since they are not meant to used by normal users as any kind of permanent "make my machine work" knob. -- Ville Syrjälä Intel