From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFE22ECAAD8 for ; Fri, 16 Sep 2022 08:20:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8257910E3EF; Fri, 16 Sep 2022 08:19:49 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3384A10E3BC; Fri, 16 Sep 2022 08:19:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663316386; x=1694852386; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=ZHLMkVJH+wTrzkraMPO+ButVUOz0gjhUQzq5UUv9Wgw=; b=Y+7A4/J9QaiRiz93HHjgA6qqCBoWC1cpJ1vfxpa0aUWz+xkc1q3yDgN7 NepKZeIC2abatFzSmtZm1Qf3ncxIg7e7OG8LlJSyTucavpvSji/gTFNvf EVkk5YmDyUtIHxZtLxqQivKow9nVjqUEbMz7bfkISkJHjRxZs+9XWiOnV CO9ShiqmPHo3kkNQuo1gohp+W30EZxMIs5rzqs6NvHV+4R+bwYbgDAFGt aKdAO0RCXlNie7c4oVJVrXDxo47+HIrJh4U78Y3gpecanz4lXn8PQxV6Y B9Jo/gdesPQeAazfvOX+1wDl8RhorrLbVfcxE+Ck8Ds0k7lqwvvlcRi2c g==; X-IronPort-AV: E=McAfee;i="6500,9779,10471"; a="281970287" X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="281970287" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2022 01:19:45 -0700 X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="650797679" Received: from sischoen-mobl1.ger.corp.intel.com (HELO intel.com) ([10.251.208.222]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2022 01:19:44 -0700 Date: Fri, 16 Sep 2022 10:19:23 +0200 From: Andi Shyti To: Matt Roper Message-ID: References: <20220915232654.3283095-1-matthew.d.roper@intel.com> <20220915232654.3283095-5-matthew.d.roper@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220915232654.3283095-5-matthew.d.roper@intel.com> Subject: Re: [Intel-gfx] [PATCH v2 4/4] drm/i915: Handle all GTs on driver (un)load paths X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hi Matt, On Thu, Sep 15, 2022 at 04:26:54PM -0700, Matt Roper wrote: > From: Tvrtko Ursulin > > This, along with the changes already landed in commit 1c66a12ab431 > ("drm/i915: Handle each GT on init/release and suspend/resume") makes > engines from all GTs actually known to the driver. > > To accomplish this we need to sprinkle a lot of for_each_gt calls around > but is otherwise pretty un-eventuful. > > v2: > - Consolidate adjacent GT loops in a couple places. (Daniele) > > Cc: Daniele Ceraolo Spurio > Signed-off-by: Tvrtko Ursulin > Signed-off-by: Matt Roper Reviewed-by: Andi Shyti Andi