* [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes
@ 2025-02-14 12:11 Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 01/19] drm/i915/vrr: Remove unwanted comment Ankit Nautiyal
` (21 more replies)
0 siblings, 22 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Even though the VRR timing generator (TG) is primarily used for
variable refresh rates, it can be used for fixed refresh rates as
well. For a fixed refresh rate the Flip Line and Vmax must be equal
(TRANS_VRR_FLIPLINE = TRANS_VRR_VMAX). Beyond that, there are some
dependencies between the VRR timings and the legacy timing generator
registers.
This series is an attempt to use VRR TG for fixed refresh rate.
For platforms XE2LPD+, always go with VRR timing generator for both fixed and
variable refresh rate cases.
Rev2:
-Added support from MTL+ and for HDMI too.
-Changed VRR VSYNC programming which is required for HDMI.
-Modified vrr compute config for bigjoiner case. (Still to be tested).
Rev3:
-Start support from XE2LPD+ as MTL needs a WA to have PSR +VRR (fixed
refresh rate)
-Add changes to enable PSR with VRR with fixed refresh rate.
Rev4:
-Addressed review comments from Mitul and rebased.
Rev5:
-Avoid MSA Ignore PAR timing enable bit for fixed refresh rate
with VRR TG.
-Skip VRR compute config for HDMI connected via DP-HDMI2.1 PCON.
-Print fixed_rr along with other VRR parameters in crtc state dump.
-Rebase
Rev6:
-Refactor VRR code to have distinct modes in which VRR timing generator
can be used: VRR, FIXED_RR, CMRR.
-Bring the cmmr attributes in vrr struct.
-Remove condition flipline > vmin for LNL.
-Account for vmax being 0 based while MSA vtotal being 1 based.
Rev7:
I have added patches from series for AS SDP fixes [1] , as without panels
that support AS SDP gives a lot of issues.
There were major changes in design as discussed in last version [2].
Below are the change logs:
-Change the design to compute vrr state based on actual uapi.vrr.enable
knob. So when that knob is disabled we always compute vmin=flipline=vmax.
-Always set vmin=crtc_vtotal instead of the using the current refresh rate
based approach. This helps to have the same guardband while switching
between fixed and variable timings.
-Disable CMRR for now to reduce complexity while changing timings on the
fly.
-Change the state computation and add vmin/vmax/flipline reprogramming
to vrr_{enable,disable}()
-Introduce the fixed refresh mode from MTL instead of LNL.
[1] https://patchwork.freedesktop.org/series/137035/
[2] https://patchwork.kernel.org/project/intel-gfx/cover/20241111091221.2992818-1-ankit.k.nautiyal@intel.com/
Rev8:
-Addressed review comments from Ville.
-Refactored few patches.
-Dropped patches:
1. "drm/i915/vrr: Adjust Vtotal for MSA for fixed timing"
2. "drm/i915/vrr: Avoid sending PUSH when VRR TG is used with Fixed
refresh rate"
Rev9:
Dropped patches to introduce vrr.mode and cmrr refactor.
Addressed comments from Ville.
Ankit Nautiyal (19):
drm/i915/vrr: Remove unwanted comment
drm/i915:vrr: Separate out functions to compute vmin and vmax
drm/i915/vrr: Make helpers for cmrr and vrr timings
drm/i915/vrr: Disable CMRR
drm/i915/vrr: Track vrr.enable only for variable timing
drm/i915/vrr: Use crtc_vtotal for vmin
drm/i915/vrr: Prepare for fixed refresh rate timings
drm/i915/dp: Avoid vrr compute config for HDMI sink
drm/i915/display: Enable MSA Ignore Timing PAR only when in not
fixed_rr mode
drm/i915/hdmi: Use VRR Timing generator for HDMI
drm/i915/display: Disable PSR before disabling VRR
drm/i915/display: Extend WA 14015406119 for PSR2
drm/i915/vrr: Handle joiner with vrr
drm/i915/vrr: Refactor condition for computing vmax and LRR
drm/i915/vrr: Always set vrr vmax/vmin/flipline in
vrr_{enable/disable}
drm/i915/display: Use fixed_rr timings in modeset sequence
drm/i915/display: Use fixed rr timings in
intel_set_transcoder_timings_lrr()
drm/i915/vrr: Always use VRR timing generator for MTL+
drm/i915/display: Add fixed_rr to crtc_state dump
.../drm/i915/display/intel_crtc_state_dump.c | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 23 +-
drivers/gpu/drm/i915/display/intel_dp.c | 8 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +
drivers/gpu/drm/i915/display/intel_vrr.c | 270 ++++++++++++++----
drivers/gpu/drm/i915/display/intel_vrr.h | 4 +
7 files changed, 244 insertions(+), 69 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
* [PATCH 01/19] drm/i915/vrr: Remove unwanted comment
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 02/19] drm/i915:vrr: Separate out functions to compute vmin and vmax Ankit Nautiyal
` (20 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
The comment about fixed average vtotal is incorrect.
Remove it.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index cac49319026d..106bfaf6649b 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -276,11 +276,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
*/
crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
- /*
- * When panel is VRR capable and userspace has
- * not enabled adaptive sync mode then Fixed Average
- * Vtotal mode should be enabled.
- */
if (crtc_state->uapi.vrr_enabled) {
crtc_state->vrr.enable = true;
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 02/19] drm/i915:vrr: Separate out functions to compute vmin and vmax
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 01/19] drm/i915/vrr: Remove unwanted comment Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 03/19] drm/i915/vrr: Make helpers for cmrr and vrr timings Ankit Nautiyal
` (19 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Make helpers to compute vmin and vmax.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 39 +++++++++++++++++++-----
1 file changed, 31 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 106bfaf6649b..a435b8d5b631 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -222,6 +222,35 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
return vtotal;
}
+static
+int intel_vrr_compute_vmin(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
+{
+ int vmin;
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
+ adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
+ vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
+
+ return vmin;
+}
+
+static
+int intel_vrr_compute_vmax(struct intel_connector *connector,
+ struct drm_display_mode *adjusted_mode)
+{
+ int vmax;
+ const struct drm_display_info *info = &connector->base.display_info;
+
+ vmax = adjusted_mode->crtc_clock * 1000 /
+ (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq);
+
+ vmax = max_t(int, vmax, adjusted_mode->crtc_vtotal);
+
+ return vmax;
+}
+
void
intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
@@ -232,7 +261,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct intel_dp *intel_dp = intel_attached_dp(connector);
bool is_edp = intel_dp_is_edp(intel_dp);
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- const struct drm_display_info *info = &connector->base.display_info;
int vmin, vmax;
/*
@@ -253,13 +281,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
if (HAS_LRR(display))
crtc_state->update_lrr = true;
- vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
- adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
- vmax = adjusted_mode->crtc_clock * 1000 /
- (adjusted_mode->crtc_htotal * info->monitor_range.min_vfreq);
-
- vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
- vmax = max_t(int, vmax, adjusted_mode->crtc_vtotal);
+ vmin = intel_vrr_compute_vmin(connector, adjusted_mode);
+ vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
if (vmin >= vmax)
return;
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 03/19] drm/i915/vrr: Make helpers for cmrr and vrr timings
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 01/19] drm/i915/vrr: Remove unwanted comment Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 02/19] drm/i915:vrr: Separate out functions to compute vmin and vmax Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 04/19] drm/i915/vrr: Disable CMRR Ankit Nautiyal
` (18 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Separate out functions for computing cmrr and vrr timings.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 45 +++++++++++++++---------
1 file changed, 28 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index a435b8d5b631..008a9c3e152d 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -222,6 +222,30 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
return vtotal;
}
+static
+void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state)
+{
+ crtc_state->vrr.enable = true;
+ crtc_state->cmrr.enable = true;
+ /*
+ * TODO: Compute precise target refresh rate to determine
+ * if video_mode_required should be true. Currently set to
+ * false due to uncertainty about the precise target
+ * refresh Rate.
+ */
+ crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false);
+ crtc_state->vrr.vmin = crtc_state->vrr.vmax;
+ crtc_state->vrr.flipline = crtc_state->vrr.vmin;
+ crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+}
+
+static
+void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
+{
+ crtc_state->vrr.enable = true;
+ crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
+}
+
static
int intel_vrr_compute_vmin(struct intel_connector *connector,
struct drm_display_mode *adjusted_mode)
@@ -299,23 +323,10 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
*/
crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
- if (crtc_state->uapi.vrr_enabled) {
- crtc_state->vrr.enable = true;
- crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
- } else if (is_cmrr_frac_required(crtc_state) && is_edp) {
- crtc_state->vrr.enable = true;
- crtc_state->cmrr.enable = true;
- /*
- * TODO: Compute precise target refresh rate to determine
- * if video_mode_required should be true. Currently set to
- * false due to uncertainty about the precise target
- * refresh Rate.
- */
- crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false);
- crtc_state->vrr.vmin = crtc_state->vrr.vmax;
- crtc_state->vrr.flipline = crtc_state->vrr.vmin;
- crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
- }
+ if (crtc_state->uapi.vrr_enabled)
+ intel_vrr_compute_vrr_timings(crtc_state);
+ else if (is_cmrr_frac_required(crtc_state) && is_edp)
+ intel_vrr_compute_cmrr_timings(crtc_state);
if (HAS_AS_SDP(display)) {
crtc_state->vrr.vsync_start =
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 04/19] drm/i915/vrr: Disable CMRR
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (2 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 03/19] drm/i915/vrr: Make helpers for cmrr and vrr timings Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 05/19] drm/i915/vrr: Track vrr.enable only for variable timing Ankit Nautiyal
` (17 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Switching between variable and fixed timings is possible as for that we
just need to flip between VRR timings. However for CMRR along with the
timings, few other bits also need to be changed on the fly, which might
cause issues. So disable CMRR for now, till we have variable and fixed
timings sorted out.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 008a9c3e152d..0ee7fb0362ce 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -182,7 +182,8 @@ is_cmrr_frac_required(struct intel_crtc_state *crtc_state)
int calculated_refresh_k, actual_refresh_k, pixel_clock_per_line;
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- if (!HAS_CMRR(display))
+ /* Avoid CMRR for now till we have VRR with fixed timings working */
+ if (!HAS_CMRR(display) || true)
return false;
actual_refresh_k =
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 05/19] drm/i915/vrr: Track vrr.enable only for variable timing
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (3 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 04/19] drm/i915/vrr: Disable CMRR Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-17 18:06 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 06/19] drm/i915/vrr: Use crtc_vtotal for vmin Ankit Nautiyal
` (16 subsequent siblings)
21 siblings, 1 reply; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Since CMRR is now disabled, use the flag vrr.enable to tracks if vrr timing
generator is used with variable timings.
Avoid setting vrr.enable for CMRR and adjust readout to not set vrr.enable
when vmax == vmin == flipline (fixed refresh rate timing).
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 0ee7fb0362ce..efa2aa284285 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -226,7 +226,6 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
static
void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state)
{
- crtc_state->vrr.enable = true;
crtc_state->cmrr.enable = true;
/*
* TODO: Compute precise target refresh rate to determine
@@ -528,6 +527,14 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
}
+static
+bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
+{
+ return crtc_state->vrr.flipline &&
+ crtc_state->vrr.flipline == crtc_state->vrr.vmax &&
+ crtc_state->vrr.flipline == crtc_state->vrr.vmin;
+}
+
void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
@@ -537,7 +544,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
trans_vrr_ctl = intel_de_read(display,
TRANS_VRR_CTL(display, cpu_transcoder));
- crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE;
if (HAS_CMRR(display))
crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE);
@@ -577,6 +583,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
}
}
+ crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE &&
+ !intel_vrr_is_fixed_rr(crtc_state);
+
if (crtc_state->vrr.enable)
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 06/19] drm/i915/vrr: Use crtc_vtotal for vmin
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (4 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 05/19] drm/i915/vrr: Track vrr.enable only for variable timing Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-17 18:08 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 07/19] drm/i915/vrr: Prepare for fixed refresh rate timings Ankit Nautiyal
` (15 subsequent siblings)
21 siblings, 1 reply; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
To have fixed refresh rate with VRR timing generator the
guardband/pipeline full can't be programmed on the fly. So we need to
ensure that the values satisfy both the fixed and variable refresh
rates.
Since we compute these value based on vmin, lets set the vmin to
crtc_vtotal for both fixed and variable timings instead of using the
current refresh rate based approach. This way the guardband remains
sufficient for both cases.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 34 +++++++++++++++++-------
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index efa2aa284285..3bcf2a026ad3 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -246,18 +246,34 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
}
+/*
+ * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to
+ * Vtotal value.
+ */
static
-int intel_vrr_compute_vmin(struct intel_connector *connector,
- struct drm_display_mode *adjusted_mode)
+int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state)
{
- int vmin;
- const struct drm_display_info *info = &connector->base.display_info;
+ struct intel_display *display = to_intel_display(crtc_state);
+ int crtc_vtotal = crtc_state->hw.adjusted_mode.crtc_vtotal;
- vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
- adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
- vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
+ if (DISPLAY_VER(display) >= 13)
+ return crtc_vtotal;
+ else
+ return crtc_vtotal -
+ intel_vrr_real_vblank_delay(crtc_state);
+}
- return vmin;
+static
+int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
+{
+ /*
+ * To make fixed rr and vrr work seamless the guardband/pipeline full
+ * should be set such that it satisfies both the fixed and variable
+ * timings.
+ * For this set the vmin as crtc_vtotal. With this we never need to
+ * change anything to do with the guardband.
+ */
+ return intel_vrr_fixed_rr_vtotal(crtc_state);
}
static
@@ -305,7 +321,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
if (HAS_LRR(display))
crtc_state->update_lrr = true;
- vmin = intel_vrr_compute_vmin(connector, adjusted_mode);
+ vmin = intel_vrr_compute_vmin(crtc_state);
vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
if (vmin >= vmax)
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 07/19] drm/i915/vrr: Prepare for fixed refresh rate timings
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (5 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 06/19] drm/i915/vrr: Use crtc_vtotal for vmin Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-17 18:12 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink Ankit Nautiyal
` (14 subsequent siblings)
21 siblings, 1 reply; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Currently we always compute the timings as if vrr is enabled.
With this approach the state checker becomes complicated when we
introduce fixed refresh rate mode with vrr timing generator.
To avoid the complications, instead of always computing vrr timings, we
compute vrr timings based on uapi.vrr_enable knob.
So when the knob is disabled we always compute vmin=flipline=vmax.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 54 ++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 3bcf2a026ad3..a4ed102a2119 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -263,6 +263,35 @@ int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state)
intel_vrr_real_vblank_delay(crtc_state);
}
+static
+int intel_vrr_fixed_rr_vmax(const struct intel_crtc_state *crtc_state)
+{
+ return intel_vrr_fixed_rr_vtotal(crtc_state);
+}
+
+static
+int intel_vrr_fixed_rr_vmin(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+
+ return intel_vrr_fixed_rr_vtotal(crtc_state) -
+ intel_vrr_flipline_offset(display);
+}
+
+static
+int intel_vrr_fixed_rr_flipline(const struct intel_crtc_state *crtc_state)
+{
+ return intel_vrr_fixed_rr_vtotal(crtc_state);
+}
+
+static
+void intel_vrr_prepare_fixed_timings(struct intel_crtc_state *crtc_state)
+{
+ crtc_state->vrr.vmax = intel_vrr_fixed_rr_vmax(crtc_state);
+ crtc_state->vrr.vmin = intel_vrr_fixed_rr_vmin(crtc_state);
+ crtc_state->vrr.flipline = intel_vrr_fixed_rr_flipline(crtc_state);
+}
+
static
int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
{
@@ -343,6 +372,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
intel_vrr_compute_vrr_timings(crtc_state);
else if (is_cmrr_frac_required(crtc_state) && is_edp)
intel_vrr_compute_cmrr_timings(crtc_state);
+ else
+ intel_vrr_prepare_fixed_timings(crtc_state);
if (HAS_AS_SDP(display)) {
crtc_state->vrr.vsync_start =
@@ -514,6 +545,13 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
if (!crtc_state->vrr.enable)
return;
+ intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
+ crtc_state->vrr.vmin - 1);
+ intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
+ crtc_state->vrr.vmax - 1);
+ intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
+ crtc_state->vrr.flipline - 1);
+
intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
TRANS_PUSH_EN);
@@ -527,6 +565,20 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
}
}
+static
+void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+ intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
+ intel_vrr_fixed_rr_vmin(crtc_state) - 1);
+ intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
+ intel_vrr_fixed_rr_vmax(crtc_state) - 1);
+ intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
+ intel_vrr_fixed_rr_flipline(crtc_state) - 1);
+}
+
void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
{
struct intel_display *display = to_intel_display(old_crtc_state);
@@ -541,6 +593,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
TRANS_VRR_STATUS(display, cpu_transcoder),
VRR_STATUS_VRR_EN_LIVE, 1000);
intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
+
+ intel_vrr_set_fixed_rr_timings(old_crtc_state);
}
static
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (6 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 07/19] drm/i915/vrr: Prepare for fixed refresh rate timings Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-17 18:14 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 09/19] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode Ankit Nautiyal
` (13 subsequent siblings)
21 siblings, 1 reply; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Currently we do not support VRR with HDMI so skip vrr compute
config step for DP with HDMI sink.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9ed7d46143e9..bdf53d255d91 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3199,7 +3199,13 @@ intel_dp_compute_config(struct intel_encoder *encoder,
if (pipe_config->splitter.enable)
pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count;
- intel_vrr_compute_config(pipe_config, conn_state);
+ /*
+ * VRR via PCON is currently unsupported.
+ * TODO: Add support for VRR for DP HDMI2.1 PCON.
+ */
+ if (!intel_dp_has_hdmi_sink(intel_dp))
+ intel_vrr_compute_config(pipe_config, conn_state);
+
intel_dp_compute_as_sdp(intel_dp, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state);
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 09/19] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (7 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 10/19] drm/i915/hdmi: Use VRR Timing generator for HDMI Ankit Nautiyal
` (12 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
MSA Ignore Timing PAR enable is set in the DP sink when we enable variable
refresh rate.
Currently for link training we depend on flipline to decide whether we
want to ignore the msa timings. With fixed refresh rate we will still
fill the flipline in all cases whether panel supports VRR or not.
Change the condition for link training to ignore the msa timings if
vrr.in_range.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 3cc06c916017..549e4ebd9404 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -725,7 +725,7 @@ static void intel_dp_update_downspread_ctrl(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state)
{
intel_dp_link_training_set_mode(intel_dp,
- crtc_state->port_clock, crtc_state->vrr.flipline);
+ crtc_state->port_clock, crtc_state->vrr.in_range);
}
void intel_dp_link_training_set_bw(struct intel_dp *intel_dp,
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 10/19] drm/i915/hdmi: Use VRR Timing generator for HDMI
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (8 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 09/19] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 11/19] drm/i915/display: Disable PSR before disabling VRR Ankit Nautiyal
` (11 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Add support for using VRR Timing generator for HDMI panels.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 015110fc57a2..ac8f289960f8 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -64,6 +64,7 @@
#include "intel_panel.h"
#include "intel_pfit.h"
#include "intel_snps_phy.h"
+#include "intel_vrr.h"
static void
assert_hdmi_port_disabled(struct intel_hdmi *intel_hdmi)
@@ -2385,6 +2386,8 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
}
}
+ intel_vrr_compute_config(pipe_config, conn_state);
+
intel_hdmi_compute_gcp_infoframe(encoder, pipe_config,
conn_state);
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 11/19] drm/i915/display: Disable PSR before disabling VRR
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (9 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 10/19] drm/i915/hdmi: Use VRR Timing generator for HDMI Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 12/19] drm/i915/display: Extend WA 14015406119 for PSR2 Ankit Nautiyal
` (10 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
As per bspec 49268: Disable PSR before disabling VRR.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0fec343ddc0d..47d8dbf39b5c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1313,6 +1313,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
enum pipe pipe = crtc->pipe;
+ intel_psr_pre_plane_update(state, crtc);
+
if (intel_crtc_vrr_disabling(state, crtc)) {
intel_vrr_disable(old_crtc_state);
intel_crtc_update_active_timings(old_crtc_state, false);
@@ -1323,8 +1325,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
intel_drrs_deactivate(old_crtc_state);
- intel_psr_pre_plane_update(state, crtc);
-
if (hsw_ips_pre_update(state, crtc))
intel_crtc_wait_for_next_vblank(crtc);
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 12/19] drm/i915/display: Extend WA 14015406119 for PSR2
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (10 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 11/19] drm/i915/display: Disable PSR before disabling VRR Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 13/19] drm/i915/vrr: Handle joiner with vrr Ankit Nautiyal
` (9 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Wa_14015406119 is required for PSR1/2 while working with fixed refresh
rate with VRR timing generator.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 47d8dbf39b5c..66c5ad46bfea 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2617,8 +2617,9 @@ static bool intel_crtc_needs_wa_14015401596(const struct intel_crtc_state *crtc_
{
struct intel_display *display = to_intel_display(crtc_state);
- return intel_vrr_possible(crtc_state) && crtc_state->has_psr &&
- IS_DISPLAY_VER(display, 13, 14);
+ return intel_vrr_possible(crtc_state) &&
+ (crtc_state->has_psr || crtc_state->has_sel_update) &&
+ IS_DISPLAY_VER(display, 13, 14);
}
static int intel_crtc_vblank_delay(const struct intel_crtc_state *crtc_state)
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 13/19] drm/i915/vrr: Handle joiner with vrr
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (11 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 12/19] drm/i915/display: Extend WA 14015406119 for PSR2 Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-17 18:17 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 14/19] drm/i915/vrr: Refactor condition for computing vmax and LRR Ankit Nautiyal
` (8 subsequent siblings)
21 siblings, 1 reply; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Do not program transcoder registers for VRR for the secondary pipe of
the joiner. Remove check to skip VRR for joiner case.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index a4ed102a2119..61b4ec3756e8 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -332,13 +332,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
int vmin, vmax;
- /*
- * FIXME all joined pipes share the same transcoder.
- * Need to account for that during VRR toggle/push/etc.
- */
- if (crtc_state->joiner_pipes)
- return;
-
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
return;
@@ -430,6 +423,9 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
struct intel_display *display = to_intel_display(crtc_state);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ if (intel_crtc_is_joiner_secondary(crtc_state))
+ return;
+
/*
* This bit seems to have two meanings depending on the platform:
* TGL: generate VRR "safe window" for DSB vblank waits
@@ -481,6 +477,9 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
if (!crtc_state->vrr.enable)
return;
+ if (intel_crtc_is_joiner_secondary(crtc_state))
+ return;
+
if (dsb)
intel_dsb_nonpost_start(dsb);
@@ -545,6 +544,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
if (!crtc_state->vrr.enable)
return;
+ if (intel_crtc_is_joiner_secondary(crtc_state))
+ return;
+
intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
crtc_state->vrr.vmin - 1);
intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
@@ -587,6 +589,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
if (!old_crtc_state->vrr.enable)
return;
+ if (intel_crtc_is_joiner_secondary(old_crtc_state))
+ return;
+
intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
trans_vrr_ctl(old_crtc_state));
intel_de_wait_for_clear(display,
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 14/19] drm/i915/vrr: Refactor condition for computing vmax and LRR
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (12 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 13/19] drm/i915/vrr: Handle joiner with vrr Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 15/19] drm/i915/vrr: Always set vrr vmax/vmin/flipline in vrr_{enable/disable} Ankit Nautiyal
` (7 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
LRR and Vmax can be computed only if VRR is supported and vrr.in_range
is set. Currently we proceed with vrr timings only for VRR supporting
panels and return otherwise. For using VRR TG with fix timings, need to
continue even for panels that do not support VRR.
To achieve this, refactor the condition for computing vmax and
update_lrr so that we can continue for fixed timings for panels that do
not support VRR.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 61b4ec3756e8..92eb0f215784 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -330,21 +330,21 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct intel_dp *intel_dp = intel_attached_dp(connector);
bool is_edp = intel_dp_is_edp(intel_dp);
struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
- int vmin, vmax;
+ int vmin = 0, vmax = 0;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
return;
crtc_state->vrr.in_range =
intel_vrr_is_in_range(connector, drm_mode_vrefresh(adjusted_mode));
- if (!crtc_state->vrr.in_range)
- return;
- if (HAS_LRR(display))
- crtc_state->update_lrr = true;
+ if (crtc_state->vrr.in_range) {
+ if (HAS_LRR(display))
+ crtc_state->update_lrr = true;
+ vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
+ }
vmin = intel_vrr_compute_vmin(crtc_state);
- vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
if (vmin >= vmax)
return;
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 15/19] drm/i915/vrr: Always set vrr vmax/vmin/flipline in vrr_{enable/disable}
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (13 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 14/19] drm/i915/vrr: Refactor condition for computing vmax and LRR Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence Ankit Nautiyal
` (6 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
For platforms for which vrr timing generator is always set, VRR_CTL
enable bit does not need to toggle, so modify the vrr_{enable/disable}
for this.
At the moment the helper intel_vrr_always_use_vrr_tg() return false for
all cases. This will be set later when all other bits are in place.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 40 ++++++++++++++++--------
1 file changed, 27 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 92eb0f215784..e247055bc486 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -536,6 +536,16 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
}
+static
+bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
+{
+ if (!HAS_VRR(display))
+ return false;
+
+ /* #TODO return true for platforms supporting fixed_rr */
+ return false;
+}
+
void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
@@ -557,13 +567,15 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
TRANS_PUSH_EN);
- if (crtc_state->cmrr.enable) {
- intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
- VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE |
- trans_vrr_ctl(crtc_state));
- } else {
- intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
- VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
+ if (!intel_vrr_always_use_vrr_tg(display)) {
+ if (crtc_state->cmrr.enable) {
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
+ VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE |
+ trans_vrr_ctl(crtc_state));
+ } else {
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
+ VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
+ }
}
}
@@ -592,12 +604,14 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
if (intel_crtc_is_joiner_secondary(old_crtc_state))
return;
- intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
- trans_vrr_ctl(old_crtc_state));
- intel_de_wait_for_clear(display,
- TRANS_VRR_STATUS(display, cpu_transcoder),
- VRR_STATUS_VRR_EN_LIVE, 1000);
- intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
+ if (!intel_vrr_always_use_vrr_tg(display)) {
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
+ trans_vrr_ctl(old_crtc_state));
+ intel_de_wait_for_clear(display,
+ TRANS_VRR_STATUS(display, cpu_transcoder),
+ VRR_STATUS_VRR_EN_LIVE, 1000);
+ intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
+ }
intel_vrr_set_fixed_rr_timings(old_crtc_state);
}
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (14 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 15/19] drm/i915/vrr: Always set vrr vmax/vmin/flipline in vrr_{enable/disable} Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-17 18:34 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 17/19] drm/i915/display: Use fixed rr timings in intel_set_transcoder_timings_lrr() Ankit Nautiyal
` (5 subsequent siblings)
21 siblings, 1 reply; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
During modeset enable sequence, program the fixed timings,
and turn on the VRR Timing Generator (VRR TG) for platforms
that always use VRR TG.
Later if vrr timings are required, vrr_enable() will switch
to the real VRR timings.
With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
the vrr transcoder timings.
v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
Add TRANS_PUSH while enabling VRR for fixed_rr.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
3 files changed, 36 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 66c5ad46bfea..c9d1c091b109 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
@@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
}
intel_set_transcoder_timings(crtc_state);
- if (HAS_VRR(dev_priv))
- intel_vrr_set_transcoder_timings(crtc_state);
-
+ if (HAS_VRR(dev_priv)) {
+ if (intel_vrr_always_use_vrr_tg(display))
+ intel_vrr_enable_fixed_rr_timings(crtc_state);
+ else
+ intel_vrr_set_transcoder_timings(crtc_state);
+ }
if (cpu_transcoder != TRANSCODER_EDP)
intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
crtc_state->pixel_multiplier - 1);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index e247055bc486..4151fcd0f978 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
crtc_state->vrr.vmin - 1);
intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
crtc_state->vrr.vmax - 1);
- intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
- trans_vrr_ctl(crtc_state));
+ if (intel_vrr_always_use_vrr_tg(display))
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
+ VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
+ else
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
+ trans_vrr_ctl(crtc_state));
intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
crtc_state->vrr.flipline - 1);
@@ -536,7 +540,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
}
-static
bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
{
if (!HAS_VRR(display))
@@ -616,6 +619,26 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
intel_vrr_set_fixed_rr_timings(old_crtc_state);
}
+void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+ intel_vrr_set_fixed_rr_timings(crtc_state);
+
+ if (HAS_AS_SDP(display))
+ intel_de_write(display,
+ TRANS_VRR_VSYNC(display, cpu_transcoder),
+ VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
+ VRR_VSYNC_START(crtc_state->vrr.vsync_start));
+
+ intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
+ TRANS_PUSH_EN);
+
+ intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
+ VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
+}
+
static
bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 514822577e8a..9259964978b1 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -12,6 +12,7 @@ struct drm_connector_state;
struct intel_atomic_state;
struct intel_connector;
struct intel_crtc_state;
+struct intel_display;
struct intel_dsb;
bool intel_vrr_is_capable(struct intel_connector *connector);
@@ -35,5 +36,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
+bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
+void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
#endif /* __INTEL_VRR_H__ */
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 17/19] drm/i915/display: Use fixed rr timings in intel_set_transcoder_timings_lrr()
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (15 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 18/19] drm/i915/vrr: Always use VRR timing generator for MTL+ Ankit Nautiyal
` (4 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Update the intel_set_transcoder_timings_lrr() function to use
fixed refresh rate timings for platforms which always use
VRR timing generator.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c9d1c091b109..36e35c577caa 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2922,6 +2922,7 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
@@ -2967,6 +2968,9 @@ static void intel_set_transcoder_timings_lrr(const struct intel_crtc_state *crtc
intel_de_write(dev_priv, TRANS_VTOTAL(dev_priv, cpu_transcoder),
VACTIVE(crtc_vdisplay - 1) |
VTOTAL(crtc_vtotal - 1));
+
+ if (intel_vrr_always_use_vrr_tg(display))
+ intel_vrr_enable_fixed_rr_timings(crtc_state);
}
static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state)
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 18/19] drm/i915/vrr: Always use VRR timing generator for MTL+
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (16 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 17/19] drm/i915/display: Use fixed rr timings in intel_set_transcoder_timings_lrr() Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-17 18:39 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 19/19] drm/i915/display: Add fixed_rr to crtc_state dump Ankit Nautiyal
` (3 subsequent siblings)
21 siblings, 1 reply; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Currently VRR timing generator is used only when VRR is enabled by
userspace for sinks that support VRR. From MTL+ gradually move away from
the older timing generator and use VRR timing generator for both variable
and fixed timings.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 4151fcd0f978..d0b18102ef2c 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -346,7 +346,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
vmin = intel_vrr_compute_vmin(crtc_state);
- if (vmin >= vmax)
+ if (vmin >= vmax && !intel_vrr_always_use_vrr_tg(display))
return;
crtc_state->vrr.vmin = vmin;
@@ -361,7 +361,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
*/
crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
- if (crtc_state->uapi.vrr_enabled)
+ if (crtc_state->uapi.vrr_enabled && vmin < vmax)
intel_vrr_compute_vrr_timings(crtc_state);
else if (is_cmrr_frac_required(crtc_state) && is_edp)
intel_vrr_compute_cmrr_timings(crtc_state);
@@ -545,7 +545,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
if (!HAS_VRR(display))
return false;
- /* #TODO return true for platforms supporting fixed_rr */
+ if (DISPLAY_VER(display) >= 14)
+ return true;
+
return false;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* [PATCH 19/19] drm/i915/display: Add fixed_rr to crtc_state dump
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (17 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 18/19] drm/i915/vrr: Always use VRR timing generator for MTL+ Ankit Nautiyal
@ 2025-02-14 12:11 ` Ankit Nautiyal
2025-02-14 12:44 ` ✗ Fi.CI.SPARSE: warning for Use VRR timing generator for fixed refresh rate modes (rev9) Patchwork
` (2 subsequent siblings)
21 siblings, 0 replies; 42+ messages in thread
From: Ankit Nautiyal @ 2025-02-14 12:11 UTC (permalink / raw)
To: intel-gfx
Cc: intel-xe, jani.nikula, ville.syrjala, mitulkumar.ajitkumar.golani
Add fixed refresh rate mode in crtc_state dump.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 3 ++-
drivers/gpu/drm/i915/display/intel_vrr.c | 1 -
drivers/gpu/drm/i915/display/intel_vrr.h | 1 +
3 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 599ddce96371..f204a5830c29 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -294,8 +294,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
pipe_config->hw.adjusted_mode.crtc_vdisplay,
pipe_config->framestart_delay, pipe_config->msa_timing_delay);
- drm_printf(&p, "vrr: %s, vmin: %d, vmax: %d, flipline: %d, pipeline full: %d, guardband: %d vsync start: %d, vsync end: %d\n",
+ drm_printf(&p, "vrr: %s, fixed_rr: %s, vmin: %d, vmax: %d, flipline: %d, pipeline full: %d, guardband: %d vsync start: %d, vsync end: %d\n",
str_yes_no(pipe_config->vrr.enable),
+ str_yes_no(intel_vrr_is_fixed_rr(pipe_config)),
pipe_config->vrr.vmin, pipe_config->vrr.vmax, pipe_config->vrr.flipline,
pipe_config->vrr.pipeline_full, pipe_config->vrr.guardband,
pipe_config->vrr.vsync_start, pipe_config->vrr.vsync_end);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index d0b18102ef2c..e0821069a9a1 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -641,7 +641,6 @@ void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state
VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
}
-static
bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
{
return crtc_state->vrr.flipline &&
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 9259964978b1..b894c27ba5c7 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -38,5 +38,6 @@ int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
+bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state);
#endif /* __INTEL_VRR_H__ */
--
2.45.2
^ permalink raw reply related [flat|nested] 42+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Use VRR timing generator for fixed refresh rate modes (rev9)
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (18 preceding siblings ...)
2025-02-14 12:11 ` [PATCH 19/19] drm/i915/display: Add fixed_rr to crtc_state dump Ankit Nautiyal
@ 2025-02-14 12:44 ` Patchwork
2025-02-14 13:02 ` ✓ i915.CI.BAT: success " Patchwork
2025-02-14 15:26 ` ✗ i915.CI.Full: failure " Patchwork
21 siblings, 0 replies; 42+ messages in thread
From: Patchwork @ 2025-02-14 12:44 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes (rev9)
URL : https://patchwork.freedesktop.org/series/134383/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:243:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:245:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:137:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:139:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'break'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'continue'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:23: warning: unreplaced symbol '___p1'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:140:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:58:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:60:15: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:73:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:75:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:76:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:77:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:79:20: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:17: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:23: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:80:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:93:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:95:9: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:96:9: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:97:9: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:10: warning: unreplaced symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:14: warning: unreplaced symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:99:21: warning: unreplaced symbol 'mask'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:100:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:112:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:115:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:127:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:130:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:139:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:142:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:151:1: warning: too many warnings
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:154:9: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:26:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:42:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:58:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/instrumented-non-atomic.h:97:1: warning: unreplaced symbol 'return'
/home/kbuild2/linux/maintainer-tools/dim: line 2114: echo: write error: Broken pipe
^ permalink raw reply [flat|nested] 42+ messages in thread
* ✓ i915.CI.BAT: success for Use VRR timing generator for fixed refresh rate modes (rev9)
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (19 preceding siblings ...)
2025-02-14 12:44 ` ✗ Fi.CI.SPARSE: warning for Use VRR timing generator for fixed refresh rate modes (rev9) Patchwork
@ 2025-02-14 13:02 ` Patchwork
2025-02-14 15:26 ` ✗ i915.CI.Full: failure " Patchwork
21 siblings, 0 replies; 42+ messages in thread
From: Patchwork @ 2025-02-14 13:02 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 12961 bytes --]
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes (rev9)
URL : https://patchwork.freedesktop.org/series/134383/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16134 -> Patchwork_134383v9
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/index.html
Participating hosts (40 -> 42)
------------------------------
Additional (4): bat-twl-1 fi-blb-e6850 bat-rplp-1 bat-rpls-4
Missing (2): fi-snb-2520m fi-pnv-d510
Known issues
------------
Here are the changes found in Patchwork_134383v9 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-twl-1: NOTRUN -> [SKIP][1] ([i915#9318])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@debugfs_test@basic-hwmon.html
- bat-rplp-1: NOTRUN -> [SKIP][2] ([i915#9318])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@debugfs_test@basic-hwmon.html
- bat-rpls-4: NOTRUN -> [SKIP][3] ([i915#9318])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@debugfs_test@basic-hwmon.html
* igt@gem_lmem_swapping@parallel-random-engines:
- bat-rpls-4: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@gem_lmem_swapping@parallel-random-engines.html
- bat-twl-1: NOTRUN -> [SKIP][5] ([i915#10213] / [i915#11671]) +3 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@gem_lmem_swapping@parallel-random-engines.html
- bat-rplp-1: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic:
- bat-rpls-4: NOTRUN -> [SKIP][7] ([i915#3282])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@gem_tiled_pread_basic.html
- bat-twl-1: NOTRUN -> [SKIP][8] ([i915#11031])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@gem_tiled_pread_basic.html
- bat-rplp-1: NOTRUN -> [SKIP][9] ([i915#3282])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rpm@module-reload:
- fi-blb-e6850: NOTRUN -> [SKIP][10] +33 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/fi-blb-e6850/igt@i915_pm_rpm@module-reload.html
- bat-dg1-7: [PASS][11] -> [FAIL][12] ([i915#13633])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/bat-dg1-7/igt@i915_pm_rpm@module-reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-dg1-7/igt@i915_pm_rpm@module-reload.html
- bat-rpls-4: NOTRUN -> [FAIL][13] ([i915#13633])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@i915_pm_rpm@module-reload.html
* igt@i915_pm_rps@basic-api:
- bat-twl-1: NOTRUN -> [SKIP][14] ([i915#10209] / [i915#11681])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@i915_pm_rps@basic-api.html
- bat-rplp-1: NOTRUN -> [SKIP][15] ([i915#6621])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live:
- bat-twl-2: [PASS][16] -> [ABORT][17] ([i915#12919] / [i915#13503])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/bat-twl-2/igt@i915_selftest@live.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-2/igt@i915_selftest@live.html
* igt@i915_selftest@live@gt_pm:
- bat-jsl-3: [PASS][18] -> [DMESG-FAIL][19] ([i915#13241]) +1 other test dmesg-fail
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/bat-jsl-3/igt@i915_selftest@live@gt_pm.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-jsl-3/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@gt_timelines:
- bat-twl-2: [PASS][20] -> [ABORT][21] ([i915#12919])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/bat-twl-2/igt@i915_selftest@live@gt_timelines.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-2/igt@i915_selftest@live@gt_timelines.html
* igt@i915_selftest@live@workarounds:
- bat-arls-5: [PASS][22] -> [DMESG-FAIL][23] ([i915#12061]) +1 other test dmesg-fail
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/bat-arls-5/igt@i915_selftest@live@workarounds.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-arls-5/igt@i915_selftest@live@workarounds.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-rpls-4: NOTRUN -> [SKIP][24] ([i915#4103]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-twl-1: NOTRUN -> [SKIP][25] ([i915#11030] / [i915#11731]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-rplp-1: NOTRUN -> [SKIP][26] ([i915#4103] / [i915#4213]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-rpls-4: NOTRUN -> [SKIP][27] ([i915#3555] / [i915#3840] / [i915#9886])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@kms_dsc@dsc-basic.html
- bat-twl-1: NOTRUN -> [SKIP][28] ([i915#9886])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@kms_dsc@dsc-basic.html
- bat-rplp-1: NOTRUN -> [SKIP][29] ([i915#3555] / [i915#3840])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-connector-state:
- bat-rplp-1: NOTRUN -> [SKIP][30] ([i915#4093]) +3 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-rpls-4: NOTRUN -> [SKIP][31]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@kms_force_connector_basic@force-load-detect.html
- bat-twl-1: NOTRUN -> [SKIP][32] ([i915#11032])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_hdmi_inject@inject-audio:
- bat-rplp-1: NOTRUN -> [SKIP][33] ([i915#4369])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_pm_backlight@basic-brightness:
- bat-rpls-4: NOTRUN -> [SKIP][34] ([i915#5354])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-primary-page-flip:
- bat-rpls-4: NOTRUN -> [SKIP][35] ([i915#1072] / [i915#9732]) +3 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@kms_psr@psr-primary-page-flip.html
- bat-rplp-1: NOTRUN -> [SKIP][36] ([i915#1072] / [i915#9732]) +3 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-rpls-4: NOTRUN -> [SKIP][37] ([i915#3555])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@kms_setmode@basic-clone-single-crtc.html
- bat-twl-1: NOTRUN -> [SKIP][38] ([i915#8809])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@kms_setmode@basic-clone-single-crtc.html
- bat-rplp-1: NOTRUN -> [SKIP][39] ([i915#3555])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-twl-1: NOTRUN -> [SKIP][40] ([i915#10212] / [i915#3708])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-read:
- bat-rpls-4: NOTRUN -> [SKIP][41] ([i915#3708]) +2 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rpls-4/igt@prime_vgem@basic-read.html
- bat-twl-1: NOTRUN -> [SKIP][42] ([i915#10214] / [i915#3708])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@prime_vgem@basic-read.html
- bat-rplp-1: NOTRUN -> [SKIP][43] ([i915#3708]) +2 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-rplp-1/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-write:
- bat-twl-1: NOTRUN -> [SKIP][44] ([i915#10216] / [i915#3708])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-twl-1/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@dmabuf@all-tests:
- bat-apl-1: [INCOMPLETE][45] ([i915#12904]) -> [PASS][46] +1 other test pass
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/bat-apl-1/igt@dmabuf@all-tests.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/bat-apl-1/igt@dmabuf@all-tests.html
[i915#10209]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10209
[i915#10212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10212
[i915#10213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10213
[i915#10214]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10214
[i915#10216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10216
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11030]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11030
[i915#11031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11031
[i915#11032]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11032
[i915#11671]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11671
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11731]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11731
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#12919]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12919
[i915#13241]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13241
[i915#13503]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13503
[i915#13633]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13633
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4093]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4093
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4369]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4369
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#8809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8809
[i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9886]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9886
Build changes
-------------
* Linux: CI_DRM_16134 -> Patchwork_134383v9
CI-20190529: 20190529
CI_DRM_16134: 57457d93f156d8b4bdff8d138127d81b8f97d8c9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8229: 8229
Patchwork_134383v9: 57457d93f156d8b4bdff8d138127d81b8f97d8c9 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/index.html
[-- Attachment #2: Type: text/html, Size: 15446 bytes --]
^ permalink raw reply [flat|nested] 42+ messages in thread
* ✗ i915.CI.Full: failure for Use VRR timing generator for fixed refresh rate modes (rev9)
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
` (20 preceding siblings ...)
2025-02-14 13:02 ` ✓ i915.CI.BAT: success " Patchwork
@ 2025-02-14 15:26 ` Patchwork
21 siblings, 0 replies; 42+ messages in thread
From: Patchwork @ 2025-02-14 15:26 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 95611 bytes --]
== Series Details ==
Series: Use VRR timing generator for fixed refresh rate modes (rev9)
URL : https://patchwork.freedesktop.org/series/134383/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16134_full -> Patchwork_134383v9_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_134383v9_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_134383v9_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-dg2-set2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_134383v9_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_vblank@wait-forked-hang@pipe-a-hdmi-a-1:
- shard-snb: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-snb2/igt@kms_vblank@wait-forked-hang@pipe-a-hdmi-a-1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb1/igt@kms_vblank@wait-forked-hang@pipe-a-hdmi-a-1.html
Known issues
------------
Here are the changes found in Patchwork_134383v9_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-dg2: NOTRUN -> [SKIP][3] ([i915#8411])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@api_intel_bb@crc32:
- shard-rkl: NOTRUN -> [SKIP][4] ([i915#6230])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@api_intel_bb@crc32.html
* igt@debugfs_test@basic-hwmon:
- shard-rkl: NOTRUN -> [SKIP][5] ([i915#9318])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@debugfs_test@basic-hwmon.html
* igt@device_reset@cold-reset-bound:
- shard-dg2: NOTRUN -> [SKIP][6] ([i915#11078])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@device_reset@cold-reset-bound.html
* igt@drm_fdinfo@virtual-busy-idle:
- shard-dg2: NOTRUN -> [SKIP][7] ([i915#8414])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@drm_fdinfo@virtual-busy-idle.html
* igt@gem_create@create-ext-cpu-access-big:
- shard-tglu-1: NOTRUN -> [SKIP][8] ([i915#6335])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gem_create@create-ext-cpu-access-big.html
* igt@gem_ctx_persistence@engines-cleanup:
- shard-snb: NOTRUN -> [SKIP][9] ([i915#1099])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb1/igt@gem_ctx_persistence@engines-cleanup.html
* igt@gem_ctx_shared@q-smoketest-all:
- shard-snb: NOTRUN -> [SKIP][10] +6 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb1/igt@gem_ctx_shared@q-smoketest-all.html
* igt@gem_eio@in-flight-internal-1us:
- shard-mtlp: [PASS][11] -> [ABORT][12] ([i915#13193]) +1 other test abort
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-3/igt@gem_eio@in-flight-internal-1us.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-7/igt@gem_eio@in-flight-internal-1us.html
* igt@gem_eio@reset-stress:
- shard-dg1: [PASS][13] -> [FAIL][14] ([i915#12543] / [i915#5784])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-12/igt@gem_eio@reset-stress.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@bonded-dual:
- shard-dg2: NOTRUN -> [SKIP][15] ([i915#4771]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_exec_balancer@bonded-dual.html
* igt@gem_exec_balancer@noheartbeat:
- shard-dg2: NOTRUN -> [SKIP][16] ([i915#8555]) +2 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_exec_balancer@noheartbeat.html
* igt@gem_exec_balancer@parallel-contexts:
- shard-tglu-1: NOTRUN -> [SKIP][17] ([i915#4525])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gem_exec_balancer@parallel-contexts.html
* igt@gem_exec_balancer@parallel-dmabuf-import-out-fence:
- shard-tglu: NOTRUN -> [SKIP][18] ([i915#4525])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@gem_exec_balancer@parallel-dmabuf-import-out-fence.html
* igt@gem_exec_big@single:
- shard-tglu-1: NOTRUN -> [ABORT][19] ([i915#11713])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gem_exec_big@single.html
* igt@gem_exec_fence@submit:
- shard-dg2: NOTRUN -> [SKIP][20] ([i915#4812]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@gem_exec_fence@submit.html
* igt@gem_exec_flush@basic-uc-prw-default:
- shard-dg2: NOTRUN -> [SKIP][21] ([i915#3539])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@gem_exec_flush@basic-uc-prw-default.html
* igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
- shard-dg2: NOTRUN -> [SKIP][22] ([i915#3281]) +11 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
* igt@gem_exec_reloc@basic-cpu-wc:
- shard-rkl: NOTRUN -> [SKIP][23] ([i915#3281])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@gem_exec_reloc@basic-cpu-wc.html
* igt@gem_exec_reloc@basic-write-wc-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][24] ([i915#3281]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_exec_reloc@basic-write-wc-noreloc.html
- shard-dg2-9: NOTRUN -> [SKIP][25] ([i915#3281]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gem_exec_reloc@basic-write-wc-noreloc.html
* igt@gem_exec_schedule@preempt-queue:
- shard-dg2-9: NOTRUN -> [SKIP][26] ([i915#4537] / [i915#4812])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gem_exec_schedule@preempt-queue.html
- shard-mtlp: NOTRUN -> [SKIP][27] ([i915#4537] / [i915#4812])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_exec_schedule@preempt-queue.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain:
- shard-dg2: NOTRUN -> [SKIP][28] ([i915#4537] / [i915#4812])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_exec_schedule@preempt-queue-contexts-chain.html
* igt@gem_exec_schedule@reorder-wide:
- shard-dg1: NOTRUN -> [SKIP][29] ([i915#4812])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@gem_exec_schedule@reorder-wide.html
* igt@gem_fence_thrash@bo-write-verify-x:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#4860]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@gem_fence_thrash@bo-write-verify-x.html
* igt@gem_lmem_evict@dontneed-evict-race:
- shard-tglu-1: NOTRUN -> [SKIP][31] ([i915#4613] / [i915#7582])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gem_lmem_evict@dontneed-evict-race.html
* igt@gem_lmem_swapping@heavy-multi:
- shard-tglu: NOTRUN -> [SKIP][32] ([i915#4613])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@gem_lmem_swapping@heavy-multi.html
* igt@gem_lmem_swapping@heavy-verify-multi-ccs:
- shard-rkl: NOTRUN -> [SKIP][33] ([i915#4613])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-mtlp: NOTRUN -> [SKIP][34] ([i915#4613])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][35] ([i915#4613]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_mmap_gtt@big-bo-tiledy:
- shard-mtlp: NOTRUN -> [SKIP][36] ([i915#4077]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_mmap_gtt@big-bo-tiledy.html
- shard-dg2-9: NOTRUN -> [SKIP][37] ([i915#4077]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gem_mmap_gtt@big-bo-tiledy.html
* igt@gem_mmap_gtt@zero-extend:
- shard-dg2: NOTRUN -> [SKIP][38] ([i915#4077]) +11 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_mmap_gtt@zero-extend.html
* igt@gem_mmap_wc@coherency:
- shard-mtlp: NOTRUN -> [SKIP][39] ([i915#4083]) +1 other test skip
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_mmap_wc@coherency.html
* igt@gem_mmap_wc@copy:
- shard-dg2: NOTRUN -> [SKIP][40] ([i915#4083]) +5 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_mmap_wc@copy.html
* igt@gem_mmap_wc@invalid-flags:
- shard-dg2-9: NOTRUN -> [SKIP][41] ([i915#4083]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gem_mmap_wc@invalid-flags.html
* igt@gem_partial_pwrite_pread@write:
- shard-dg2: NOTRUN -> [SKIP][42] ([i915#3282]) +4 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_partial_pwrite_pread@write.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-mtlp: NOTRUN -> [SKIP][43] ([i915#3282]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
- shard-dg2-9: NOTRUN -> [SKIP][44] ([i915#3282]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
* igt@gem_pxp@hw-rejects-pxp-context:
- shard-tglu-1: NOTRUN -> [SKIP][45] ([i915#13398])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gem_pxp@hw-rejects-pxp-context.html
* igt@gem_pxp@regular-baseline-src-copy-readible:
- shard-dg2: NOTRUN -> [SKIP][46] ([i915#4270]) +3 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@gem_pxp@regular-baseline-src-copy-readible.html
* igt@gem_pxp@verify-pxp-stale-buf-execution:
- shard-rkl: [PASS][47] -> [TIMEOUT][48] ([i915#12917] / [i915#12964])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-rkl-8/igt@gem_pxp@verify-pxp-stale-buf-execution.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-1/igt@gem_pxp@verify-pxp-stale-buf-execution.html
* igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs:
- shard-dg2: NOTRUN -> [SKIP][49] ([i915#5190] / [i915#8428]) +6 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_render_copy@mixed-tiled-to-y-tiled-ccs.html
* igt@gem_render_copy@y-tiled-ccs-to-yf-tiled:
- shard-mtlp: NOTRUN -> [SKIP][50] ([i915#8428]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled.html
- shard-dg2-9: NOTRUN -> [SKIP][51] ([i915#5190] / [i915#8428]) +1 other test skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled.html
* igt@gem_set_tiling_vs_pwrite:
- shard-rkl: NOTRUN -> [SKIP][52] ([i915#3282]) +3 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@gem_set_tiling_vs_pwrite.html
* igt@gem_tiled_pread_basic:
- shard-dg2: NOTRUN -> [SKIP][53] ([i915#4079])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_tiled_pread_basic.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-dg2: NOTRUN -> [SKIP][54] ([i915#3297] / [i915#4880])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@relocations:
- shard-rkl: NOTRUN -> [SKIP][55] ([i915#3281] / [i915#3297])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@gem_userptr_blits@relocations.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-tglu-1: NOTRUN -> [SKIP][56] ([i915#3297])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gem_userptr_blits@unsync-unmap.html
* igt@gen7_exec_parse@basic-allocation:
- shard-mtlp: NOTRUN -> [SKIP][57]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gen7_exec_parse@basic-allocation.html
- shard-dg2-9: NOTRUN -> [SKIP][58]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gen7_exec_parse@basic-allocation.html
* igt@gen9_exec_parse@allowed-single:
- shard-tglu: NOTRUN -> [SKIP][59] ([i915#2527] / [i915#2856])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@batch-zero-length:
- shard-dg2: NOTRUN -> [SKIP][60] ([i915#2856]) +3 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gen9_exec_parse@batch-zero-length.html
* igt@gen9_exec_parse@bb-secure:
- shard-tglu-1: NOTRUN -> [SKIP][61] ([i915#2527] / [i915#2856]) +2 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@gen9_exec_parse@bb-secure.html
* igt@gen9_exec_parse@bb-start-out:
- shard-mtlp: NOTRUN -> [SKIP][62] ([i915#2856])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gen9_exec_parse@bb-start-out.html
- shard-dg2-9: NOTRUN -> [SKIP][63] ([i915#2856])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@gen9_exec_parse@bb-start-out.html
* igt@gen9_exec_parse@shadow-peek:
- shard-rkl: NOTRUN -> [SKIP][64] ([i915#2527])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@gen9_exec_parse@shadow-peek.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2-9: NOTRUN -> [INCOMPLETE][65] ([i915#12455]) +1 other test incomplete
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@i915_pm_freq_mult@media-freq@gt0:
- shard-tglu-1: NOTRUN -> [SKIP][66] ([i915#6590]) +1 other test skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@i915_pm_freq_mult@media-freq@gt0.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0:
- shard-dg1: [PASS][67] -> [FAIL][68] ([i915#12739] / [i915#3591])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@gt0-rcs0.html
* igt@i915_pm_rps@basic-api:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#11681] / [i915#6621])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@i915_pm_rps@basic-api.html
* igt@i915_query@hwconfig_table:
- shard-rkl: NOTRUN -> [SKIP][70] ([i915#6245])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@i915_query@hwconfig_table.html
* igt@i915_query@query-topology-coherent-slice-mask:
- shard-dg2-9: NOTRUN -> [SKIP][71] ([i915#6188])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@i915_query@query-topology-coherent-slice-mask.html
* igt@i915_selftest@live@workarounds:
- shard-mtlp: [PASS][72] -> [DMESG-FAIL][73] ([i915#12061]) +1 other test dmesg-fail
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-2/igt@i915_selftest@live@workarounds.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-6/igt@i915_selftest@live@workarounds.html
* igt@i915_selftest@mock@memory_region:
- shard-dg2: NOTRUN -> [DMESG-WARN][74] ([i915#9311]) +1 other test dmesg-warn
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@i915_selftest@mock@memory_region.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-tglu: NOTRUN -> [INCOMPLETE][75] ([i915#7443])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-tglu-1: NOTRUN -> [SKIP][76] ([i915#12454] / [i915#12712])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-3-y-rc-ccs-cc:
- shard-dg1: NOTRUN -> [SKIP][77] ([i915#8709]) +3 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-12/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-3-y-rc-ccs-cc.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc:
- shard-rkl: NOTRUN -> [SKIP][78] ([i915#8709]) +3 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-2-y-rc-ccs-cc.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-3-4-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][79] ([i915#8709]) +7 other tests skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-6/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-3-4-mc-ccs.html
* igt@kms_async_flips@invalid-async-flip:
- shard-dg2: NOTRUN -> [SKIP][80] ([i915#12967] / [i915#6228])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_atomic@plane-overlay-legacy:
- shard-dg1: [PASS][81] -> [DMESG-WARN][82] ([i915#4423]) +10 other tests dmesg-warn
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-12/igt@kms_atomic@plane-overlay-legacy.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_atomic@plane-overlay-legacy.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-dg2: NOTRUN -> [SKIP][83] ([i915#1769] / [i915#3555])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1:
- shard-mtlp: [PASS][84] -> [FAIL][85] ([i915#11808] / [i915#5956]) +1 other test fail
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-8/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#5286]) +1 other test skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-tglu-1: NOTRUN -> [SKIP][87] ([i915#5286]) +2 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglu: NOTRUN -> [SKIP][88] ([i915#5286]) +3 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][89] ([i915#3638])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- shard-dg2-9: NOTRUN -> [SKIP][90] ([i915#4538] / [i915#5190]) +2 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg2: NOTRUN -> [SKIP][91] ([i915#4538] / [i915#5190]) +11 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-tglu-1: NOTRUN -> [SKIP][92] ([i915#12313])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][93] ([i915#6095]) +147 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-17/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-4.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][94] ([i915#6095]) +14 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][95] ([i915#6095]) +44 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-c-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][96] ([i915#6095]) +14 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-c-edp-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-rkl: NOTRUN -> [SKIP][97] ([i915#12313])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][98] ([i915#10307] / [i915#10434] / [i915#6095])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2: NOTRUN -> [SKIP][99] ([i915#12805])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][100] ([i915#6095]) +13 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][101] ([i915#10307] / [i915#6095]) +125 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs:
- shard-dg2-9: NOTRUN -> [SKIP][102] ([i915#10307] / [i915#6095]) +14 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][103] ([i915#6095]) +57 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][104] ([i915#11616] / [i915#7213]) +3 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-8/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@plane-scaling@pipe-d-dp-4:
- shard-dg2: NOTRUN -> [SKIP][105] ([i915#4087]) +4 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_cdclk@plane-scaling@pipe-d-dp-4.html
* igt@kms_chamelium_audio@dp-audio:
- shard-tglu: NOTRUN -> [SKIP][106] ([i915#11151] / [i915#7828]) +4 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_chamelium_audio@dp-audio.html
- shard-dg1: NOTRUN -> [SKIP][107] ([i915#11151] / [i915#4423] / [i915#7828])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_chamelium_audio@hdmi-audio-edid:
- shard-tglu-1: NOTRUN -> [SKIP][108] ([i915#11151] / [i915#7828]) +2 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_chamelium_audio@hdmi-audio-edid.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-dg2: NOTRUN -> [SKIP][109] +5 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_frames@dp-crc-multiple:
- shard-dg2: NOTRUN -> [SKIP][110] ([i915#11151] / [i915#7828]) +5 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_chamelium_frames@dp-crc-multiple.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-dg2-9: NOTRUN -> [SKIP][111] ([i915#11151] / [i915#7828]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-rkl: NOTRUN -> [SKIP][112] ([i915#11151] / [i915#7828]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-3:
- shard-dg2: NOTRUN -> [FAIL][113] ([i915#7173]) +1 other test fail
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_content_protection@atomic-dpms@pipe-a-dp-3.html
* igt@kms_content_protection@content-type-change:
- shard-dg2-9: NOTRUN -> [SKIP][114] ([i915#9424])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@lic-type-1:
- shard-tglu-1: NOTRUN -> [SKIP][115] ([i915#6944] / [i915#9424])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_content_protection@lic-type-1.html
* igt@kms_content_protection@uevent:
- shard-dg2: NOTRUN -> [FAIL][116] ([i915#1339] / [i915#7173]) +1 other test fail
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-tglu-1: NOTRUN -> [SKIP][117] ([i915#13049])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- shard-tglu-1: NOTRUN -> [SKIP][118] ([i915#3555]) +4 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_cursor_crc@cursor-offscreen-max-size.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-rkl: NOTRUN -> [SKIP][119] ([i915#3555])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-tglu: NOTRUN -> [SKIP][120] ([i915#13049])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-32x32:
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#3555]) +5 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-dg2-9: NOTRUN -> [SKIP][122] ([i915#3555]) +2 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-tglu: NOTRUN -> [SKIP][123] ([i915#3555]) +2 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-dg2: NOTRUN -> [SKIP][124] ([i915#13049]) +1 other test skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#13046] / [i915#5354]) +2 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-dg2: NOTRUN -> [SKIP][126] ([i915#4103] / [i915#4213])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-dg1: NOTRUN -> [SKIP][127] ([i915#4423]) +2 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-rkl: NOTRUN -> [SKIP][128] +4 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-mtlp: NOTRUN -> [SKIP][129] ([i915#4213])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-tglu: NOTRUN -> [SKIP][130] ([i915#8588])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][131] ([i915#3804])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-dg2-9: NOTRUN -> [SKIP][132] ([i915#3840])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
- shard-mtlp: NOTRUN -> [SKIP][133] ([i915#3840])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_dsc@dsc-with-bpc:
- shard-tglu: NOTRUN -> [SKIP][134] ([i915#3555] / [i915#3840]) +1 other test skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_dsc@dsc-with-bpc.html
- shard-dg1: NOTRUN -> [SKIP][135] ([i915#3555] / [i915#3840] / [i915#4423])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#3555] / [i915#3840])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_dsc@dsc-with-bpc-formats.html
- shard-tglu-1: NOTRUN -> [SKIP][137] ([i915#3555] / [i915#3840])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-rkl: NOTRUN -> [SKIP][138] ([i915#3840] / [i915#9053])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_feature_discovery@display-3x:
- shard-dg2: NOTRUN -> [SKIP][139] ([i915#1839])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@display-4x:
- shard-tglu-1: NOTRUN -> [SKIP][140] ([i915#1839]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_feature_discovery@display-4x.html
* igt@kms_feature_discovery@psr2:
- shard-dg2-9: NOTRUN -> [SKIP][141] ([i915#658])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
- shard-tglu-1: NOTRUN -> [SKIP][142] ([i915#3637]) +2 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
* igt@kms_flip@2x-flip-vs-modeset-vs-hang:
- shard-rkl: NOTRUN -> [SKIP][143] ([i915#9934])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-glk: NOTRUN -> [INCOMPLETE][144] ([i915#12314] / [i915#12745] / [i915#1982] / [i915#4839])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-glk8/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: NOTRUN -> [INCOMPLETE][145] ([i915#1982] / [i915#4839])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-glk8/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-dg1: NOTRUN -> [SKIP][146] ([i915#4423] / [i915#9934]) +1 other test skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_flip@2x-plain-flip-interruptible.html
- shard-tglu: NOTRUN -> [SKIP][147] ([i915#3637]) +3 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-snb: [PASS][148] -> [FAIL][149] ([i915#10826]) +1 other test fail
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-snb2/igt@kms_flip@2x-plain-flip-ts-check.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb1/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip@2x-plain-flip-ts-check@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][150] -> [FAIL][151] ([i915#13690]) +1 other test fail
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-glk8/igt@kms_flip@2x-plain-flip-ts-check@ab-hdmi-a1-hdmi-a2.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-glk2/igt@kms_flip@2x-plain-flip-ts-check@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
- shard-dg2: NOTRUN -> [SKIP][152] ([i915#9934]) +4 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
* igt@kms_flip@flip-vs-fences:
- shard-dg2: NOTRUN -> [SKIP][153] ([i915#8381]) +1 other test skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_flip@flip-vs-fences.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][154] ([i915#2672]) +4 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][155] ([i915#2587] / [i915#2672] / [i915#3555])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-dg2: NOTRUN -> [SKIP][156] ([i915#2672] / [i915#3555] / [i915#5190]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-rkl: NOTRUN -> [SKIP][157] ([i915#2672] / [i915#3555])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][158] ([i915#2672])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
- shard-tglu-1: NOTRUN -> [SKIP][159] ([i915#2672] / [i915#3555]) +1 other test skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-tglu-1: NOTRUN -> [SKIP][160] ([i915#2587] / [i915#2672]) +2 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
- shard-tglu: NOTRUN -> [SKIP][161] ([i915#2672] / [i915#3555])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][162] ([i915#2587] / [i915#2672])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-mtlp: NOTRUN -> [SKIP][163] ([i915#2672] / [i915#3555] / [i915#8813])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][164] ([i915#2672] / [i915#8813])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2: NOTRUN -> [SKIP][165] ([i915#2672] / [i915#3555]) +4 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-snb: [PASS][166] -> [SKIP][167] +4 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-snb4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite:
- shard-tglu: NOTRUN -> [SKIP][168] +27 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-tiling-4:
- shard-dg2: [PASS][169] -> [FAIL][170] ([i915#6880])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-6/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
- shard-rkl: NOTRUN -> [SKIP][171] ([i915#5439])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][172] ([i915#3458]) +14 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt:
- shard-rkl: NOTRUN -> [SKIP][173] ([i915#3023]) +3 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][174] ([i915#1825]) +8 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-mtlp: NOTRUN -> [SKIP][175] ([i915#1825]) +2 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][176] ([i915#8708]) +17 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg1: NOTRUN -> [SKIP][177] ([i915#3458] / [i915#4423])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-pwrite:
- shard-dg2-9: NOTRUN -> [SKIP][178] ([i915#3458]) +4 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-dg2-9: NOTRUN -> [SKIP][179] ([i915#8708]) +6 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][180] ([i915#5354]) +28 other tests skip
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt:
- shard-dg2-9: NOTRUN -> [SKIP][181] ([i915#5354]) +2 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][182] ([i915#8708]) +1 other test skip
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu:
- shard-tglu-1: NOTRUN -> [SKIP][183] +53 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html
* igt@kms_hdr@static-swap:
- shard-tglu: NOTRUN -> [SKIP][184] ([i915#3555] / [i915#8228])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_hdr@static-swap.html
* igt@kms_hdr@static-toggle:
- shard-dg2: [PASS][185] -> [SKIP][186] ([i915#3555] / [i915#8228])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@kms_hdr@static-toggle.html
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-4/igt@kms_hdr@static-toggle.html
- shard-tglu-1: NOTRUN -> [SKIP][187] ([i915#3555] / [i915#8228]) +2 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_hdr@static-toggle.html
* igt@kms_hdr@static-toggle-suspend:
- shard-dg2: NOTRUN -> [SKIP][188] ([i915#3555] / [i915#8228])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-mtlp: NOTRUN -> [SKIP][189] ([i915#10656])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_joiner@basic-force-ultra-joiner.html
- shard-dg2-9: NOTRUN -> [SKIP][190] ([i915#10656])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-dg2: NOTRUN -> [SKIP][191] ([i915#12339])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-rkl: NOTRUN -> [SKIP][192] ([i915#6301])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane@pixel-format-source-clamping:
- shard-dg1: NOTRUN -> [INCOMPLETE][193] ([i915#13026] / [i915#4423])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_plane@pixel-format-source-clamping.html
* igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-3:
- shard-dg1: NOTRUN -> [INCOMPLETE][194] ([i915#13026])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-3.html
* igt@kms_plane_lowres@tiling-y:
- shard-dg2: NOTRUN -> [SKIP][195] ([i915#8821])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_lowres@tiling-yf:
- shard-dg2: NOTRUN -> [SKIP][196] ([i915#3555] / [i915#8821])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-dg2: NOTRUN -> [SKIP][197] ([i915#13046] / [i915#5354] / [i915#9423])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers:
- shard-dg2-9: NOTRUN -> [SKIP][198] ([i915#12247] / [i915#9423])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b:
- shard-dg2-9: NOTRUN -> [SKIP][199] ([i915#12247]) +3 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b:
- shard-tglu-1: NOTRUN -> [SKIP][200] ([i915#12247]) +3 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][201] ([i915#12247] / [i915#6953])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_plane_scaling@planes-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b:
- shard-rkl: NOTRUN -> [SKIP][202] ([i915#12247]) +1 other test skip
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-b.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
- shard-dg2: NOTRUN -> [SKIP][203] ([i915#12247] / [i915#6953] / [i915#9423])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c:
- shard-dg2: NOTRUN -> [SKIP][204] ([i915#12247]) +3 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c.html
* igt@kms_pm_backlight@fade:
- shard-tglu: NOTRUN -> [SKIP][205] ([i915#9812])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_pm_backlight@fade.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#9685])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-tglu: NOTRUN -> [SKIP][207] ([i915#3828])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_lpsp@screens-disabled:
- shard-dg2: NOTRUN -> [SKIP][208] ([i915#8430])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_pm_lpsp@screens-disabled.html
* igt@kms_pm_rpm@i2c:
- shard-dg2: [PASS][209] -> [FAIL][210] ([i915#8717])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@kms_pm_rpm@i2c.html
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-2/igt@kms_pm_rpm@i2c.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-dg2: NOTRUN -> [SKIP][211] ([i915#9519])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-tglu: NOTRUN -> [SKIP][212] ([i915#9519])
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-rkl: [PASS][213] -> [SKIP][214] ([i915#9519])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
- shard-tglu-1: NOTRUN -> [SKIP][215] ([i915#9519])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_prime@d3hot:
- shard-tglu-1: NOTRUN -> [SKIP][216] ([i915#6524])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_prime@d3hot.html
- shard-dg2: NOTRUN -> [SKIP][217] ([i915#6524] / [i915#6805])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_prime@d3hot.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-mtlp: NOTRUN -> [SKIP][218] ([i915#12316])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@pr-cursor-plane-update-sf:
- shard-tglu: NOTRUN -> [SKIP][219] ([i915#11520]) +2 other tests skip
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-rkl: NOTRUN -> [SKIP][220] ([i915#11520]) +1 other test skip
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-dg2-9: NOTRUN -> [SKIP][221] ([i915#11520]) +2 other tests skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
- shard-dg2: NOTRUN -> [SKIP][222] ([i915#11520]) +7 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
- shard-tglu-1: NOTRUN -> [SKIP][223] ([i915#11520]) +4 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
* igt@kms_psr@fbc-pr-cursor-render:
- shard-rkl: NOTRUN -> [SKIP][224] ([i915#1072] / [i915#9732]) +4 other tests skip
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_psr@fbc-pr-cursor-render.html
* igt@kms_psr@fbc-psr-cursor-mmap-gtt:
- shard-tglu: NOTRUN -> [SKIP][225] ([i915#9732]) +6 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@kms_psr@fbc-psr-cursor-mmap-gtt.html
* igt@kms_psr@fbc-psr-primary-mmap-gtt:
- shard-dg2-9: NOTRUN -> [SKIP][226] ([i915#1072] / [i915#9732]) +3 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@kms_psr@fbc-psr-primary-mmap-gtt.html
* igt@kms_psr@fbc-psr2-dpms:
- shard-mtlp: NOTRUN -> [SKIP][227] ([i915#9688]) +1 other test skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@kms_psr@fbc-psr2-dpms.html
* igt@kms_psr@fbc-psr2-sprite-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][228] ([i915#1072] / [i915#9732]) +20 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_psr@fbc-psr2-sprite-mmap-cpu.html
* igt@kms_psr@psr-cursor-plane-onoff:
- shard-tglu-1: NOTRUN -> [SKIP][229] ([i915#9732]) +14 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_psr@psr-cursor-plane-onoff.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2: NOTRUN -> [SKIP][230] ([i915#12755]) +2 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-dg2: NOTRUN -> [SKIP][231] ([i915#12755] / [i915#5190]) +1 other test skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
- shard-tglu-1: NOTRUN -> [SKIP][232] ([i915#5289])
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_setmode@basic:
- shard-tglu: [PASS][233] -> [FAIL][234] ([i915#5465]) +2 other tests fail
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-tglu-10/igt@kms_setmode@basic.html
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-5/igt@kms_setmode@basic.html
* igt@kms_vblank@wait-forked:
- shard-dg1: NOTRUN -> [DMESG-WARN][235] ([i915#4423]) +4 other tests dmesg-warn
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_vblank@wait-forked.html
* igt@kms_vrr@flip-suspend:
- shard-glk: NOTRUN -> [SKIP][236]
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-glk8/igt@kms_vrr@flip-suspend.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-dg2: NOTRUN -> [SKIP][237] ([i915#9906]) +1 other test skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@kms_vrr@seamless-rr-switch-virtual.html
- shard-tglu-1: NOTRUN -> [SKIP][238] ([i915#9906]) +1 other test skip
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-1/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@kms_writeback@writeback-check-output-xrgb2101010:
- shard-dg2: NOTRUN -> [SKIP][239] ([i915#2437] / [i915#9412])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_writeback@writeback-check-output-xrgb2101010.html
* igt@kms_writeback@writeback-fb-id-xrgb2101010:
- shard-rkl: NOTRUN -> [SKIP][240] ([i915#2437] / [i915#9412])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-dg2: NOTRUN -> [SKIP][241] ([i915#2437])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_writeback@writeback-invalid-parameters.html
* igt@perf@unprivileged-single-ctx-counters:
- shard-rkl: NOTRUN -> [SKIP][242] ([i915#2433])
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-4/igt@perf@unprivileged-single-ctx-counters.html
* igt@perf_pmu@busy-double-start@vcs0:
- shard-mtlp: [PASS][243] -> [FAIL][244] ([i915#4349])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-7/igt@perf_pmu@busy-double-start@vcs0.html
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-7/igt@perf_pmu@busy-double-start@vcs0.html
* igt@perf_pmu@busy-double-start@vecs0:
- shard-dg1: [PASS][245] -> [FAIL][246] ([i915#4349])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-17/igt@perf_pmu@busy-double-start@vecs0.html
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-19/igt@perf_pmu@busy-double-start@vecs0.html
* igt@perf_pmu@busy-idle-check-all@vcs0:
- shard-rkl: [PASS][247] -> [DMESG-WARN][248] ([i915#12964]) +2 other tests dmesg-warn
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-rkl-1/igt@perf_pmu@busy-idle-check-all@vcs0.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-3/igt@perf_pmu@busy-idle-check-all@vcs0.html
* igt@perf_pmu@invalid-init:
- shard-tglu: NOTRUN -> [FAIL][249] ([i915#13663])
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-10/igt@perf_pmu@invalid-init.html
* igt@perf_pmu@rc6-all-gts:
- shard-dg2: NOTRUN -> [SKIP][250] ([i915#8516])
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@perf_pmu@rc6-all-gts.html
* igt@prime_vgem@basic-fence-read:
- shard-dg1: NOTRUN -> [SKIP][251] ([i915#3708])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-read:
- shard-mtlp: NOTRUN -> [SKIP][252] ([i915#3708])
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@prime_vgem@basic-read.html
- shard-dg2-9: NOTRUN -> [SKIP][253] ([i915#3291] / [i915#3708])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@prime_vgem@basic-read.html
* igt@prime_vgem@coherency-gtt:
- shard-dg2: NOTRUN -> [SKIP][254] ([i915#3708] / [i915#4077])
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@prime_vgem@coherency-gtt.html
* igt@prime_vgem@fence-read-hang:
- shard-dg2-9: NOTRUN -> [SKIP][255] ([i915#3708])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-9/igt@prime_vgem@fence-read-hang.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-dg2: NOTRUN -> [SKIP][256] ([i915#9917])
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@sriov_basic@enable-vfs-autoprobe-off.html
#### Possible fixes ####
* igt@gem_ctx_freq@sysfs:
- shard-dg2: [FAIL][257] ([i915#9561]) -> [PASS][258] +1 other test pass
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-7/igt@gem_ctx_freq@sysfs.html
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-7/igt@gem_ctx_freq@sysfs.html
* igt@gem_ctx_persistence@engines-mixed-process:
- shard-mtlp: [ABORT][259] ([i915#13193]) -> [PASS][260] +1 other test pass
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-7/igt@gem_ctx_persistence@engines-mixed-process.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-4/igt@gem_ctx_persistence@engines-mixed-process.html
* igt@gem_exec_fence@syncobj-channel:
- shard-dg2: [DMESG-WARN][261] -> [PASS][262]
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-5/igt@gem_exec_fence@syncobj-channel.html
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@gem_exec_fence@syncobj-channel.html
* igt@gem_mmap_offset@mmap-unmap@smem0:
- shard-snb: [INCOMPLETE][263] -> [PASS][264] +1 other test pass
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-snb2/igt@gem_mmap_offset@mmap-unmap@smem0.html
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb1/igt@gem_mmap_offset@mmap-unmap@smem0.html
* igt@gem_pxp@protected-encrypted-src-copy-not-readible:
- shard-rkl: [TIMEOUT][265] ([i915#12917] / [i915#12964]) -> [PASS][266]
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-rkl-5/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-8/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html
* igt@i915_module_load@load:
- shard-dg2: ([PASS][267], [PASS][268], [FAIL][269], [PASS][270], [PASS][271], [PASS][272], [PASS][273], [PASS][274], [PASS][275], [PASS][276], [PASS][277], [PASS][278], [PASS][279], [PASS][280], [PASS][281], [PASS][282], [PASS][283], [PASS][284], [PASS][285], [PASS][286], [PASS][287], [PASS][288], [PASS][289]) -> ([PASS][290], [PASS][291], [PASS][292], [PASS][293], [PASS][294], [PASS][295], [PASS][296], [PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301], [PASS][302], [PASS][303], [PASS][304], [PASS][305], [PASS][306], [PASS][307], [PASS][308], [PASS][309], [PASS][310], [PASS][311], [PASS][312], [PASS][313])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-10/igt@i915_module_load@load.html
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@i915_module_load@load.html
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@i915_module_load@load.html
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@i915_module_load@load.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@i915_module_load@load.html
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-1/igt@i915_module_load@load.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-1/igt@i915_module_load@load.html
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-2/igt@i915_module_load@load.html
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-2/igt@i915_module_load@load.html
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-2/igt@i915_module_load@load.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-3/igt@i915_module_load@load.html
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-3/igt@i915_module_load@load.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-4/igt@i915_module_load@load.html
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-4/igt@i915_module_load@load.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-5/igt@i915_module_load@load.html
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-5/igt@i915_module_load@load.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-6/igt@i915_module_load@load.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-6/igt@i915_module_load@load.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-7/igt@i915_module_load@load.html
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-7/igt@i915_module_load@load.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-7/igt@i915_module_load@load.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-8/igt@i915_module_load@load.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-8/igt@i915_module_load@load.html
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@i915_module_load@load.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@i915_module_load@load.html
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@i915_module_load@load.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@i915_module_load@load.html
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@i915_module_load@load.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-1/igt@i915_module_load@load.html
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-1/igt@i915_module_load@load.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-2/igt@i915_module_load@load.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-2/igt@i915_module_load@load.html
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-3/igt@i915_module_load@load.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-3/igt@i915_module_load@load.html
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-4/igt@i915_module_load@load.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-4/igt@i915_module_load@load.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@i915_module_load@load.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@i915_module_load@load.html
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-5/igt@i915_module_load@load.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-6/igt@i915_module_load@load.html
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-6/igt@i915_module_load@load.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-7/igt@i915_module_load@load.html
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-7/igt@i915_module_load@load.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-7/igt@i915_module_load@load.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-8/igt@i915_module_load@load.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-8/igt@i915_module_load@load.html
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-8/igt@i915_module_load@load.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg1: [ABORT][314] ([i915#9820]) -> [PASS][315]
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-12/igt@i915_module_load@reload-with-fault-injection.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@i915_module_load@reload-with-fault-injection.html
- shard-tglu: [ABORT][316] ([i915#10887] / [i915#12817] / [i915#13592] / [i915#9820]) -> [PASS][317]
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-tglu-4/igt@i915_module_load@reload-with-fault-injection.html
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-2/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0:
- shard-dg1: [FAIL][318] ([i915#12739] / [i915#3591]) -> [PASS][319]
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@gt0-vecs0.html
* igt@kms_cursor_crc@cursor-onscreen-256x85:
- shard-tglu: [FAIL][320] ([i915#13566]) -> [PASS][321] +5 other tests pass
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-tglu-9/igt@kms_cursor_crc@cursor-onscreen-256x85.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-tglu-4/igt@kms_cursor_crc@cursor-onscreen-256x85.html
- shard-rkl: [FAIL][322] ([i915#13566]) -> [PASS][323]
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-rkl-2/igt@kms_cursor_crc@cursor-onscreen-256x85.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-1/igt@kms_cursor_crc@cursor-onscreen-256x85.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- shard-glk: [FAIL][324] ([i915#2346]) -> [PASS][325]
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-glk8/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-glk2/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-snb: [FAIL][326] ([i915#11989]) -> [PASS][327] +1 other test pass
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-snb7/igt@kms_flip@2x-wf_vblank-ts-check.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb5/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
- shard-dg2: [FAIL][328] ([i915#6880]) -> [PASS][329]
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-snb: [SKIP][330] -> [PASS][331]
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_hdr@static-toggle-dpms:
- shard-dg2: [SKIP][332] ([i915#3555] / [i915#8228]) -> [PASS][333]
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-5/igt@kms_hdr@static-toggle-dpms.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-10/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-dg2: [SKIP][334] ([i915#9519]) -> [PASS][335]
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@kms_pm_rpm@modeset-lpsp.html
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_universal_plane@cursor-fb-leak:
- shard-mtlp: [FAIL][336] ([i915#9196]) -> [PASS][337] +1 other test pass
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak.html
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak.html
* igt@kms_vblank@wait-idle@pipe-c-hdmi-a-1:
- shard-glk: [DMESG-WARN][338] ([i915#118]) -> [PASS][339] +1 other test pass
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-glk8/igt@kms_vblank@wait-idle@pipe-c-hdmi-a-1.html
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-glk9/igt@kms_vblank@wait-idle@pipe-c-hdmi-a-1.html
* igt@perf_pmu@busy-double-start@vcs0:
- shard-dg1: [FAIL][340] ([i915#4349]) -> [PASS][341]
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-17/igt@perf_pmu@busy-double-start@vcs0.html
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-19/igt@perf_pmu@busy-double-start@vcs0.html
* igt@perf_pmu@busy-double-start@vcs1:
- shard-mtlp: [FAIL][342] ([i915#4349]) -> [PASS][343]
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-7/igt@perf_pmu@busy-double-start@vcs1.html
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-7/igt@perf_pmu@busy-double-start@vcs1.html
* igt@perf_pmu@busy-idle-check-all@vecs0:
- shard-rkl: [DMESG-WARN][344] ([i915#12964]) -> [PASS][345] +1 other test pass
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-rkl-1/igt@perf_pmu@busy-idle-check-all@vecs0.html
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-3/igt@perf_pmu@busy-idle-check-all@vecs0.html
#### Warnings ####
* igt@i915_module_load@reload-with-fault-injection:
- shard-mtlp: [ABORT][346] ([i915#10131] / [i915#10887] / [i915#9820]) -> [ABORT][347] ([i915#10131] / [i915#10887] / [i915#13592])
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-mtlp-2/igt@i915_module_load@reload-with-fault-injection.html
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-mtlp-6/igt@i915_module_load@reload-with-fault-injection.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2: [FAIL][348] ([i915#7173]) -> [SKIP][349] ([i915#9424])
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@kms_content_protection@lic-type-0.html
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-6/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@mei-interface:
- shard-snb: [INCOMPLETE][350] ([i915#9878]) -> [SKIP][351]
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-snb7/igt@kms_content_protection@mei-interface.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-snb5/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@type1:
- shard-dg2: [SKIP][352] ([i915#7118] / [i915#9424]) -> [SKIP][353] ([i915#7118] / [i915#7162] / [i915#9424])
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-2/igt@kms_content_protection@type1.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-11/igt@kms_content_protection@type1.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
- shard-dg2: [SKIP][354] ([i915#3458]) -> [SKIP][355] ([i915#10433] / [i915#3458])
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-dg2: [SKIP][356] ([i915#10433] / [i915#3458]) -> [SKIP][357] ([i915#3458]) +2 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg2-1/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
- shard-dg1: [SKIP][358] ([i915#3458]) -> [SKIP][359] ([i915#3458] / [i915#4423]) +2 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-12/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-dg1: [SKIP][360] ([i915#8708]) -> [SKIP][361] ([i915#4423] / [i915#8708])
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-14/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-pwrite:
- shard-dg1: [SKIP][362] -> [SKIP][363] ([i915#4423]) +1 other test skip
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-15/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-pwrite.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-pwrite.html
* igt@kms_hdr@brightness-with-hdr:
- shard-dg1: [SKIP][364] ([i915#12713]) -> [SKIP][365] ([i915#1187] / [i915#12713])
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-14/igt@kms_hdr@brightness-with-hdr.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-13/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: [SKIP][366] ([i915#4281]) -> [SKIP][367] ([i915#3361])
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-rkl-8/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_psr@fbc-psr-basic:
- shard-dg1: [SKIP][368] ([i915#1072] / [i915#9732]) -> [SKIP][369] ([i915#1072] / [i915#4423] / [i915#9732]) +1 other test skip
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16134/shard-dg1-12/igt@kms_psr@fbc-psr-basic.html
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/shard-dg1-15/igt@kms_psr@fbc-psr-basic.html
[i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
[i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
[i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
[i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11616]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11616
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11713
[i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
[i915#11808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11808
[i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
[i915#11989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11989
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
[i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
[i915#12454]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12454
[i915#12455]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12455
[i915#12543]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12543
[i915#12712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12712
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12739]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12739
[i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#12817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12817
[i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
[i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
[i915#12967]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12967
[i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13193
[i915#1339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1339
[i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13592]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13592
[i915#13663]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13663
[i915#13690]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13690
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
[i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
[i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
[i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4087
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
[i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
[i915#5465]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5465
[i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
[i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
[i915#6228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6228
[i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
[i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
[i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7162
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
[i915#7443]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7443
[i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
[i915#8588]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8588
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
[i915#8717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8717
[i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
[i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
[i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
[i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
[i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
[i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
[i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
[i915#9561]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9561
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
[i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
[i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
Build changes
-------------
* Linux: CI_DRM_16134 -> Patchwork_134383v9
CI-20190529: 20190529
CI_DRM_16134: 57457d93f156d8b4bdff8d138127d81b8f97d8c9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8229: 8229
Patchwork_134383v9: 57457d93f156d8b4bdff8d138127d81b8f97d8c9 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134383v9/index.html
[-- Attachment #2: Type: text/html, Size: 119635 bytes --]
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 05/19] drm/i915/vrr: Track vrr.enable only for variable timing
2025-02-14 12:11 ` [PATCH 05/19] drm/i915/vrr: Track vrr.enable only for variable timing Ankit Nautiyal
@ 2025-02-17 18:06 ` Ville Syrjälä
2025-02-19 12:35 ` Nautiyal, Ankit K
0 siblings, 1 reply; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:06 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Fri, Feb 14, 2025 at 05:41:15PM +0530, Ankit Nautiyal wrote:
> Since CMRR is now disabled, use the flag vrr.enable to tracks if vrr timing
> generator is used with variable timings.
>
> Avoid setting vrr.enable for CMRR and adjust readout to not set vrr.enable
> when vmax == vmin == flipline (fixed refresh rate timing).
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 0ee7fb0362ce..efa2aa284285 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -226,7 +226,6 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
> static
> void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state)
> {
> - crtc_state->vrr.enable = true;
> crtc_state->cmrr.enable = true;
> /*
> * TODO: Compute precise target refresh rate to determine
> @@ -528,6 +527,14 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
> }
>
> +static
> +bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
> +{
> + return crtc_state->vrr.flipline &&
> + crtc_state->vrr.flipline == crtc_state->vrr.vmax &&
> + crtc_state->vrr.flipline == crtc_state->vrr.vmin;
crtc_state->vrr.flipling == intel_vrr_vmin_flipline(...)
to make this also do the right thing for icl/tgl.
> +}
> +
> void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> @@ -537,7 +544,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
> trans_vrr_ctl = intel_de_read(display,
> TRANS_VRR_CTL(display, cpu_transcoder));
>
> - crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE;
> if (HAS_CMRR(display))
> crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE);
>
> @@ -577,6 +583,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
> }
> }
>
> + crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE &&
> + !intel_vrr_is_fixed_rr(crtc_state);
> +
> if (crtc_state->vrr.enable)
> crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
> }
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 06/19] drm/i915/vrr: Use crtc_vtotal for vmin
2025-02-14 12:11 ` [PATCH 06/19] drm/i915/vrr: Use crtc_vtotal for vmin Ankit Nautiyal
@ 2025-02-17 18:08 ` Ville Syrjälä
2025-02-19 12:38 ` Nautiyal, Ankit K
0 siblings, 1 reply; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:08 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Fri, Feb 14, 2025 at 05:41:16PM +0530, Ankit Nautiyal wrote:
> To have fixed refresh rate with VRR timing generator the
> guardband/pipeline full can't be programmed on the fly. So we need to
> ensure that the values satisfy both the fixed and variable refresh
> rates.
>
> Since we compute these value based on vmin, lets set the vmin to
> crtc_vtotal for both fixed and variable timings instead of using the
> current refresh rate based approach. This way the guardband remains
> sufficient for both cases.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 34 +++++++++++++++++-------
> 1 file changed, 25 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index efa2aa284285..3bcf2a026ad3 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -246,18 +246,34 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
> crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
> }
>
> +/*
> + * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to
> + * Vtotal value.
> + */
> static
> -int intel_vrr_compute_vmin(struct intel_connector *connector,
> - struct drm_display_mode *adjusted_mode)
> +int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state)
> {
> - int vmin;
> - const struct drm_display_info *info = &connector->base.display_info;
> + struct intel_display *display = to_intel_display(crtc_state);
> + int crtc_vtotal = crtc_state->hw.adjusted_mode.crtc_vtotal;
>
> - vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
> - adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
> - vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
> + if (DISPLAY_VER(display) >= 13)
> + return crtc_vtotal;
> + else
> + return crtc_vtotal -
> + intel_vrr_real_vblank_delay(crtc_state);
> +}
>
> - return vmin;
> +static
> +int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
> +{
> + /*
> + * To make fixed rr and vrr work seamless the guardband/pipeline full
> + * should be set such that it satisfies both the fixed and variable
> + * timings.
> + * For this set the vmin as crtc_vtotal. With this we never need to
> + * change anything to do with the guardband.
> + */
> + return intel_vrr_fixed_rr_vtotal(crtc_state);
We don't have the vblank delay dialed in at this point. So this
needs to be just the normal vtotal wihtout any adjustments.
> }
>
> static
> @@ -305,7 +321,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> if (HAS_LRR(display))
> crtc_state->update_lrr = true;
>
> - vmin = intel_vrr_compute_vmin(connector, adjusted_mode);
> + vmin = intel_vrr_compute_vmin(crtc_state);
> vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
>
> if (vmin >= vmax)
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 07/19] drm/i915/vrr: Prepare for fixed refresh rate timings
2025-02-14 12:11 ` [PATCH 07/19] drm/i915/vrr: Prepare for fixed refresh rate timings Ankit Nautiyal
@ 2025-02-17 18:12 ` Ville Syrjälä
2025-02-19 12:40 ` Nautiyal, Ankit K
0 siblings, 1 reply; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:12 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Fri, Feb 14, 2025 at 05:41:17PM +0530, Ankit Nautiyal wrote:
> Currently we always compute the timings as if vrr is enabled.
> With this approach the state checker becomes complicated when we
> introduce fixed refresh rate mode with vrr timing generator.
>
> To avoid the complications, instead of always computing vrr timings, we
> compute vrr timings based on uapi.vrr_enable knob.
> So when the knob is disabled we always compute vmin=flipline=vmax.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 54 ++++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 3bcf2a026ad3..a4ed102a2119 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -263,6 +263,35 @@ int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state)
> intel_vrr_real_vblank_delay(crtc_state);
> }
>
> +static
> +int intel_vrr_fixed_rr_vmax(const struct intel_crtc_state *crtc_state)
> +{
> + return intel_vrr_fixed_rr_vtotal(crtc_state);
> +}
> +
> +static
> +int intel_vrr_fixed_rr_vmin(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> +
> + return intel_vrr_fixed_rr_vtotal(crtc_state) -
> + intel_vrr_flipline_offset(display);
> +}
> +
> +static
> +int intel_vrr_fixed_rr_flipline(const struct intel_crtc_state *crtc_state)
> +{
> + return intel_vrr_fixed_rr_vtotal(crtc_state);
> +}
> +
> +static
> +void intel_vrr_prepare_fixed_timings(struct intel_crtc_state *crtc_state)
> +{
> + crtc_state->vrr.vmax = intel_vrr_fixed_rr_vmax(crtc_state);
> + crtc_state->vrr.vmin = intel_vrr_fixed_rr_vmin(crtc_state);
> + crtc_state->vrr.flipline = intel_vrr_fixed_rr_flipline(crtc_state);
Same comment as to the previous patch: vblank delay is not a thing
at this point, so this needs to just use the actual timings without
any adjustments.
The rest of the patch looks fine.
> +}
> +
> static
> int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
> {
> @@ -343,6 +372,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> intel_vrr_compute_vrr_timings(crtc_state);
> else if (is_cmrr_frac_required(crtc_state) && is_edp)
> intel_vrr_compute_cmrr_timings(crtc_state);
> + else
> + intel_vrr_prepare_fixed_timings(crtc_state);
>
> if (HAS_AS_SDP(display)) {
> crtc_state->vrr.vsync_start =
> @@ -514,6 +545,13 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> if (!crtc_state->vrr.enable)
> return;
>
> + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
> + crtc_state->vrr.vmin - 1);
> + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
> + crtc_state->vrr.vmax - 1);
> + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
> + crtc_state->vrr.flipline - 1);
> +
> intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
> TRANS_PUSH_EN);
>
> @@ -527,6 +565,20 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> }
> }
>
> +static
> +void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
> + intel_vrr_fixed_rr_vmin(crtc_state) - 1);
> + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
> + intel_vrr_fixed_rr_vmax(crtc_state) - 1);
> + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
> + intel_vrr_fixed_rr_flipline(crtc_state) - 1);
> +}
> +
> void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> {
> struct intel_display *display = to_intel_display(old_crtc_state);
> @@ -541,6 +593,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> TRANS_VRR_STATUS(display, cpu_transcoder),
> VRR_STATUS_VRR_EN_LIVE, 1000);
> intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
> +
> + intel_vrr_set_fixed_rr_timings(old_crtc_state);
> }
>
> static
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink
2025-02-14 12:11 ` [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink Ankit Nautiyal
@ 2025-02-17 18:14 ` Ville Syrjälä
2025-02-19 12:53 ` Nautiyal, Ankit K
0 siblings, 1 reply; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:14 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Fri, Feb 14, 2025 at 05:41:18PM +0530, Ankit Nautiyal wrote:
> Currently we do not support VRR with HDMI so skip vrr compute
> config step for DP with HDMI sink.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9ed7d46143e9..bdf53d255d91 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3199,7 +3199,13 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> if (pipe_config->splitter.enable)
> pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count;
>
> - intel_vrr_compute_config(pipe_config, conn_state);
> + /*
> + * VRR via PCON is currently unsupported.
> + * TODO: Add support for VRR for DP HDMI2.1 PCON.
> + */
> + if (!intel_dp_has_hdmi_sink(intel_dp))
> + intel_vrr_compute_config(pipe_config, conn_state);
I thought the AS SDP was pretty much for this, but I guess
we're missing somehting else still?
> +
> intel_dp_compute_as_sdp(intel_dp, pipe_config);
> intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state);
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 13/19] drm/i915/vrr: Handle joiner with vrr
2025-02-14 12:11 ` [PATCH 13/19] drm/i915/vrr: Handle joiner with vrr Ankit Nautiyal
@ 2025-02-17 18:17 ` Ville Syrjälä
2025-02-19 12:56 ` Nautiyal, Ankit K
0 siblings, 1 reply; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:17 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Fri, Feb 14, 2025 at 05:41:23PM +0530, Ankit Nautiyal wrote:
> Do not program transcoder registers for VRR for the secondary pipe of
> the joiner. Remove check to skip VRR for joiner case.
Premature. We need to figure out how to correctly sequence
transcoder level stuff vs. pipe level stuff in the commit.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index a4ed102a2119..61b4ec3756e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -332,13 +332,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> int vmin, vmax;
>
> - /*
> - * FIXME all joined pipes share the same transcoder.
> - * Need to account for that during VRR toggle/push/etc.
> - */
> - if (crtc_state->joiner_pipes)
> - return;
> -
> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
> return;
>
> @@ -430,6 +423,9 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
> struct intel_display *display = to_intel_display(crtc_state);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>
> + if (intel_crtc_is_joiner_secondary(crtc_state))
> + return;
> +
> /*
> * This bit seems to have two meanings depending on the platform:
> * TGL: generate VRR "safe window" for DSB vblank waits
> @@ -481,6 +477,9 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
> if (!crtc_state->vrr.enable)
> return;
>
> + if (intel_crtc_is_joiner_secondary(crtc_state))
> + return;
> +
> if (dsb)
> intel_dsb_nonpost_start(dsb);
>
> @@ -545,6 +544,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> if (!crtc_state->vrr.enable)
> return;
>
> + if (intel_crtc_is_joiner_secondary(crtc_state))
> + return;
> +
> intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
> crtc_state->vrr.vmin - 1);
> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
> @@ -587,6 +589,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> if (!old_crtc_state->vrr.enable)
> return;
>
> + if (intel_crtc_is_joiner_secondary(old_crtc_state))
> + return;
> +
> intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> trans_vrr_ctl(old_crtc_state));
> intel_de_wait_for_clear(display,
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-14 12:11 ` [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence Ankit Nautiyal
@ 2025-02-17 18:34 ` Ville Syrjälä
2025-02-17 18:56 ` Ville Syrjälä
2025-02-19 13:17 ` Nautiyal, Ankit K
0 siblings, 2 replies; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:34 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Fri, Feb 14, 2025 at 05:41:26PM +0530, Ankit Nautiyal wrote:
> During modeset enable sequence, program the fixed timings,
> and turn on the VRR Timing Generator (VRR TG) for platforms
> that always use VRR TG.
>
> Later if vrr timings are required, vrr_enable() will switch
> to the real VRR timings.
>
> With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
> the vrr transcoder timings.
>
> v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
> v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
> Add TRANS_PUSH while enabling VRR for fixed_rr.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
> drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
> drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
> 3 files changed, 36 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 66c5ad46bfea..c9d1c091b109 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
>
> static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
> {
> + struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> @@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
> }
>
> intel_set_transcoder_timings(crtc_state);
> - if (HAS_VRR(dev_priv))
> - intel_vrr_set_transcoder_timings(crtc_state);
> -
> + if (HAS_VRR(dev_priv)) {
> + if (intel_vrr_always_use_vrr_tg(display))
> + intel_vrr_enable_fixed_rr_timings(crtc_state);
> + else
> + intel_vrr_set_transcoder_timings(crtc_state);
I think intel_vrr_set_transcoder_timings() should just program the
fixed timings always. And we shouldn't do anything else here.
And I think the VRR_CTL enable/disable for the always_use_vrr_tg==true
case should be done at some more appropriate spot in the modeset
sequence. We can add eg. intel_vrr_trancoder_{enable,disable}() for
that part.
> + }
> if (cpu_transcoder != TRANSCODER_EDP)
> intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
> crtc_state->pixel_multiplier - 1);
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index e247055bc486..4151fcd0f978 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
> crtc_state->vrr.vmin - 1);
> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
> crtc_state->vrr.vmax - 1);
> - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> - trans_vrr_ctl(crtc_state));
> + if (intel_vrr_always_use_vrr_tg(display))
> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> + else
> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> + trans_vrr_ctl(crtc_state));
We should probably remove this VRR_CTL frobbing from here entirely,
and just always do it from the intel_vrr_trancoder_{enable,disable}().
And obviously for the !always_use_vrr_tg case we just skip setting
the enable bit there.
> intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
> crtc_state->vrr.flipline - 1);
>
> @@ -536,7 +540,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
> return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
> }
>
> -static
> bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
> {
> if (!HAS_VRR(display))
> @@ -616,6 +619,26 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> intel_vrr_set_fixed_rr_timings(old_crtc_state);
> }
>
> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_display *display = to_intel_display(crtc_state);
> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> + intel_vrr_set_fixed_rr_timings(crtc_state);
> +
> + if (HAS_AS_SDP(display))
> + intel_de_write(display,
> + TRANS_VRR_VSYNC(display, cpu_transcoder),
> + VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
> + VRR_VSYNC_START(crtc_state->vrr.vsync_start));
> +
> + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
> + TRANS_PUSH_EN);
> +
> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> +}
> +
> static
> bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> index 514822577e8a..9259964978b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> @@ -12,6 +12,7 @@ struct drm_connector_state;
> struct intel_atomic_state;
> struct intel_connector;
> struct intel_crtc_state;
> +struct intel_display;
> struct intel_dsb;
>
> bool intel_vrr_is_capable(struct intel_connector *connector);
> @@ -35,5 +36,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
> int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
> int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
> int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
> +bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
>
> #endif /* __INTEL_VRR_H__ */
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 18/19] drm/i915/vrr: Always use VRR timing generator for MTL+
2025-02-14 12:11 ` [PATCH 18/19] drm/i915/vrr: Always use VRR timing generator for MTL+ Ankit Nautiyal
@ 2025-02-17 18:39 ` Ville Syrjälä
0 siblings, 0 replies; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:39 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Fri, Feb 14, 2025 at 05:41:28PM +0530, Ankit Nautiyal wrote:
> Currently VRR timing generator is used only when VRR is enabled by
> userspace for sinks that support VRR. From MTL+ gradually move away from
> the older timing generator and use VRR timing generator for both variable
> and fixed timings.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 4151fcd0f978..d0b18102ef2c 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -346,7 +346,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>
> vmin = intel_vrr_compute_vmin(crtc_state);
>
> - if (vmin >= vmax)
> + if (vmin >= vmax && !intel_vrr_always_use_vrr_tg(display))
I don't think we should add any platform differences here.
Ie. even if we don't end up using the VRR timing generator
for fixed refresh rate we should still program it with those
timings.
> return;
>
> crtc_state->vrr.vmin = vmin;
> @@ -361,7 +361,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
> */
> crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display);
>
> - if (crtc_state->uapi.vrr_enabled)
> + if (crtc_state->uapi.vrr_enabled && vmin < vmax)
> intel_vrr_compute_vrr_timings(crtc_state);
> else if (is_cmrr_frac_required(crtc_state) && is_edp)
> intel_vrr_compute_cmrr_timings(crtc_state);
> @@ -545,7 +545,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
> if (!HAS_VRR(display))
> return false;
>
> - /* #TODO return true for platforms supporting fixed_rr */
> + if (DISPLAY_VER(display) >= 14)
> + return true;
> +
> return false;
> }
>
> --
> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-17 18:34 ` Ville Syrjälä
@ 2025-02-17 18:56 ` Ville Syrjälä
2025-02-19 13:57 ` Nautiyal, Ankit K
2025-02-19 13:17 ` Nautiyal, Ankit K
1 sibling, 1 reply; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-17 18:56 UTC (permalink / raw)
To: Ankit Nautiyal
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Mon, Feb 17, 2025 at 08:34:39PM +0200, Ville Syrjälä wrote:
> On Fri, Feb 14, 2025 at 05:41:26PM +0530, Ankit Nautiyal wrote:
> > During modeset enable sequence, program the fixed timings,
> > and turn on the VRR Timing Generator (VRR TG) for platforms
> > that always use VRR TG.
> >
> > Later if vrr timings are required, vrr_enable() will switch
> > to the real VRR timings.
> >
> > With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
> > the vrr transcoder timings.
> >
> > v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
> > v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
> > Add TRANS_PUSH while enabling VRR for fixed_rr.
> >
> > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
> > drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
> > drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
> > 3 files changed, 36 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 66c5ad46bfea..c9d1c091b109 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
> >
> > static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
> > {
> > + struct intel_display *display = to_intel_display(crtc_state);
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > @@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
> > }
> >
> > intel_set_transcoder_timings(crtc_state);
> > - if (HAS_VRR(dev_priv))
> > - intel_vrr_set_transcoder_timings(crtc_state);
> > -
> > + if (HAS_VRR(dev_priv)) {
> > + if (intel_vrr_always_use_vrr_tg(display))
> > + intel_vrr_enable_fixed_rr_timings(crtc_state);
> > + else
> > + intel_vrr_set_transcoder_timings(crtc_state);
>
> I think intel_vrr_set_transcoder_timings() should just program the
> fixed timings always. And we shouldn't do anything else here.
>
> And I think the VRR_CTL enable/disable for the always_use_vrr_tg==true
> case should be done at some more appropriate spot in the modeset
> sequence. We can add eg. intel_vrr_trancoder_{enable,disable}() for
> that part.
>
> > + }
> > if (cpu_transcoder != TRANSCODER_EDP)
> > intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
> > crtc_state->pixel_multiplier - 1);
> > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> > index e247055bc486..4151fcd0f978 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> > @@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
> > crtc_state->vrr.vmin - 1);
> > intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
> > crtc_state->vrr.vmax - 1);
> > - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> > - trans_vrr_ctl(crtc_state));
> > + if (intel_vrr_always_use_vrr_tg(display))
> > + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> > + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> > + else
> > + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> > + trans_vrr_ctl(crtc_state));
>
> We should probably remove this VRR_CTL frobbing from here entirely,
> and just always do it from the intel_vrr_trancoder_{enable,disable}().
> And obviously for the !always_use_vrr_tg case we just skip setting
> the enable bit there.
Hmm. One thing that might screw us over here is the fastboot vs.
vblank_delay stuff. We might have to allow that to reconfigure
the guardband...
In that case we need to reprogram VRR_CTL from
intel_set_transcoder_timings_lrr(), and be careful what
we do with the enable bit. So it'd perhaps have to be
something like:
vrr_ctl = trans_vrr_ctl();
if (always_use_vrr_tg && !needs_modeset)
vrr_ctl |= VRR_CTL_VRR_ENABLE;
Either way we should move the guardbad and pipeline_full checks
out from the pure !fastset block in intel_pipe_config_compare().
And if we do need the fastboot stuff for them then we need to use
the allow_vblank_delay_fastset() stuff for them as well.
>
> > intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
> > crtc_state->vrr.flipline - 1);
> >
> > @@ -536,7 +540,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
> > return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
> > }
> >
> > -static
> > bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
> > {
> > if (!HAS_VRR(display))
> > @@ -616,6 +619,26 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> > intel_vrr_set_fixed_rr_timings(old_crtc_state);
> > }
> >
> > +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
> > +{
> > + struct intel_display *display = to_intel_display(crtc_state);
> > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > +
> > + intel_vrr_set_fixed_rr_timings(crtc_state);
> > +
> > + if (HAS_AS_SDP(display))
> > + intel_de_write(display,
> > + TRANS_VRR_VSYNC(display, cpu_transcoder),
> > + VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
> > + VRR_VSYNC_START(crtc_state->vrr.vsync_start));
> > +
> > + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
> > + TRANS_PUSH_EN);
> > +
> > + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> > + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> > +}
> > +
> > static
> > bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
> > {
> > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> > index 514822577e8a..9259964978b1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> > @@ -12,6 +12,7 @@ struct drm_connector_state;
> > struct intel_atomic_state;
> > struct intel_connector;
> > struct intel_crtc_state;
> > +struct intel_display;
> > struct intel_dsb;
> >
> > bool intel_vrr_is_capable(struct intel_connector *connector);
> > @@ -35,5 +36,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
> > int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
> > int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
> > int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
> > +bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
> > +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
> >
> > #endif /* __INTEL_VRR_H__ */
> > --
> > 2.45.2
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 05/19] drm/i915/vrr: Track vrr.enable only for variable timing
2025-02-17 18:06 ` Ville Syrjälä
@ 2025-02-19 12:35 ` Nautiyal, Ankit K
0 siblings, 0 replies; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-19 12:35 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/17/2025 11:36 PM, Ville Syrjälä wrote:
> On Fri, Feb 14, 2025 at 05:41:15PM +0530, Ankit Nautiyal wrote:
>> Since CMRR is now disabled, use the flag vrr.enable to tracks if vrr timing
>> generator is used with variable timings.
>>
>> Avoid setting vrr.enable for CMRR and adjust readout to not set vrr.enable
>> when vmax == vmin == flipline (fixed refresh rate timing).
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_vrr.c | 13 +++++++++++--
>> 1 file changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index 0ee7fb0362ce..efa2aa284285 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -226,7 +226,6 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
>> static
>> void intel_vrr_compute_cmrr_timings(struct intel_crtc_state *crtc_state)
>> {
>> - crtc_state->vrr.enable = true;
>> crtc_state->cmrr.enable = true;
>> /*
>> * TODO: Compute precise target refresh rate to determine
>> @@ -528,6 +527,14 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
>> intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
>> }
>>
>> +static
>> +bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
>> +{
>> + return crtc_state->vrr.flipline &&
>> + crtc_state->vrr.flipline == crtc_state->vrr.vmax &&
>> + crtc_state->vrr.flipline == crtc_state->vrr.vmin;
> crtc_state->vrr.flipling == intel_vrr_vmin_flipline(...)
> to make this also do the right thing for icl/tgl.
Sure, will make the suggested changes.
Regards,
Ankit
>
>> +}
>> +
>> void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>> {
>> struct intel_display *display = to_intel_display(crtc_state);
>> @@ -537,7 +544,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>> trans_vrr_ctl = intel_de_read(display,
>> TRANS_VRR_CTL(display, cpu_transcoder));
>>
>> - crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE;
>> if (HAS_CMRR(display))
>> crtc_state->cmrr.enable = (trans_vrr_ctl & VRR_CTL_CMRR_ENABLE);
>>
>> @@ -577,6 +583,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>> }
>> }
>>
>> + crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE &&
>> + !intel_vrr_is_fixed_rr(crtc_state);
>> +
>> if (crtc_state->vrr.enable)
>> crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
>> }
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 06/19] drm/i915/vrr: Use crtc_vtotal for vmin
2025-02-17 18:08 ` Ville Syrjälä
@ 2025-02-19 12:38 ` Nautiyal, Ankit K
0 siblings, 0 replies; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-19 12:38 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/17/2025 11:38 PM, Ville Syrjälä wrote:
> On Fri, Feb 14, 2025 at 05:41:16PM +0530, Ankit Nautiyal wrote:
>> To have fixed refresh rate with VRR timing generator the
>> guardband/pipeline full can't be programmed on the fly. So we need to
>> ensure that the values satisfy both the fixed and variable refresh
>> rates.
>>
>> Since we compute these value based on vmin, lets set the vmin to
>> crtc_vtotal for both fixed and variable timings instead of using the
>> current refresh rate based approach. This way the guardband remains
>> sufficient for both cases.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_vrr.c | 34 +++++++++++++++++-------
>> 1 file changed, 25 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index efa2aa284285..3bcf2a026ad3 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -246,18 +246,34 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
>> crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
>> }
>>
>> +/*
>> + * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to
>> + * Vtotal value.
>> + */
>> static
>> -int intel_vrr_compute_vmin(struct intel_connector *connector,
>> - struct drm_display_mode *adjusted_mode)
>> +int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state)
>> {
>> - int vmin;
>> - const struct drm_display_info *info = &connector->base.display_info;
>> + struct intel_display *display = to_intel_display(crtc_state);
>> + int crtc_vtotal = crtc_state->hw.adjusted_mode.crtc_vtotal;
>>
>> - vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
>> - adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
>> - vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
>> + if (DISPLAY_VER(display) >= 13)
>> + return crtc_vtotal;
>> + else
>> + return crtc_vtotal -
>> + intel_vrr_real_vblank_delay(crtc_state);
>> +}
>>
>> - return vmin;
>> +static
>> +int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
>> +{
>> + /*
>> + * To make fixed rr and vrr work seamless the guardband/pipeline full
>> + * should be set such that it satisfies both the fixed and variable
>> + * timings.
>> + * For this set the vmin as crtc_vtotal. With this we never need to
>> + * change anything to do with the guardband.
>> + */
>> + return intel_vrr_fixed_rr_vtotal(crtc_state);
> We don't have the vblank delay dialed in at this point. So this
> needs to be just the normal vtotal wihtout any adjustments.
Indeed. Will make the changes without the adjustments.
Regards,
Ankit
>
>> }
>>
>> static
>> @@ -305,7 +321,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>> if (HAS_LRR(display))
>> crtc_state->update_lrr = true;
>>
>> - vmin = intel_vrr_compute_vmin(connector, adjusted_mode);
>> + vmin = intel_vrr_compute_vmin(crtc_state);
>> vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
>>
>> if (vmin >= vmax)
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 07/19] drm/i915/vrr: Prepare for fixed refresh rate timings
2025-02-17 18:12 ` Ville Syrjälä
@ 2025-02-19 12:40 ` Nautiyal, Ankit K
0 siblings, 0 replies; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-19 12:40 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/17/2025 11:42 PM, Ville Syrjälä wrote:
> On Fri, Feb 14, 2025 at 05:41:17PM +0530, Ankit Nautiyal wrote:
>> Currently we always compute the timings as if vrr is enabled.
>> With this approach the state checker becomes complicated when we
>> introduce fixed refresh rate mode with vrr timing generator.
>>
>> To avoid the complications, instead of always computing vrr timings, we
>> compute vrr timings based on uapi.vrr_enable knob.
>> So when the knob is disabled we always compute vmin=flipline=vmax.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_vrr.c | 54 ++++++++++++++++++++++++
>> 1 file changed, 54 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index 3bcf2a026ad3..a4ed102a2119 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -263,6 +263,35 @@ int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state)
>> intel_vrr_real_vblank_delay(crtc_state);
>> }
>>
>> +static
>> +int intel_vrr_fixed_rr_vmax(const struct intel_crtc_state *crtc_state)
>> +{
>> + return intel_vrr_fixed_rr_vtotal(crtc_state);
>> +}
>> +
>> +static
>> +int intel_vrr_fixed_rr_vmin(const struct intel_crtc_state *crtc_state)
>> +{
>> + struct intel_display *display = to_intel_display(crtc_state);
>> +
>> + return intel_vrr_fixed_rr_vtotal(crtc_state) -
>> + intel_vrr_flipline_offset(display);
>> +}
>> +
>> +static
>> +int intel_vrr_fixed_rr_flipline(const struct intel_crtc_state *crtc_state)
>> +{
>> + return intel_vrr_fixed_rr_vtotal(crtc_state);
>> +}
>> +
>> +static
>> +void intel_vrr_prepare_fixed_timings(struct intel_crtc_state *crtc_state)
>> +{
>> + crtc_state->vrr.vmax = intel_vrr_fixed_rr_vmax(crtc_state);
>> + crtc_state->vrr.vmin = intel_vrr_fixed_rr_vmin(crtc_state);
>> + crtc_state->vrr.flipline = intel_vrr_fixed_rr_flipline(crtc_state);
> Same comment as to the previous patch: vblank delay is not a thing
> at this point, so this needs to just use the actual timings without
> any adjustments.
Will just make:
crtc_state->vrr.vmax = intel_vrr_vmin_flipline(crtc_state);
crtc_state->vrr.flipline = intel_vrr_vmin_flipline(crtc_state);
Regards,
Ankit
>
> The rest of the patch looks fine.
>
>> +}
>> +
>> static
>> int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
>> {
>> @@ -343,6 +372,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>> intel_vrr_compute_vrr_timings(crtc_state);
>> else if (is_cmrr_frac_required(crtc_state) && is_edp)
>> intel_vrr_compute_cmrr_timings(crtc_state);
>> + else
>> + intel_vrr_prepare_fixed_timings(crtc_state);
>>
>> if (HAS_AS_SDP(display)) {
>> crtc_state->vrr.vsync_start =
>> @@ -514,6 +545,13 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
>> if (!crtc_state->vrr.enable)
>> return;
>>
>> + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
>> + crtc_state->vrr.vmin - 1);
>> + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
>> + crtc_state->vrr.vmax - 1);
>> + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
>> + crtc_state->vrr.flipline - 1);
>> +
>> intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
>> TRANS_PUSH_EN);
>>
>> @@ -527,6 +565,20 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
>> }
>> }
>>
>> +static
>> +void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
>> +{
>> + struct intel_display *display = to_intel_display(crtc_state);
>> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>> +
>> + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
>> + intel_vrr_fixed_rr_vmin(crtc_state) - 1);
>> + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
>> + intel_vrr_fixed_rr_vmax(crtc_state) - 1);
>> + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
>> + intel_vrr_fixed_rr_flipline(crtc_state) - 1);
>> +}
>> +
>> void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
>> {
>> struct intel_display *display = to_intel_display(old_crtc_state);
>> @@ -541,6 +593,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
>> TRANS_VRR_STATUS(display, cpu_transcoder),
>> VRR_STATUS_VRR_EN_LIVE, 1000);
>> intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0);
>> +
>> + intel_vrr_set_fixed_rr_timings(old_crtc_state);
>> }
>>
>> static
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink
2025-02-17 18:14 ` Ville Syrjälä
@ 2025-02-19 12:53 ` Nautiyal, Ankit K
2025-02-19 14:59 ` Ville Syrjälä
0 siblings, 1 reply; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-19 12:53 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/17/2025 11:44 PM, Ville Syrjälä wrote:
> On Fri, Feb 14, 2025 at 05:41:18PM +0530, Ankit Nautiyal wrote:
>> Currently we do not support VRR with HDMI so skip vrr compute
>> config step for DP with HDMI sink.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++++-
>> 1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 9ed7d46143e9..bdf53d255d91 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -3199,7 +3199,13 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>> if (pipe_config->splitter.enable)
>> pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count;
>>
>> - intel_vrr_compute_config(pipe_config, conn_state);
>> + /*
>> + * VRR via PCON is currently unsupported.
>> + * TODO: Add support for VRR for DP HDMI2.1 PCON.
>> + */
>> + if (!intel_dp_has_hdmi_sink(intel_dp))
>> + intel_vrr_compute_config(pipe_config, conn_state);
> I thought the AS SDP was pretty much for this, but I guess
> we're missing somehting else still?
For PCON AS_SDP with the required fields is fine, but still some work
remains like parsing HFVSDB fields for VRR capabilities for HDMI2.1.
However this doesnt seem to be the correct place to handle this, as we
still need to use fixed timings when PCON with HDMI2.1 panel.
I will drop this patch for now.
Regards,
Ankit
>
>> +
>> intel_dp_compute_as_sdp(intel_dp, pipe_config);
>> intel_psr_compute_config(intel_dp, pipe_config, conn_state);
>> intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state);
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 13/19] drm/i915/vrr: Handle joiner with vrr
2025-02-17 18:17 ` Ville Syrjälä
@ 2025-02-19 12:56 ` Nautiyal, Ankit K
0 siblings, 0 replies; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-19 12:56 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/17/2025 11:47 PM, Ville Syrjälä wrote:
> On Fri, Feb 14, 2025 at 05:41:23PM +0530, Ankit Nautiyal wrote:
>> Do not program transcoder registers for VRR for the secondary pipe of
>> the joiner. Remove check to skip VRR for joiner case.
> Premature. We need to figure out how to correctly sequence
> transcoder level stuff vs. pipe level stuff in the commit.
Yeah. I think for now I will drop this patch and get the other bits in
place first.
Regards,
Ankit
>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_vrr.c | 19 ++++++++++++-------
>> 1 file changed, 12 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index a4ed102a2119..61b4ec3756e8 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -332,13 +332,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>> struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>> int vmin, vmax;
>>
>> - /*
>> - * FIXME all joined pipes share the same transcoder.
>> - * Need to account for that during VRR toggle/push/etc.
>> - */
>> - if (crtc_state->joiner_pipes)
>> - return;
>> -
>> if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
>> return;
>>
>> @@ -430,6 +423,9 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
>> struct intel_display *display = to_intel_display(crtc_state);
>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>>
>> + if (intel_crtc_is_joiner_secondary(crtc_state))
>> + return;
>> +
>> /*
>> * This bit seems to have two meanings depending on the platform:
>> * TGL: generate VRR "safe window" for DSB vblank waits
>> @@ -481,6 +477,9 @@ void intel_vrr_send_push(struct intel_dsb *dsb,
>> if (!crtc_state->vrr.enable)
>> return;
>>
>> + if (intel_crtc_is_joiner_secondary(crtc_state))
>> + return;
>> +
>> if (dsb)
>> intel_dsb_nonpost_start(dsb);
>>
>> @@ -545,6 +544,9 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
>> if (!crtc_state->vrr.enable)
>> return;
>>
>> + if (intel_crtc_is_joiner_secondary(crtc_state))
>> + return;
>> +
>> intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
>> crtc_state->vrr.vmin - 1);
>> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
>> @@ -587,6 +589,9 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
>> if (!old_crtc_state->vrr.enable)
>> return;
>>
>> + if (intel_crtc_is_joiner_secondary(old_crtc_state))
>> + return;
>> +
>> intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>> trans_vrr_ctl(old_crtc_state));
>> intel_de_wait_for_clear(display,
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-17 18:34 ` Ville Syrjälä
2025-02-17 18:56 ` Ville Syrjälä
@ 2025-02-19 13:17 ` Nautiyal, Ankit K
2025-02-19 15:05 ` Ville Syrjälä
1 sibling, 1 reply; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-19 13:17 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/18/2025 12:04 AM, Ville Syrjälä wrote:
> On Fri, Feb 14, 2025 at 05:41:26PM +0530, Ankit Nautiyal wrote:
>> During modeset enable sequence, program the fixed timings,
>> and turn on the VRR Timing Generator (VRR TG) for platforms
>> that always use VRR TG.
>>
>> Later if vrr timings are required, vrr_enable() will switch
>> to the real VRR timings.
>>
>> With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
>> the vrr transcoder timings.
>>
>> v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
>> v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
>> Add TRANS_PUSH while enabling VRR for fixed_rr.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
>> drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
>> drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
>> 3 files changed, 36 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 66c5ad46bfea..c9d1c091b109 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
>>
>> static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
>> {
>> + struct intel_display *display = to_intel_display(crtc_state);
>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>> @@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
>> }
>>
>> intel_set_transcoder_timings(crtc_state);
>> - if (HAS_VRR(dev_priv))
>> - intel_vrr_set_transcoder_timings(crtc_state);
>> -
>> + if (HAS_VRR(dev_priv)) {
>> + if (intel_vrr_always_use_vrr_tg(display))
>> + intel_vrr_enable_fixed_rr_timings(crtc_state);
>> + else
>> + intel_vrr_set_transcoder_timings(crtc_state);
> I think intel_vrr_set_transcoder_timings() should just program the
> fixed timings always. And we shouldn't do anything else here.
>
> And I think the VRR_CTL enable/disable for the always_use_vrr_tg==true
> case should be done at some more appropriate spot in the modeset
> sequence. We can add eg. intel_vrr_trancoder_{enable,disable}() for
> that part.
Alright. So will do the following changes:
In intel_vrr_set_transcoder:
-Avoid modifying VRR_CTL, currently, it disables VRR_VTL if flipline is
not set, and also writes guardband and other settings in VRR_CTL.
-Instead of setting variable timings, just set the fixed timings always.
Use separate functions for enabling/disabling VRR CTL:
-As suggested will create intel_vrr_transcoder_enable and
intel_vrr_transcoder_disable functions.
-These functions should handle VRR_CTL settings for platforms where TG
is not always used.
-I am thinking to call these functions based on vrr.flipline:
if (is_enabling(vrr.flipline, old_crtc_state, new_crtc_state))
intel_vrr_transcoder_enable(new_crtc_state)
Thinking to add this in commit_pipe_post_planes() just before
intel_vrr_enable().
if (is_disabling(vrr.flipline, old_crtc_state, new_crtc_state))
intel_vrr_transcoder_disable(new_crtc_state)
Will try adding this in intel_pre_plane_update() after intel_vrr_disable().
Please correct me if I have missed something or got something wrong.
Regards,
Ankit
>> + }
>> if (cpu_transcoder != TRANSCODER_EDP)
>> intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
>> crtc_state->pixel_multiplier - 1);
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index e247055bc486..4151fcd0f978 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
>> crtc_state->vrr.vmin - 1);
>> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
>> crtc_state->vrr.vmax - 1);
>> - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>> - trans_vrr_ctl(crtc_state));
>> + if (intel_vrr_always_use_vrr_tg(display))
>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
>> + else
>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>> + trans_vrr_ctl(crtc_state));
> We should probably remove this VRR_CTL frobbing from here entirely,
> and just always do it from the intel_vrr_trancoder_{enable,disable}().
> And obviously for the !always_use_vrr_tg case we just skip setting
> the enable bit there.
>
>> intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
>> crtc_state->vrr.flipline - 1);
>>
>> @@ -536,7 +540,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
>> return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
>> }
>>
>> -static
>> bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
>> {
>> if (!HAS_VRR(display))
>> @@ -616,6 +619,26 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
>> intel_vrr_set_fixed_rr_timings(old_crtc_state);
>> }
>>
>> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
>> +{
>> + struct intel_display *display = to_intel_display(crtc_state);
>> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>> +
>> + intel_vrr_set_fixed_rr_timings(crtc_state);
>> +
>> + if (HAS_AS_SDP(display))
>> + intel_de_write(display,
>> + TRANS_VRR_VSYNC(display, cpu_transcoder),
>> + VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
>> + VRR_VSYNC_START(crtc_state->vrr.vsync_start));
>> +
>> + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
>> + TRANS_PUSH_EN);
>> +
>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
>> +}
>> +
>> static
>> bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
>> {
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
>> index 514822577e8a..9259964978b1 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
>> @@ -12,6 +12,7 @@ struct drm_connector_state;
>> struct intel_atomic_state;
>> struct intel_connector;
>> struct intel_crtc_state;
>> +struct intel_display;
>> struct intel_dsb;
>>
>> bool intel_vrr_is_capable(struct intel_connector *connector);
>> @@ -35,5 +36,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
>> int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
>> int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
>> int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
>> +bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
>> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
>>
>> #endif /* __INTEL_VRR_H__ */
>> --
>> 2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-17 18:56 ` Ville Syrjälä
@ 2025-02-19 13:57 ` Nautiyal, Ankit K
2025-02-19 15:08 ` Ville Syrjälä
0 siblings, 1 reply; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-19 13:57 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/18/2025 12:26 AM, Ville Syrjälä wrote:
> On Mon, Feb 17, 2025 at 08:34:39PM +0200, Ville Syrjälä wrote:
>> On Fri, Feb 14, 2025 at 05:41:26PM +0530, Ankit Nautiyal wrote:
>>> During modeset enable sequence, program the fixed timings,
>>> and turn on the VRR Timing Generator (VRR TG) for platforms
>>> that always use VRR TG.
>>>
>>> Later if vrr timings are required, vrr_enable() will switch
>>> to the real VRR timings.
>>>
>>> With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
>>> the vrr transcoder timings.
>>>
>>> v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
>>> v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
>>> Add TRANS_PUSH while enabling VRR for fixed_rr.
>>>
>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
>>> drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
>>> drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
>>> 3 files changed, 36 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>> index 66c5ad46bfea..c9d1c091b109 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
>>>
>>> static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
>>> {
>>> + struct intel_display *display = to_intel_display(crtc_state);
>>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>>> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>>> @@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
>>> }
>>>
>>> intel_set_transcoder_timings(crtc_state);
>>> - if (HAS_VRR(dev_priv))
>>> - intel_vrr_set_transcoder_timings(crtc_state);
>>> -
>>> + if (HAS_VRR(dev_priv)) {
>>> + if (intel_vrr_always_use_vrr_tg(display))
>>> + intel_vrr_enable_fixed_rr_timings(crtc_state);
>>> + else
>>> + intel_vrr_set_transcoder_timings(crtc_state);
>> I think intel_vrr_set_transcoder_timings() should just program the
>> fixed timings always. And we shouldn't do anything else here.
>>
>> And I think the VRR_CTL enable/disable for the always_use_vrr_tg==true
>> case should be done at some more appropriate spot in the modeset
>> sequence. We can add eg. intel_vrr_trancoder_{enable,disable}() for
>> that part.
>>
>>> + }
>>> if (cpu_transcoder != TRANSCODER_EDP)
>>> intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
>>> crtc_state->pixel_multiplier - 1);
>>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>>> index e247055bc486..4151fcd0f978 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>>> @@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
>>> crtc_state->vrr.vmin - 1);
>>> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
>>> crtc_state->vrr.vmax - 1);
>>> - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>> - trans_vrr_ctl(crtc_state));
>>> + if (intel_vrr_always_use_vrr_tg(display))
>>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
>>> + else
>>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>> + trans_vrr_ctl(crtc_state));
>> We should probably remove this VRR_CTL frobbing from here entirely,
>> and just always do it from the intel_vrr_trancoder_{enable,disable}().
>> And obviously for the !always_use_vrr_tg case we just skip setting
>> the enable bit there.
> Hmm. One thing that might screw us over here is the fastboot vs.
> vblank_delay stuff. We might have to allow that to reconfigure
> the guardband...
>
> In that case we need to reprogram VRR_CTL from
> intel_set_transcoder_timings_lrr(), and be careful what
> we do with the enable bit. So it'd perhaps have to be
> something like:
> vrr_ctl = trans_vrr_ctl();
> if (always_use_vrr_tg && !needs_modeset)
> vrr_ctl |= VRR_CTL_VRR_ENABLE;
I understand while using fastset for platforms that use vrr TG, we dont
want to reset the VRR_ENABLE while setting the guardband.
We want to use the function intel_vrr_transcoder_enable to handle bits
for VRR_CTL.
Do you mean to pass need_modeset flag to intel_vrr_transcoder_enable()?
Regards,
Ankit
>
> Either way we should move the guardbad and pipeline_full checks
> out from the pure !fastset block in intel_pipe_config_compare().
> And if we do need the fastboot stuff for them then we need to use
> the allow_vblank_delay_fastset() stuff for them as well.
>
>>> intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
>>> crtc_state->vrr.flipline - 1);
>>>
>>> @@ -536,7 +540,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
>>> return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
>>> }
>>>
>>> -static
>>> bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
>>> {
>>> if (!HAS_VRR(display))
>>> @@ -616,6 +619,26 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
>>> intel_vrr_set_fixed_rr_timings(old_crtc_state);
>>> }
>>>
>>> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
>>> +{
>>> + struct intel_display *display = to_intel_display(crtc_state);
>>> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>>> +
>>> + intel_vrr_set_fixed_rr_timings(crtc_state);
>>> +
>>> + if (HAS_AS_SDP(display))
>>> + intel_de_write(display,
>>> + TRANS_VRR_VSYNC(display, cpu_transcoder),
>>> + VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
>>> + VRR_VSYNC_START(crtc_state->vrr.vsync_start));
>>> +
>>> + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
>>> + TRANS_PUSH_EN);
>>> +
>>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
>>> +}
>>> +
>>> static
>>> bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
>>> {
>>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
>>> index 514822577e8a..9259964978b1 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
>>> @@ -12,6 +12,7 @@ struct drm_connector_state;
>>> struct intel_atomic_state;
>>> struct intel_connector;
>>> struct intel_crtc_state;
>>> +struct intel_display;
>>> struct intel_dsb;
>>>
>>> bool intel_vrr_is_capable(struct intel_connector *connector);
>>> @@ -35,5 +36,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
>>> int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
>>> int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
>>> int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
>>> +bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
>>> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
>>>
>>> #endif /* __INTEL_VRR_H__ */
>>> --
>>> 2.45.2
>> --
>> Ville Syrjälä
>> Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink
2025-02-19 12:53 ` Nautiyal, Ankit K
@ 2025-02-19 14:59 ` Ville Syrjälä
0 siblings, 0 replies; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-19 14:59 UTC (permalink / raw)
To: Nautiyal, Ankit K
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Wed, Feb 19, 2025 at 06:23:01PM +0530, Nautiyal, Ankit K wrote:
>
> On 2/17/2025 11:44 PM, Ville Syrjälä wrote:
> > On Fri, Feb 14, 2025 at 05:41:18PM +0530, Ankit Nautiyal wrote:
> >> Currently we do not support VRR with HDMI so skip vrr compute
> >> config step for DP with HDMI sink.
> >>
> >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++++-
> >> 1 file changed, 7 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> >> index 9ed7d46143e9..bdf53d255d91 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >> @@ -3199,7 +3199,13 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >> if (pipe_config->splitter.enable)
> >> pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count;
> >>
> >> - intel_vrr_compute_config(pipe_config, conn_state);
> >> + /*
> >> + * VRR via PCON is currently unsupported.
> >> + * TODO: Add support for VRR for DP HDMI2.1 PCON.
> >> + */
> >> + if (!intel_dp_has_hdmi_sink(intel_dp))
> >> + intel_vrr_compute_config(pipe_config, conn_state);
> > I thought the AS SDP was pretty much for this, but I guess
> > we're missing somehting else still?
>
> For PCON AS_SDP with the required fields is fine, but still some work
> remains like parsing HFVSDB fields for VRR capabilities for HDMI2.1.
>
> However this doesnt seem to be the correct place to handle this, as we
> still need to use fixed timings when PCON with HDMI2.1 panel.
Right, so this should rather be checked in
intel_vrr_is_capable().
>
> I will drop this patch for now.
>
>
> Regards,
>
> Ankit
>
>
> >
> >> +
> >> intel_dp_compute_as_sdp(intel_dp, pipe_config);
> >> intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> >> intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state);
> >> --
> >> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-19 13:17 ` Nautiyal, Ankit K
@ 2025-02-19 15:05 ` Ville Syrjälä
2025-02-20 5:31 ` Nautiyal, Ankit K
0 siblings, 1 reply; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-19 15:05 UTC (permalink / raw)
To: Nautiyal, Ankit K
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Wed, Feb 19, 2025 at 06:47:20PM +0530, Nautiyal, Ankit K wrote:
>
> On 2/18/2025 12:04 AM, Ville Syrjälä wrote:
> > On Fri, Feb 14, 2025 at 05:41:26PM +0530, Ankit Nautiyal wrote:
> >> During modeset enable sequence, program the fixed timings,
> >> and turn on the VRR Timing Generator (VRR TG) for platforms
> >> that always use VRR TG.
> >>
> >> Later if vrr timings are required, vrr_enable() will switch
> >> to the real VRR timings.
> >>
> >> With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
> >> the vrr transcoder timings.
> >>
> >> v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
> >> v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
> >> Add TRANS_PUSH while enabling VRR for fixed_rr.
> >>
> >> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
> >> drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
> >> drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
> >> 3 files changed, 36 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> >> index 66c5ad46bfea..c9d1c091b109 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >> @@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
> >>
> >> static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
> >> {
> >> + struct intel_display *display = to_intel_display(crtc_state);
> >> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> >> @@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
> >> }
> >>
> >> intel_set_transcoder_timings(crtc_state);
> >> - if (HAS_VRR(dev_priv))
> >> - intel_vrr_set_transcoder_timings(crtc_state);
> >> -
> >> + if (HAS_VRR(dev_priv)) {
> >> + if (intel_vrr_always_use_vrr_tg(display))
> >> + intel_vrr_enable_fixed_rr_timings(crtc_state);
> >> + else
> >> + intel_vrr_set_transcoder_timings(crtc_state);
> > I think intel_vrr_set_transcoder_timings() should just program the
> > fixed timings always. And we shouldn't do anything else here.
> >
> > And I think the VRR_CTL enable/disable for the always_use_vrr_tg==true
> > case should be done at some more appropriate spot in the modeset
> > sequence. We can add eg. intel_vrr_trancoder_{enable,disable}() for
> > that part.
>
> Alright. So will do the following changes:
> In intel_vrr_set_transcoder:
> -Avoid modifying VRR_CTL, currently, it disables VRR_VTL if flipline is
> not set, and also writes guardband and other settings in VRR_CTL.
>
> -Instead of setting variable timings, just set the fixed timings always.
>
> Use separate functions for enabling/disabling VRR CTL:
> -As suggested will create intel_vrr_transcoder_enable and
> intel_vrr_transcoder_disable functions.
> -These functions should handle VRR_CTL settings for platforms where TG
> is not always used.
> -I am thinking to call these functions based on vrr.flipline:
>
> if (is_enabling(vrr.flipline, old_crtc_state, new_crtc_state))
> intel_vrr_transcoder_enable(new_crtc_state)
>
> Thinking to add this in commit_pipe_post_planes() just before
> intel_vrr_enable().
>
> if (is_disabling(vrr.flipline, old_crtc_state, new_crtc_state))
> intel_vrr_transcoder_disable(new_crtc_state)
We want them called unconditionally from either
intel_{enable,disable}_transcoder() or perhaps from some
ddi encoder hook (not sure how early/late this needs to
be done). And they should just do nothing for the
!always_use_vrr_tg case.
>
> Will try adding this in intel_pre_plane_update() after intel_vrr_disable().
>
> Please correct me if I have missed something or got something wrong.
>
> Regards,
>
> Ankit
>
> >> + }
> >> if (cpu_transcoder != TRANSCODER_EDP)
> >> intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
> >> crtc_state->pixel_multiplier - 1);
> >> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> >> index e247055bc486..4151fcd0f978 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> >> @@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
> >> crtc_state->vrr.vmin - 1);
> >> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
> >> crtc_state->vrr.vmax - 1);
> >> - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> >> - trans_vrr_ctl(crtc_state));
> >> + if (intel_vrr_always_use_vrr_tg(display))
> >> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> >> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> >> + else
> >> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> >> + trans_vrr_ctl(crtc_state));
> > We should probably remove this VRR_CTL frobbing from here entirely,
> > and just always do it from the intel_vrr_trancoder_{enable,disable}().
> > And obviously for the !always_use_vrr_tg case we just skip setting
> > the enable bit there.
> >
> >> intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
> >> crtc_state->vrr.flipline - 1);
> >>
> >> @@ -536,7 +540,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
> >> return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
> >> }
> >>
> >> -static
> >> bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
> >> {
> >> if (!HAS_VRR(display))
> >> @@ -616,6 +619,26 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> >> intel_vrr_set_fixed_rr_timings(old_crtc_state);
> >> }
> >>
> >> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
> >> +{
> >> + struct intel_display *display = to_intel_display(crtc_state);
> >> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> >> +
> >> + intel_vrr_set_fixed_rr_timings(crtc_state);
> >> +
> >> + if (HAS_AS_SDP(display))
> >> + intel_de_write(display,
> >> + TRANS_VRR_VSYNC(display, cpu_transcoder),
> >> + VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
> >> + VRR_VSYNC_START(crtc_state->vrr.vsync_start));
> >> +
> >> + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
> >> + TRANS_PUSH_EN);
> >> +
> >> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> >> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> >> +}
> >> +
> >> static
> >> bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
> >> {
> >> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
> >> index 514822577e8a..9259964978b1 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
> >> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
> >> @@ -12,6 +12,7 @@ struct drm_connector_state;
> >> struct intel_atomic_state;
> >> struct intel_connector;
> >> struct intel_crtc_state;
> >> +struct intel_display;
> >> struct intel_dsb;
> >>
> >> bool intel_vrr_is_capable(struct intel_connector *connector);
> >> @@ -35,5 +36,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
> >> int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
> >> int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
> >> int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
> >> +bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
> >> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
> >>
> >> #endif /* __INTEL_VRR_H__ */
> >> --
> >> 2.45.2
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-19 13:57 ` Nautiyal, Ankit K
@ 2025-02-19 15:08 ` Ville Syrjälä
0 siblings, 0 replies; 42+ messages in thread
From: Ville Syrjälä @ 2025-02-19 15:08 UTC (permalink / raw)
To: Nautiyal, Ankit K
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On Wed, Feb 19, 2025 at 07:27:00PM +0530, Nautiyal, Ankit K wrote:
>
> On 2/18/2025 12:26 AM, Ville Syrjälä wrote:
> > On Mon, Feb 17, 2025 at 08:34:39PM +0200, Ville Syrjälä wrote:
> >> On Fri, Feb 14, 2025 at 05:41:26PM +0530, Ankit Nautiyal wrote:
> >>> During modeset enable sequence, program the fixed timings,
> >>> and turn on the VRR Timing Generator (VRR TG) for platforms
> >>> that always use VRR TG.
> >>>
> >>> Later if vrr timings are required, vrr_enable() will switch
> >>> to the real VRR timings.
> >>>
> >>> With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
> >>> the vrr transcoder timings.
> >>>
> >>> v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
> >>> v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
> >>> Add TRANS_PUSH while enabling VRR for fixed_rr.
> >>>
> >>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> >>> ---
> >>> drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
> >>> drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
> >>> drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
> >>> 3 files changed, 36 insertions(+), 6 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> >>> index 66c5ad46bfea..c9d1c091b109 100644
> >>> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >>> @@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
> >>>
> >>> static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
> >>> {
> >>> + struct intel_display *display = to_intel_display(crtc_state);
> >>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >>> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> >>> @@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
> >>> }
> >>>
> >>> intel_set_transcoder_timings(crtc_state);
> >>> - if (HAS_VRR(dev_priv))
> >>> - intel_vrr_set_transcoder_timings(crtc_state);
> >>> -
> >>> + if (HAS_VRR(dev_priv)) {
> >>> + if (intel_vrr_always_use_vrr_tg(display))
> >>> + intel_vrr_enable_fixed_rr_timings(crtc_state);
> >>> + else
> >>> + intel_vrr_set_transcoder_timings(crtc_state);
> >> I think intel_vrr_set_transcoder_timings() should just program the
> >> fixed timings always. And we shouldn't do anything else here.
> >>
> >> And I think the VRR_CTL enable/disable for the always_use_vrr_tg==true
> >> case should be done at some more appropriate spot in the modeset
> >> sequence. We can add eg. intel_vrr_trancoder_{enable,disable}() for
> >> that part.
> >>
> >>> + }
> >>> if (cpu_transcoder != TRANSCODER_EDP)
> >>> intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
> >>> crtc_state->pixel_multiplier - 1);
> >>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> >>> index e247055bc486..4151fcd0f978 100644
> >>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> >>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> >>> @@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
> >>> crtc_state->vrr.vmin - 1);
> >>> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
> >>> crtc_state->vrr.vmax - 1);
> >>> - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> >>> - trans_vrr_ctl(crtc_state));
> >>> + if (intel_vrr_always_use_vrr_tg(display))
> >>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> >>> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
> >>> + else
> >>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
> >>> + trans_vrr_ctl(crtc_state));
> >> We should probably remove this VRR_CTL frobbing from here entirely,
> >> and just always do it from the intel_vrr_trancoder_{enable,disable}().
> >> And obviously for the !always_use_vrr_tg case we just skip setting
> >> the enable bit there.
> > Hmm. One thing that might screw us over here is the fastboot vs.
> > vblank_delay stuff. We might have to allow that to reconfigure
> > the guardband...
> >
> > In that case we need to reprogram VRR_CTL from
> > intel_set_transcoder_timings_lrr(), and be careful what
> > we do with the enable bit. So it'd perhaps have to be
> > something like:
> > vrr_ctl = trans_vrr_ctl();
> > if (always_use_vrr_tg && !needs_modeset)
> > vrr_ctl |= VRR_CTL_VRR_ENABLE;
>
> I understand while using fastset for platforms that use vrr TG, we dont
> want to reset the VRR_ENABLE while setting the guardband.
>
> We want to use the function intel_vrr_transcoder_enable to handle bits
> for VRR_CTL.
>
> Do you mean to pass need_modeset flag to intel_vrr_transcoder_enable()?
intel_vrr_transcoder_{enable,disable}() should just be
intel_vrr_transcoder_enable()
{
if (!always_use_vrr_tg)
return;
enable vrr tg
}
intel_vrr_transcoder_disable()
{
if (!always_use_vrr_tg)
return;
disable vrr tg
}
and they should only be called from the full modeset
path.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence
2025-02-19 15:05 ` Ville Syrjälä
@ 2025-02-20 5:31 ` Nautiyal, Ankit K
0 siblings, 0 replies; 42+ messages in thread
From: Nautiyal, Ankit K @ 2025-02-20 5:31 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, jani.nikula, mitulkumar.ajitkumar.golani
On 2/19/2025 8:35 PM, Ville Syrjälä wrote:
> On Wed, Feb 19, 2025 at 06:47:20PM +0530, Nautiyal, Ankit K wrote:
>> On 2/18/2025 12:04 AM, Ville Syrjälä wrote:
>>> On Fri, Feb 14, 2025 at 05:41:26PM +0530, Ankit Nautiyal wrote:
>>>> During modeset enable sequence, program the fixed timings,
>>>> and turn on the VRR Timing Generator (VRR TG) for platforms
>>>> that always use VRR TG.
>>>>
>>>> Later if vrr timings are required, vrr_enable() will switch
>>>> to the real VRR timings.
>>>>
>>>> With this we dont want to reset TRANS_CTL_VRR Enable bit while updating
>>>> the vrr transcoder timings.
>>>>
>>>> v2: Update intel_vrr_set_transcoder_timings for fixed_rr.
>>>> v3: Update intel_set_transcoder_timings_lrr for fixed_rr. (Ville)
>>>> Add TRANS_PUSH while enabling VRR for fixed_rr.
>>>>
>>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/display/intel_display.c | 10 +++++--
>>>> drivers/gpu/drm/i915/display/intel_vrr.c | 29 ++++++++++++++++++--
>>>> drivers/gpu/drm/i915/display/intel_vrr.h | 3 ++
>>>> 3 files changed, 36 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>>> index 66c5ad46bfea..c9d1c091b109 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>>> @@ -1755,6 +1755,7 @@ static void hsw_set_frame_start_delay(const struct intel_crtc_state *crtc_state)
>>>>
>>>> static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_state)
>>>> {
>>>> + struct intel_display *display = to_intel_display(crtc_state);
>>>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>>>> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>>>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>>>> @@ -1770,9 +1771,12 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
>>>> }
>>>>
>>>> intel_set_transcoder_timings(crtc_state);
>>>> - if (HAS_VRR(dev_priv))
>>>> - intel_vrr_set_transcoder_timings(crtc_state);
>>>> -
>>>> + if (HAS_VRR(dev_priv)) {
>>>> + if (intel_vrr_always_use_vrr_tg(display))
>>>> + intel_vrr_enable_fixed_rr_timings(crtc_state);
>>>> + else
>>>> + intel_vrr_set_transcoder_timings(crtc_state);
>>> I think intel_vrr_set_transcoder_timings() should just program the
>>> fixed timings always. And we shouldn't do anything else here.
>>>
>>> And I think the VRR_CTL enable/disable for the always_use_vrr_tg==true
>>> case should be done at some more appropriate spot in the modeset
>>> sequence. We can add eg. intel_vrr_trancoder_{enable,disable}() for
>>> that part.
>> Alright. So will do the following changes:
>> In intel_vrr_set_transcoder:
>> -Avoid modifying VRR_CTL, currently, it disables VRR_VTL if flipline is
>> not set, and also writes guardband and other settings in VRR_CTL.
>>
>> -Instead of setting variable timings, just set the fixed timings always.
>>
>> Use separate functions for enabling/disabling VRR CTL:
>> -As suggested will create intel_vrr_transcoder_enable and
>> intel_vrr_transcoder_disable functions.
>> -These functions should handle VRR_CTL settings for platforms where TG
>> is not always used.
>> -I am thinking to call these functions based on vrr.flipline:
>>
>> if (is_enabling(vrr.flipline, old_crtc_state, new_crtc_state))
>> intel_vrr_transcoder_enable(new_crtc_state)
>>
>> Thinking to add this in commit_pipe_post_planes() just before
>> intel_vrr_enable().
>>
>> if (is_disabling(vrr.flipline, old_crtc_state, new_crtc_state))
>> intel_vrr_transcoder_disable(new_crtc_state)
> We want them called unconditionally from either
> intel_{enable,disable}_transcoder() or perhaps from some
> ddi encoder hook (not sure how early/late this needs to
> be done). And they should just do nothing for the
> !always_use_vrr_tg case.
Thanks for clarification.
As per bspec, VRR enable should be programmed after TRANS_DDI_FUNC_CTL
and before TRANS_CONF and VRR disable should be programmed before
TRANS_CONF.
So I will set them in appropriate places in the next version.
Thanks again for clearing this up.
Regards,
Ankit
>
>> Will try adding this in intel_pre_plane_update() after intel_vrr_disable().
>>
>> Please correct me if I have missed something or got something wrong.
>>
>> Regards,
>>
>> Ankit
>>
>>>> + }
>>>> if (cpu_transcoder != TRANSCODER_EDP)
>>>> intel_de_write(dev_priv, TRANS_MULT(dev_priv, cpu_transcoder),
>>>> crtc_state->pixel_multiplier - 1);
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>>>> index e247055bc486..4151fcd0f978 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>>>> @@ -456,8 +456,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
>>>> crtc_state->vrr.vmin - 1);
>>>> intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
>>>> crtc_state->vrr.vmax - 1);
>>>> - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>>> - trans_vrr_ctl(crtc_state));
>>>> + if (intel_vrr_always_use_vrr_tg(display))
>>>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>>> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
>>>> + else
>>>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>>> + trans_vrr_ctl(crtc_state));
>>> We should probably remove this VRR_CTL frobbing from here entirely,
>>> and just always do it from the intel_vrr_trancoder_{enable,disable}().
>>> And obviously for the !always_use_vrr_tg case we just skip setting
>>> the enable bit there.
>>>
>>>> intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
>>>> crtc_state->vrr.flipline - 1);
>>>>
>>>> @@ -536,7 +540,6 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state)
>>>> return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND;
>>>> }
>>>>
>>>> -static
>>>> bool intel_vrr_always_use_vrr_tg(struct intel_display *display)
>>>> {
>>>> if (!HAS_VRR(display))
>>>> @@ -616,6 +619,26 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
>>>> intel_vrr_set_fixed_rr_timings(old_crtc_state);
>>>> }
>>>>
>>>> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
>>>> +{
>>>> + struct intel_display *display = to_intel_display(crtc_state);
>>>> + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>>>> +
>>>> + intel_vrr_set_fixed_rr_timings(crtc_state);
>>>> +
>>>> + if (HAS_AS_SDP(display))
>>>> + intel_de_write(display,
>>>> + TRANS_VRR_VSYNC(display, cpu_transcoder),
>>>> + VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
>>>> + VRR_VSYNC_START(crtc_state->vrr.vsync_start));
>>>> +
>>>> + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder),
>>>> + TRANS_PUSH_EN);
>>>> +
>>>> + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder),
>>>> + VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state));
>>>> +}
>>>> +
>>>> static
>>>> bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
>>>> {
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
>>>> index 514822577e8a..9259964978b1 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_vrr.h
>>>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.h
>>>> @@ -12,6 +12,7 @@ struct drm_connector_state;
>>>> struct intel_atomic_state;
>>>> struct intel_connector;
>>>> struct intel_crtc_state;
>>>> +struct intel_display;
>>>> struct intel_dsb;
>>>>
>>>> bool intel_vrr_is_capable(struct intel_connector *connector);
>>>> @@ -35,5 +36,7 @@ int intel_vrr_vmin_vtotal(const struct intel_crtc_state *crtc_state);
>>>> int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state);
>>>> int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state);
>>>> int intel_vrr_vblank_delay(const struct intel_crtc_state *crtc_state);
>>>> +bool intel_vrr_always_use_vrr_tg(struct intel_display *display);
>>>> +void intel_vrr_enable_fixed_rr_timings(const struct intel_crtc_state *crtc_state);
>>>>
>>>> #endif /* __INTEL_VRR_H__ */
>>>> --
>>>> 2.45.2
^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2025-02-20 5:31 UTC | newest]
Thread overview: 42+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-14 12:11 [PATCH 00/19] Use VRR timing generator for fixed refresh rate modes Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 01/19] drm/i915/vrr: Remove unwanted comment Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 02/19] drm/i915:vrr: Separate out functions to compute vmin and vmax Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 03/19] drm/i915/vrr: Make helpers for cmrr and vrr timings Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 04/19] drm/i915/vrr: Disable CMRR Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 05/19] drm/i915/vrr: Track vrr.enable only for variable timing Ankit Nautiyal
2025-02-17 18:06 ` Ville Syrjälä
2025-02-19 12:35 ` Nautiyal, Ankit K
2025-02-14 12:11 ` [PATCH 06/19] drm/i915/vrr: Use crtc_vtotal for vmin Ankit Nautiyal
2025-02-17 18:08 ` Ville Syrjälä
2025-02-19 12:38 ` Nautiyal, Ankit K
2025-02-14 12:11 ` [PATCH 07/19] drm/i915/vrr: Prepare for fixed refresh rate timings Ankit Nautiyal
2025-02-17 18:12 ` Ville Syrjälä
2025-02-19 12:40 ` Nautiyal, Ankit K
2025-02-14 12:11 ` [PATCH 08/19] drm/i915/dp: Avoid vrr compute config for HDMI sink Ankit Nautiyal
2025-02-17 18:14 ` Ville Syrjälä
2025-02-19 12:53 ` Nautiyal, Ankit K
2025-02-19 14:59 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 09/19] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 10/19] drm/i915/hdmi: Use VRR Timing generator for HDMI Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 11/19] drm/i915/display: Disable PSR before disabling VRR Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 12/19] drm/i915/display: Extend WA 14015406119 for PSR2 Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 13/19] drm/i915/vrr: Handle joiner with vrr Ankit Nautiyal
2025-02-17 18:17 ` Ville Syrjälä
2025-02-19 12:56 ` Nautiyal, Ankit K
2025-02-14 12:11 ` [PATCH 14/19] drm/i915/vrr: Refactor condition for computing vmax and LRR Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 15/19] drm/i915/vrr: Always set vrr vmax/vmin/flipline in vrr_{enable/disable} Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 16/19] drm/i915/display: Use fixed_rr timings in modeset sequence Ankit Nautiyal
2025-02-17 18:34 ` Ville Syrjälä
2025-02-17 18:56 ` Ville Syrjälä
2025-02-19 13:57 ` Nautiyal, Ankit K
2025-02-19 15:08 ` Ville Syrjälä
2025-02-19 13:17 ` Nautiyal, Ankit K
2025-02-19 15:05 ` Ville Syrjälä
2025-02-20 5:31 ` Nautiyal, Ankit K
2025-02-14 12:11 ` [PATCH 17/19] drm/i915/display: Use fixed rr timings in intel_set_transcoder_timings_lrr() Ankit Nautiyal
2025-02-14 12:11 ` [PATCH 18/19] drm/i915/vrr: Always use VRR timing generator for MTL+ Ankit Nautiyal
2025-02-17 18:39 ` Ville Syrjälä
2025-02-14 12:11 ` [PATCH 19/19] drm/i915/display: Add fixed_rr to crtc_state dump Ankit Nautiyal
2025-02-14 12:44 ` ✗ Fi.CI.SPARSE: warning for Use VRR timing generator for fixed refresh rate modes (rev9) Patchwork
2025-02-14 13:02 ` ✓ i915.CI.BAT: success " Patchwork
2025-02-14 15:26 ` ✗ i915.CI.Full: failure " Patchwork
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