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Wed, 05 Mar 2025 07:47:02 -0800 (PST) Received: from localhost ([216.228.125.131]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2ff4e7ff9f7sm1491518a91.33.2025.03.05.07.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Mar 2025 07:47:02 -0800 (PST) Date: Wed, 5 Mar 2025 10:47:00 -0500 From: Yury Norov To: mailhol.vincent@wanadoo.fr Cc: Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton , linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Dmitry Baryshkov , Andy Shevchenko , Jani Nikula Subject: Re: [PATCH v4 3/8] bits: introduce fixed-type genmasks Message-ID: References: <20250305-fixed-type-genmasks-v4-0-1873dcdf6723@wanadoo.fr> <20250305-fixed-type-genmasks-v4-3-1873dcdf6723@wanadoo.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250305-fixed-type-genmasks-v4-3-1873dcdf6723@wanadoo.fr> X-Mailman-Approved-At: Fri, 07 Mar 2025 13:57:54 +0000 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, Mar 05, 2025 at 10:00:15PM +0900, Vincent Mailhol via B4 Relay wrote: > From: Yury Norov > > Add __GENMASK_t() which generalizes __GENMASK() to support different > types, and implement fixed-types versions of GENMASK() based on it. > The fixed-type version allows more strict checks to the min/max values > accepted, which is useful for defining registers like implemented by > i915 and xe drivers with their REG_GENMASK*() macros. > > The strict checks rely on shift-count-overflow compiler check to fail > the build if a number outside of the range allowed is passed. > Example: > > #define FOO_MASK GENMASK_U32(33, 4) > > will generate a warning like: > > ../include/linux/bits.h:41:31: error: left shift count >= width of type [-Werror=shift-count-overflow] > 41 | (((t)~0ULL - ((t)(1) << (l)) + 1) & \ > | ^~ > > Signed-off-by: Yury Norov > Signed-off-by: Lucas De Marchi > Acked-by: Jani Nikula > Signed-off-by: Vincent Mailhol Co-developed-by? > --- > Changelog: > > v3 -> v4: > > - The v3 is one year old. Meanwhile people started using > __GENMASK() directly. So instead of generalizing __GENMASK() to > support different types, add a new GENMASK_t(). > > - replace ~0ULL by ~_ULL(0). Otherwise, __GENMASK_t() would fail > in asm code. > > - Make GENMASK_U8() and GENMASK_U16() return an unsigned int. In > v3, due to the integer promotion rules, these were returning a > signed integer. By casting these to unsigned int, at least the This comment will disappear when I'll apply the patch. Can you comment it in the code instead? > signedness is kept. > --- > include/linux/bitops.h | 1 - > include/linux/bits.h | 33 +++++++++++++++++++++++++++++---- > 2 files changed, 29 insertions(+), 5 deletions(-) > > diff --git a/include/linux/bitops.h b/include/linux/bitops.h > index c1cb53cf2f0f8662ed3e324578f74330e63f935d..9be2d50da09a417966b3d11c84092bb2f4cd0bef 100644 > --- a/include/linux/bitops.h > +++ b/include/linux/bitops.h > @@ -8,7 +8,6 @@ > > #include > > -#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) > #define BITS_TO_LONGS(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(long)) > #define BITS_TO_U64(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u64)) > #define BITS_TO_U32(nr) __KERNEL_DIV_ROUND_UP(nr, BITS_PER_TYPE(u32)) > diff --git a/include/linux/bits.h b/include/linux/bits.h > index 5f68980a1b98d771426872c74d7b5c0f79e5e802..f202e46d2f4b7899c16d975120f3fa3ae41556ae 100644 > --- a/include/linux/bits.h > +++ b/include/linux/bits.h > @@ -12,6 +12,7 @@ > #define BIT_ULL_MASK(nr) (ULL(1) << ((nr) % BITS_PER_LONG_LONG)) > #define BIT_ULL_WORD(nr) ((nr) / BITS_PER_LONG_LONG) > #define BITS_PER_BYTE 8 > +#define BITS_PER_TYPE(type) (sizeof(type) * BITS_PER_BYTE) > > /* > * Create a contiguous bitmask starting at bit position @l and ending at > @@ -25,14 +26,38 @@ > > #define GENMASK_INPUT_CHECK(h, l) BUILD_BUG_ON_ZERO(const_true((l) > (h))) > > -#define GENMASK(h, l) \ > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) > -#define GENMASK_ULL(h, l) \ > - (GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l)) > +/* > + * Generate a mask for the specified type @t. Additional checks are made to > + * guarantee the value returned fits in that type, relying on > + * shift-count-overflow compiler check to detect incompatible arguments. > + * For example, all these create build errors or warnings: > + * > + * - GENMASK(15, 20): wrong argument order > + * - GENMASK(72, 15): doesn't fit unsigned long > + * - GENMASK_U32(33, 15): doesn't fit in a u32 > + */ > +#define GENMASK_t(t, h, l) \ Agree with Andy. This should be GENMASK_TYPE, or triple-underscored ___GENMASK() maybe. This _t thing looks misleading. > + (GENMASK_INPUT_CHECK(h, l) + \ > + (((t)~ULL(0) - ((t)1 << (l)) + 1) & \ > + ((t)~ULL(0) >> (BITS_PER_TYPE(t) - 1 - (h))))) Can you rebase it on top of -next? In this dev cycle I merge a patch that reverts the __GENMASK() back to: #define __GENMASK(h, l) (((~_UL(0)) << (l)) & (~_UL(0) >> (BITS_PER_LONG - 1 - (h)))) > +#define GENMASK(h, l) GENMASK_t(unsigned long, h, l) > +#define GENMASK_ULL(h, l) GENMASK_t(unsigned long long, h, l) This makes __GENMASK() and __GENMASK_ULL() unused in the kernel, other than in uapi. Or I misunderstand it? Having, in fact, different implementations of the same macro for kernel and userspace is a source of problems. Can we move GENMASK_TYPE() to uapi, and implement __GENMASK() on top of them? If not, I'd prefer to keep GENMASK and GENMASK_ULL untouched. Can you run bloat-o-meter and ensure there's no unwanted effects on code generation? > /* > * Missing asm support > * > + * __GENMASK_U*() depends on BITS_PER_TYPE() which would not work in the asm And there's no __GENMASK_U*(), right? > + * code as BITS_PER_TYPE() relies on sizeof(), something not available in > + * asm. Nethertheless, the concept of fixed width integers is a C thing which > + * does not apply to assembly code. > + */ > +#define GENMASK_U8(h, l) ((unsigned int)GENMASK_t(u8, h, l)) > +#define GENMASK_U16(h, l) ((unsigned int)GENMASK_t(u16, h, l)) Typecast to the type that user provides explicitly? And maybe do in GENMASK_TYPE() > +#define GENMASK_U32(h, l) GENMASK_t(u32, h, l) > +#define GENMASK_U64(h, l) GENMASK_t(u64, h, l) OK, this looks good. But GENMASK_U128() becomes a special case now. The 128-bit GENMASK is unsued, but it's exported in uapi. Is there any simple way to end up with a common implementation for all fixed-type GENMASKs? > + > +/* > * __GENMASK_U128() depends on _BIT128() which would not work > * in the asm code, as it shifts an 'unsigned __int128' data > * type instead of direct representation of 128 bit constants This comment is duplicated by the previous one. Maybe just join them? (Let's wait for a while for updates regarding GENMASK_U128 status before doing it.)