From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5228C282D1 for ; Thu, 6 Mar 2025 13:09:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7547810E953; Thu, 6 Mar 2025 13:09:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="lZinzr61"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id B7F5110E70E; Thu, 6 Mar 2025 13:09:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1741266542; x=1772802542; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=d/J2+mq/GAIy24horHmHsXIcl7aG6z61rC5ACtPrVpI=; b=lZinzr61WX1kE0xytmuke/SecdTLULY6I8COsiv36QZlM3EPi4mmS6Ot EGLsuIHqTBabSKC9Uys8PJfqT0IoIUwY0YiEMXzTIguEa/XLJJKIZCO2D VHg4J8/lbn3f02l+Vz0WU6l374n5vQJoXUMQuPny/ny0vgwqtZUy36YCo qCHKfwu3AtLfs96UbDU6iOb+Wgrel96qs4gKmNt83Ls/RvZjf8wx330yC /bLt7uLkzbQ35jCmlUN10wdTG4f2jeJ2K0sY/o/FsqJfOwUaHva+UnAdd //+bKsoNeLAsbHmK2HRgEndD+TnJ3oJtjh3xBurADGXP+HZB6H9kuWpbY Q==; X-CSE-ConnectionGUID: Y4W9K60gRDGPgcz+IdiImw== X-CSE-MsgGUID: WXRS9umcST+R6TRgYccgQQ== X-IronPort-AV: E=McAfee;i="6700,10204,11365"; a="52917857" X-IronPort-AV: E=Sophos;i="6.14,226,1736841600"; d="scan'208";a="52917857" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2025 05:09:00 -0800 X-CSE-ConnectionGUID: H7mWMoRdTLOv4gb+L0QGqw== X-CSE-MsgGUID: ldBU1+aHSlKjVO7ibT1o5A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.14,226,1736841600"; d="scan'208";a="119027618" Received: from smile.fi.intel.com ([10.237.72.58]) by orviesa006.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2025 05:08:55 -0800 Received: from andy by smile.fi.intel.com with local (Exim 4.98) (envelope-from ) id 1tqAy3-000000007h6-3bfG; Thu, 06 Mar 2025 15:08:51 +0200 Date: Thu, 6 Mar 2025 15:08:51 +0200 From: Andy Shevchenko To: mailhol.vincent@wanadoo.fr Cc: Yury Norov , Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton , linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Dmitry Baryshkov , Jani Nikula Subject: Re: [PATCH v5 2/7] bits: introduce fixed-type genmasks Message-ID: References: <20250306-fixed-type-genmasks-v5-0-b443e9dcba63@wanadoo.fr> <20250306-fixed-type-genmasks-v5-2-b443e9dcba63@wanadoo.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250306-fixed-type-genmasks-v5-2-b443e9dcba63@wanadoo.fr> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Mar 06, 2025 at 08:29:53PM +0900, Vincent Mailhol via B4 Relay wrote: > From: Yury Norov > > Add GENMASK_TYPE() which generalizes __GENMASK() to support different > types, and implement fixed-types versions of GENMASK() based on it. > The fixed-type version allows more strict checks to the min/max values > accepted, which is useful for defining registers like implemented by > i915 and xe drivers with their REG_GENMASK*() macros. > > The strict checks rely on shift-count-overflow compiler check to fail > the build if a number outside of the range allowed is passed. > Example: > > #define FOO_MASK GENMASK_U32(33, 4) > > will generate a warning like: > > include/linux/bits.h:51:27: error: right shift count >= width of type [-Werror=shift-count-overflow] > 51 | type_max(t) >> (BITS_PER_TYPE(t) - 1 - (h))))) > | ^~ Code LGTM, but just to be sure: you prepared your series using histogram diff algo, right? -- With Best Regards, Andy Shevchenko