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[216.228.125.128]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-225c6bbca45sm97083145ad.166.2025.03.18.10.16.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Mar 2025 10:16:05 -0700 (PDT) Date: Tue, 18 Mar 2025 13:16:01 -0400 From: Yury Norov To: mailhol.vincent@wanadoo.fr Cc: Lucas De Marchi , Rasmus Villemoes , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Simona Vetter , Andrew Morton , linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Andi Shyti , David Laight , Dmitry Baryshkov , Andy Shevchenko , Jani Nikula Subject: Re: [PATCH v6 4/7] drm/i915: Convert REG_GENMASK*() to fixed-width GENMASK_U*() Message-ID: References: <20250308-fixed-type-genmasks-v6-0-f59315e73c29@wanadoo.fr> <20250308-fixed-type-genmasks-v6-4-f59315e73c29@wanadoo.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250308-fixed-type-genmasks-v6-4-f59315e73c29@wanadoo.fr> X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote: > From: Lucas De Marchi > > Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use > them to implement the i915/xe specific macros. Converting each driver > to use the generic macros are left for later, when/if other > driver-specific macros are also generalized. > > Signed-off-by: Lucas De Marchi > Acked-by: Jani Nikula > Signed-off-by: Vincent Mailhol > --- > Changelog: > > v5 -> v6: > > - No changes. > > v4 -> v5: > > - Add braket to macro names in patch description, > e.g. 'REG_GENMASK*' -> 'REG_GENMASK*()' > > v3 -> v4: > > - Remove the prefixes in macro parameters, > e.g. 'REG_GENMASK(__high, __low)' -> 'REG_GENMASK(high, low)' > --- > drivers/gpu/drm/i915/i915_reg_defs.h | 108 ++++------------------------------- > 1 file changed, 11 insertions(+), 97 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h > index e251bcc0c89f5710125bc70f07851b2cb978c89c..39e5ed9511174b8757b9201bff735fa362651b34 100644 > --- a/drivers/gpu/drm/i915/i915_reg_defs.h > +++ b/drivers/gpu/drm/i915/i915_reg_defs.h > @@ -9,76 +9,19 @@ > #include > #include > > -/** > - * REG_BIT() - Prepare a u32 bit value > - * @__n: 0-based bit number > - * > - * Local wrapper for BIT() to force u32, with compile time checks. > - * > - * @return: Value with bit @__n set. > +/* > + * Wrappers over the generic BIT_* and GENMASK_* implementations, > + * for compatibility reasons with previous implementation > */ > -#define REG_BIT(__n) \ > - ((u32)(BIT(__n) + \ > - BUILD_BUG_ON_ZERO(__is_constexpr(__n) && \ > - ((__n) < 0 || (__n) > 31)))) > +#define REG_GENMASK(high, low) GENMASK_U32(high, low) > +#define REG_GENMASK64(high, low) GENMASK_U64(high, low) > +#define REG_GENMASK16(high, low) GENMASK_U16(high, low) > +#define REG_GENMASK8(high, low) GENMASK_U8(high, low) Nit. Maybe just #define REG_GENMASK GENMASK_U32