* [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
@ 2024-01-18 15:27 ` Juha-Pekka Heikkila
2024-01-19 11:48 ` Jani Nikula
2024-01-19 15:22 ` Matthew Auld
0 siblings, 2 replies; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-18 15:27 UTC (permalink / raw)
To: intel-xe, intel-gfx
Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 722c84a56607..579badb8c69e 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -13,6 +13,16 @@
#include <drm/ttm/ttm_bo.h>
+static bool is_compressed(const struct drm_framebuffer *fb)
+{
+ struct xe_bo *bo = intel_fb_obj(fb);
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
+ struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+ u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
+
+ return (bo->pat_index == pat_index_compressed);
+}
+
static void
write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
u32 width, u32 height, u32 src_stride, u32 dst_stride)
@@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
int intel_plane_pin_fb(struct intel_plane_state *plane_state)
{
struct drm_framebuffer *fb = plane_state->hw.fb;
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
struct xe_bo *bo = intel_fb_obj(fb);
struct i915_vma *vma;
/* We reject creating !SCANOUT fb's, so this is weird.. */
drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
+ if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
+ is_compressed(fb)) {
+ drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
+ return -EINVAL;
+ }
+
vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
if (IS_ERR(vma))
return PTR_ERR(vma);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
@ 2024-01-19 11:48 ` Jani Nikula
2024-01-19 12:08 ` Juha-Pekka Heikkila
2024-01-19 15:22 ` Matthew Auld
1 sibling, 1 reply; 17+ messages in thread
From: Jani Nikula @ 2024-01-19 11:48 UTC (permalink / raw)
To: Juha-Pekka Heikkila, intel-xe, intel-gfx
On Thu, 18 Jan 2024, Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 722c84a56607..579badb8c69e 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -13,6 +13,16 @@
>
> #include <drm/ttm/ttm_bo.h>
>
> +static bool is_compressed(const struct drm_framebuffer *fb)
> +{
> + struct xe_bo *bo = intel_fb_obj(fb);
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
> + u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
> +
> + return (bo->pat_index == pat_index_compressed);
> +}
> +
> static void
> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> u32 width, u32 height, u32 src_stride, u32 dst_stride)
> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> {
> struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> struct xe_bo *bo = intel_fb_obj(fb);
> struct i915_vma *vma;
>
> /* We reject creating !SCANOUT fb's, so this is weird.. */
> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>
> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
Is GRAPHICS_VER correct or should that be a DISPLAY_VER instead?
> + is_compressed(fb)) {
> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> + return -EINVAL;
> + }
> +
> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
> if (IS_ERR(vma))
> return PTR_ERR(vma);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-19 11:48 ` Jani Nikula
@ 2024-01-19 12:08 ` Juha-Pekka Heikkila
0 siblings, 0 replies; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-19 12:08 UTC (permalink / raw)
To: Jani Nikula, intel-xe, intel-gfx
On 19.1.2024 13.48, Jani Nikula wrote:
> On Thu, 18 Jan 2024, Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> wrote:
>> Display engine support ccs only with tile4, prevent other modifiers
>> from using compressed memory.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> index 722c84a56607..579badb8c69e 100644
>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> @@ -13,6 +13,16 @@
>>
>> #include <drm/ttm/ttm_bo.h>
>>
>> +static bool is_compressed(const struct drm_framebuffer *fb)
>> +{
>> + struct xe_bo *bo = intel_fb_obj(fb);
>> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
>> + u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
>> +
>> + return (bo->pat_index == pat_index_compressed);
>> +}
>> +
>> static void
>> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
>> u32 width, u32 height, u32 src_stride, u32 dst_stride)
>> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
>> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
>> {
>> struct drm_framebuffer *fb = plane_state->hw.fb;
>> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> struct xe_bo *bo = intel_fb_obj(fb);
>> struct i915_vma *vma;
>>
>> /* We reject creating !SCANOUT fb's, so this is weird.. */
>> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>>
>> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
>
> Is GRAPHICS_VER correct or should that be a DISPLAY_VER instead?
I think GRAPHICS_VER is correct here because this depend if base ccs
functionality is there which doesn't relate to display version.
>
>> + is_compressed(fb)) {
>> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
>> + return -EINVAL;
>> + }
>> +
>> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
>> if (IS_ERR(vma))
>> return PTR_ERR(vma);
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-19 11:48 ` Jani Nikula
@ 2024-01-19 15:22 ` Matthew Auld
2024-01-22 18:27 ` Juha-Pekka Heikkila
1 sibling, 1 reply; 17+ messages in thread
From: Matthew Auld @ 2024-01-19 15:22 UTC (permalink / raw)
To: Juha-Pekka Heikkila, intel-xe, intel-gfx
On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 722c84a56607..579badb8c69e 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -13,6 +13,16 @@
>
> #include <drm/ttm/ttm_bo.h>
>
> +static bool is_compressed(const struct drm_framebuffer *fb)
> +{
> + struct xe_bo *bo = intel_fb_obj(fb);
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
> + u16 pat_index_compressed = tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
Why just this index? There seems to be various indexes that turn on
compression. How about annotating the pat index table and then have a
helper like xe_pat_index_has_compression(xe, pat_index)?
@@ -104,7 +104,8 @@ static const struct xe_pat_table_entry
xelpg_pat_table[] = {
REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
- .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
XE_COH_NONE \
+ .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
XE_COH_NONE, \
+ .compressed = comp_en \
}
static const struct xe_pat_table_entry xe2_pat_table[] = {
@@ -148,6 +149,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe,
u16 pat_index)
return xe->pat.table[pat_index].coh_mode;
}
+bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index)
+{
+ WARN_ON(pat_index >= xe->pat.n_entries);
+ return xe->pat.table[pat_index].compressed;
+}
+
static void program_pat(struct xe_gt *gt, const struct
xe_pat_table_entry table[],
int n_entries)
{
diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
index fa0dfbe525cd..37666ba1aec4 100644
--- a/drivers/gpu/drm/xe/xe_pat.h
+++ b/drivers/gpu/drm/xe/xe_pat.h
@@ -29,6 +29,7 @@ struct xe_pat_table_entry {
#define XE_COH_NONE 1
#define XE_COH_AT_LEAST_1WAY 2
u16 coh_mode;
+ bool compressed;
};
/**
@@ -58,4 +59,6 @@ void xe_pat_dump(struct xe_gt *gt, struct drm_printer *p);
*/
u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
+bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index);
> +
> + return (bo->pat_index == pat_index_compressed);
> +}
> +
> static void
> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> u32 width, u32 height, u32 src_stride, u32 dst_stride)
> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags)
> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
> {
> struct drm_framebuffer *fb = plane_state->hw.fb;
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> struct xe_bo *bo = intel_fb_obj(fb);
> struct i915_vma *vma;
>
> /* We reject creating !SCANOUT fb's, so this is weird.. */
> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>
> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier != I915_FORMAT_MOD_4_TILED &&
> + is_compressed(fb)) {
> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> + return -EINVAL;
> + }
> +
> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb), &plane_state->view.gtt);
> if (IS_ERR(vma))
> return PTR_ERR(vma);
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-19 15:22 ` Matthew Auld
@ 2024-01-22 18:27 ` Juha-Pekka Heikkila
0 siblings, 0 replies; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-22 18:27 UTC (permalink / raw)
To: Matthew Auld, intel-xe, intel-gfx
On 19.1.2024 17.22, Matthew Auld wrote:
> On 18/01/2024 15:27, Juha-Pekka Heikkila wrote:
>> Display engine support ccs only with tile4, prevent other modifiers
>> from using compressed memory.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>> drivers/gpu/drm/xe/display/xe_fb_pin.c | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> index 722c84a56607..579badb8c69e 100644
>> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
>> @@ -13,6 +13,16 @@
>> #include <drm/ttm/ttm_bo.h>
>> +static bool is_compressed(const struct drm_framebuffer *fb)
>> +{
>> + struct xe_bo *bo = intel_fb_obj(fb);
>> + struct xe_device *xe =
>> to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> + struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
>> + u16 pat_index_compressed =
>> tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WT];
>
> Why just this index? There seems to be various indexes that turn on
> compression. How about annotating the pat index table and then have a
> helper like xe_pat_index_has_compression(xe, pat_index)?
I was wondering why compression was not explicitly stated anywhere so I
did pick only compressed index now used with idea those other indexes
can be added to display part it nobody else needed to know about
compression.
I'll include your suggestion into my patches and see where do it get
with that, thanks!
/Juha-Pekka
>
> @@ -104,7 +104,8 @@ static const struct xe_pat_table_entry
> xelpg_pat_table[] = {
> REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
> REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
> REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
> - .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
> XE_COH_NONE \
> + .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY :
> XE_COH_NONE, \
> + .compressed = comp_en \
> }
>
> static const struct xe_pat_table_entry xe2_pat_table[] = {
> @@ -148,6 +149,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe,
> u16 pat_index)
> return xe->pat.table[pat_index].coh_mode;
> }
>
> +bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index)
> +{
> + WARN_ON(pat_index >= xe->pat.n_entries);
> + return xe->pat.table[pat_index].compressed;
> +}
> +
> static void program_pat(struct xe_gt *gt, const struct
> xe_pat_table_entry table[],
> int n_entries)
> {
> diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
> index fa0dfbe525cd..37666ba1aec4 100644
> --- a/drivers/gpu/drm/xe/xe_pat.h
> +++ b/drivers/gpu/drm/xe/xe_pat.h
> @@ -29,6 +29,7 @@ struct xe_pat_table_entry {
> #define XE_COH_NONE 1
> #define XE_COH_AT_LEAST_1WAY 2
> u16 coh_mode;
> + bool compressed;
> };
>
> /**
> @@ -58,4 +59,6 @@ void xe_pat_dump(struct xe_gt *gt, struct drm_printer
> *p);
> */
> u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
>
> +bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index);
>
>> +
>> + return (bo->pat_index == pat_index_compressed);
>> +}
>> +
>> static void
>> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32
>> *dpt_ofs, u32 bo_ofs,
>> u32 width, u32 height, u32 src_stride, u32 dst_stride)
>> @@ -349,12 +359,19 @@ void intel_unpin_fb_vma(struct i915_vma *vma,
>> unsigned long flags)
>> int intel_plane_pin_fb(struct intel_plane_state *plane_state)
>> {
>> struct drm_framebuffer *fb = plane_state->hw.fb;
>> + struct xe_device *xe =
>> to_xe_device(to_intel_framebuffer(fb)->base.dev);
>> struct xe_bo *bo = intel_fb_obj(fb);
>> struct i915_vma *vma;
>> /* We reject creating !SCANOUT fb's, so this is weird.. */
>> drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_SCANOUT_BIT));
>> + if (GRAPHICS_VER(xe) >= 20 && fb->modifier !=
>> I915_FORMAT_MOD_4_TILED &&
>> + is_compressed(fb)) {
>> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other
>> than tile4 mofifier\n");
>> + return -EINVAL;
>> + }
>> +
>> vma = __xe_pin_fb_vma(to_intel_framebuffer(fb),
>> &plane_state->view.gtt);
>> if (IS_ERR(vma))
>> return PTR_ERR(vma);
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 0/4] Enable ccs compressed framebuffers on Xe2
@ 2024-01-30 19:36 Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 1/4] drm/xe/pat: annotate pat index table with compression info Juha-Pekka Heikkila
` (5 more replies)
0 siblings, 6 replies; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-30 19:36 UTC (permalink / raw)
To: intel-xe, intel-gfx
This patch set touches Xe and i915 drivers. On i915 is checked if
running on Xe2 hardware and enable framebuffer ccs decompression
unconditionally for tile4 framebuffers. On Xe driver with Xe2
hardware check if ccs compression is in use and behave accordingly;
attempt to use ccs with linear and x-tiled framebuffers will result
in -EINVAL as display does support decompression only on tile4.
v2: Add compressed flag into pat index table and use that. Try to
avoid situation where framebuffer can be bound with different
pat index after it was pinned.
v3: Small changes. Changed pat index annotation code author for
Matthew as it was cut'n'paste from review comment.
Juha-Pekka Heikkila (3):
drm/xe: add bind time pat index to xe_bo structure
drm/xe/xe2: Limit ccs framebuffers to tile4 only
drm/i915/display: On Xe2 always enable decompression with tile4
Matthew Auld (1):
drm/xe/pat: annotate pat index table with compression info
.../drm/i915/display/skl_universal_plane.c | 5 ++++
drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++
drivers/gpu/drm/xe/xe_bo_types.h | 12 ++++++++++
drivers/gpu/drm/xe/xe_pat.c | 9 +++++++-
drivers/gpu/drm/xe/xe_pat.h | 14 +++++++++++
drivers/gpu/drm/xe/xe_pt.c | 22 ++++++++++++++----
6 files changed, 80 insertions(+), 5 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/4] drm/xe/pat: annotate pat index table with compression info
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
@ 2024-01-30 19:36 ` Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
` (4 subsequent siblings)
5 siblings, 0 replies; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-30 19:36 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: Matthew Auld
From: Matthew Auld <matthew.auld@intel.com>
In a future patch we need to be able to determine if a given pat_index
enables compression on xe2. Simplest is to annotate the PAT index table
with this information.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/xe_pat.c | 9 ++++++++-
drivers/gpu/drm/xe/xe_pat.h | 14 ++++++++++++++
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
index 1ff6bc79e7d4..c3cc6e90b068 100644
--- a/drivers/gpu/drm/xe/xe_pat.c
+++ b/drivers/gpu/drm/xe/xe_pat.c
@@ -104,7 +104,8 @@ static const struct xe_pat_table_entry xelpg_pat_table[] = {
REG_FIELD_PREP(XE2_L3_POLICY, l3_policy) | \
REG_FIELD_PREP(XE2_L4_POLICY, l4_policy) | \
REG_FIELD_PREP(XE2_COH_MODE, __coh_mode), \
- .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY : XE_COH_NONE \
+ .coh_mode = __coh_mode ? XE_COH_AT_LEAST_1WAY : XE_COH_NONE, \
+ .compressed = comp_en \
}
static const struct xe_pat_table_entry xe2_pat_table[] = {
@@ -148,6 +149,12 @@ u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index)
return xe->pat.table[pat_index].coh_mode;
}
+bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index)
+{
+ WARN_ON(pat_index >= xe->pat.n_entries);
+ return xe->pat.table[pat_index].compressed;
+}
+
static void program_pat(struct xe_gt *gt, const struct xe_pat_table_entry table[],
int n_entries)
{
diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
index fa0dfbe525cd..8c0fc68e844f 100644
--- a/drivers/gpu/drm/xe/xe_pat.h
+++ b/drivers/gpu/drm/xe/xe_pat.h
@@ -29,6 +29,10 @@ struct xe_pat_table_entry {
#define XE_COH_NONE 1
#define XE_COH_AT_LEAST_1WAY 2
u16 coh_mode;
+ /**
+ * @compressed: Whether compression is enabled or not with @value.
+ */
+ bool compressed;
};
/**
@@ -58,4 +62,14 @@ void xe_pat_dump(struct xe_gt *gt, struct drm_printer *p);
*/
u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index);
+/**
+ * xe_pat_index_has_compression - Check if the given pat_index enables
+ * compression.
+ * @xe: xe device
+ * @pat_index: The pat_index to query
+ *
+ * Note: Only applicable to xe2+, where compression is part of the PAT index.
+ */
+bool xe_pat_index_has_compression(struct xe_device *xe, u16 pat_index);
+
#endif
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 1/4] drm/xe/pat: annotate pat index table with compression info Juha-Pekka Heikkila
@ 2024-01-30 19:36 ` Juha-Pekka Heikkila
2024-01-31 18:56 ` Matt Roper
2024-01-30 19:36 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
` (3 subsequent siblings)
5 siblings, 1 reply; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-30 19:36 UTC (permalink / raw)
To: intel-xe, intel-gfx
Add BO bind time pat index member to xe_bo structure and store
pat index from xe_vma to xe_bo.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/xe_bo_types.h | 12 ++++++++++++
drivers/gpu/drm/xe/xe_pt.c | 22 ++++++++++++++++++----
2 files changed, 30 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index 14ef13b7b421..6d599f1e846b 100644
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@ -91,6 +91,18 @@ struct xe_bo {
/** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
struct list_head vram_userfault_link;
+
+ /**
+ * @pat_index: The pat index requested when bind this BO
+ */
+ u16 pat_index;
+
+ /**
+ * @has_sealed_pat_index: The pat index is sealed because this BO is
+ * pinned as framebuffer. This is to prevent flipping compression
+ * on/off from framebuffers while in use.
+ */
+ bool has_sealed_pat_index;
};
#define intel_bo_to_drm_bo(bo) (&(bo)->ttm.base)
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index de1030a47588..c72cb75d993c 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -1208,10 +1208,11 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
struct dma_fence *fence;
struct invalidation_fence *ifence = NULL;
struct xe_range_fence *rfence;
+ struct xe_bo *bo = xe_vma_bo(vma);
int err;
bind_pt_update.locked = false;
- xe_bo_assert_held(xe_vma_bo(vma));
+ xe_bo_assert_held(bo);
xe_vm_assert_held(vm);
vm_dbg(&xe_vma_vm(vma)->xe->drm,
@@ -1252,8 +1253,21 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
return ERR_PTR(-ENOMEM);
}
+ /*
+ * On Xe2 BO which was pinned as framebuffer before with different
+ * PAT index cannot be bound with different PAT index. This is
+ * to prevent switching CCS on/off from framebuffers on the fly
+ * with Xe2.
+ */
+ if (bo) {
+ if (bo->has_sealed_pat_index && bo->pat_index != vma->pat_index)
+ return ERR_PTR(-EINVAL);
+
+ bo->pat_index = vma->pat_index;
+ }
+
fence = xe_migrate_update_pgtables(tile->migrate,
- vm, xe_vma_bo(vma), q,
+ vm, bo, q,
entries, num_entries,
syncs, num_syncs,
&bind_pt_update.base);
@@ -1287,8 +1301,8 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
DMA_RESV_USAGE_KERNEL :
DMA_RESV_USAGE_BOOKKEEP);
- if (!xe_vma_has_no_bo(vma) && !xe_vma_bo(vma)->vm)
- dma_resv_add_fence(xe_vma_bo(vma)->ttm.base.resv, fence,
+ if (!xe_vma_has_no_bo(vma) && !bo->vm)
+ dma_resv_add_fence(bo->ttm.base.resv, fence,
DMA_RESV_USAGE_BOOKKEEP);
xe_pt_commit_bind(vma, entries, num_entries, rebind,
bind_pt_update.locked ? &deferred : NULL);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 1/4] drm/xe/pat: annotate pat index table with compression info Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
@ 2024-01-30 19:36 ` Juha-Pekka Heikkila
2024-01-31 11:40 ` Ville Syrjälä
2024-01-30 19:36 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
` (2 subsequent siblings)
5 siblings, 1 reply; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-30 19:36 UTC (permalink / raw)
To: intel-xe, intel-gfx
Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 722c84a56607..fab0871f0cdf 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -10,9 +10,18 @@
#include "intel_fb_pin.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
+#include "xe_pat.h"
#include <drm/ttm/ttm_bo.h>
+static bool is_compressed(const struct drm_framebuffer *fb)
+{
+ struct xe_bo *bo = intel_fb_obj(fb);
+ struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
+
+ return xe_pat_index_has_compression(xe, bo->pat_index);
+}
+
static void
write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
u32 width, u32 height, u32 src_stride, u32 dst_stride)
@@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
if (ret)
goto err;
+ if (GRAPHICS_VER(xe) >= 20) {
+ if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
+ is_compressed(&fb->base)) {
+ drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
+ ttm_bo_unreserve(&bo->ttm);
+ ret = -EINVAL;
+ goto err;
+ }
+ bo->has_sealed_pat_index = true;
+ }
+
if (IS_DGFX(xe))
ret = xe_bo_migrate(bo, XE_PL_VRAM0);
else
@@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
ttm_bo_unpin(&bo->ttm);
ttm_bo_unreserve(&bo->ttm);
err:
+ bo->has_sealed_pat_index = false;
kfree(vma);
return ERR_PTR(ret);
}
@@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
vma->bo->ggtt_node.start != vma->node.start)
xe_ggtt_remove_node(ggtt, &vma->node);
+ vma->bo->has_sealed_pat_index = false;
+
ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
ttm_bo_unpin(&vma->bo->ttm);
ttm_bo_unreserve(&vma->bo->ttm);
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
` (2 preceding siblings ...)
2024-01-30 19:36 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
@ 2024-01-30 19:36 ` Juha-Pekka Heikkila
2024-02-02 5:26 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev6) Patchwork
2024-02-02 7:09 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-01-30 19:36 UTC (permalink / raw)
To: intel-xe, intel-gfx
With Xe2 always treat tile4 as if it was using flat ccs.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 511dc1544854..43209909593f 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -948,6 +948,11 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
if (DISPLAY_VER(dev_priv) == 13)
plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
+ if (GRAPHICS_VER(dev_priv) >= 20 &&
+ fb->modifier == I915_FORMAT_MOD_4_TILED) {
+ plane_ctl |= PLANE_CTL_RENDER_DECOMPRESSION_ENABLE;
+ }
+
return plane_ctl;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-30 19:36 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
@ 2024-01-31 11:40 ` Ville Syrjälä
2024-01-31 12:09 ` Ville Syrjälä
0 siblings, 1 reply; 17+ messages in thread
From: Ville Syrjälä @ 2024-01-31 11:40 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx, intel-xe
On Tue, Jan 30, 2024 at 09:36:51PM +0200, Juha-Pekka Heikkila wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 722c84a56607..fab0871f0cdf 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -10,9 +10,18 @@
> #include "intel_fb_pin.h"
> #include "xe_ggtt.h"
> #include "xe_gt.h"
> +#include "xe_pat.h"
>
> #include <drm/ttm/ttm_bo.h>
>
> +static bool is_compressed(const struct drm_framebuffer *fb)
> +{
> + struct xe_bo *bo = intel_fb_obj(fb);
> + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> +
> + return xe_pat_index_has_compression(xe, bo->pat_index);
> +}
> +
> static void
> write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> u32 width, u32 height, u32 src_stride, u32 dst_stride)
> @@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> if (ret)
> goto err;
>
> + if (GRAPHICS_VER(xe) >= 20) {
> + if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
> + is_compressed(&fb->base)) {
> + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> + ttm_bo_unreserve(&bo->ttm);
> + ret = -EINVAL;
> + goto err;
> + }
> + bo->has_sealed_pat_index = true;
That needs to happen when the FB is created, otherwise
someone can come in afterwards and still frob the PAT
and then you're left with a FB that can not be used.
> + }
> +
> if (IS_DGFX(xe))
> ret = xe_bo_migrate(bo, XE_PL_VRAM0);
> else
> @@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> ttm_bo_unpin(&bo->ttm);
> ttm_bo_unreserve(&bo->ttm);
> err:
> + bo->has_sealed_pat_index = false;
> kfree(vma);
> return ERR_PTR(ret);
> }
> @@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
> vma->bo->ggtt_node.start != vma->node.start)
> xe_ggtt_remove_node(ggtt, &vma->node);
>
> + vma->bo->has_sealed_pat_index = false;
> +
> ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
> ttm_bo_unpin(&vma->bo->ttm);
> ttm_bo_unreserve(&vma->bo->ttm);
> --
> 2.25.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only
2024-01-31 11:40 ` Ville Syrjälä
@ 2024-01-31 12:09 ` Ville Syrjälä
0 siblings, 0 replies; 17+ messages in thread
From: Ville Syrjälä @ 2024-01-31 12:09 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx, intel-xe
On Wed, Jan 31, 2024 at 01:40:30PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 30, 2024 at 09:36:51PM +0200, Juha-Pekka Heikkila wrote:
> > Display engine support ccs only with tile4, prevent other modifiers
> > from using compressed memory.
> >
> > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> > ---
> > drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > index 722c84a56607..fab0871f0cdf 100644
> > --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> > @@ -10,9 +10,18 @@
> > #include "intel_fb_pin.h"
> > #include "xe_ggtt.h"
> > #include "xe_gt.h"
> > +#include "xe_pat.h"
> >
> > #include <drm/ttm/ttm_bo.h>
> >
> > +static bool is_compressed(const struct drm_framebuffer *fb)
> > +{
> > + struct xe_bo *bo = intel_fb_obj(fb);
> > + struct xe_device *xe = to_xe_device(to_intel_framebuffer(fb)->base.dev);
> > +
> > + return xe_pat_index_has_compression(xe, bo->pat_index);
> > +}
> > +
> > static void
> > write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_ofs,
> > u32 width, u32 height, u32 src_stride, u32 dst_stride)
> > @@ -283,6 +292,17 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> > if (ret)
> > goto err;
> >
> > + if (GRAPHICS_VER(xe) >= 20) {
> > + if (fb->base.modifier != I915_FORMAT_MOD_4_TILED &&
> > + is_compressed(&fb->base)) {
> > + drm_warn(&xe->drm, "Cannot create ccs framebuffer with other than tile4 mofifier\n");
> > + ttm_bo_unreserve(&bo->ttm);
> > + ret = -EINVAL;
> > + goto err;
> > + }
> > + bo->has_sealed_pat_index = true;
>
> That needs to happen when the FB is created, otherwise
> someone can come in afterwards and still frob the PAT
> and then you're left with a FB that can not be used.
Hmm, and there's already some kind of XE_BO_SCANOUT flag
that seems to maybe do similar things? But that one seems
to be intended to be set when creating the bo, but then it
also gets abused internally by intel_fb_bo_framebuffer_init().
Seems to be a total mess.
>
> > + }
> > +
> > if (IS_DGFX(xe))
> > ret = xe_bo_migrate(bo, XE_PL_VRAM0);
> > else
> > @@ -308,6 +328,7 @@ static struct i915_vma *__xe_pin_fb_vma(struct intel_framebuffer *fb,
> > ttm_bo_unpin(&bo->ttm);
> > ttm_bo_unreserve(&bo->ttm);
> > err:
> > + bo->has_sealed_pat_index = false;
> > kfree(vma);
> > return ERR_PTR(ret);
> > }
> > @@ -323,6 +344,8 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
> > vma->bo->ggtt_node.start != vma->node.start)
> > xe_ggtt_remove_node(ggtt, &vma->node);
> >
> > + vma->bo->has_sealed_pat_index = false;
> > +
> > ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
> > ttm_bo_unpin(&vma->bo->ttm);
> > ttm_bo_unreserve(&vma->bo->ttm);
> > --
> > 2.25.1
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure
2024-01-30 19:36 ` [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
@ 2024-01-31 18:56 ` Matt Roper
2024-02-01 14:17 ` Juha-Pekka Heikkila
0 siblings, 1 reply; 17+ messages in thread
From: Matt Roper @ 2024-01-31 18:56 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx, intel-xe
On Tue, Jan 30, 2024 at 09:36:50PM +0200, Juha-Pekka Heikkila wrote:
> Add BO bind time pat index member to xe_bo structure and store
> pat index from xe_vma to xe_bo.
>
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
> ---
> drivers/gpu/drm/xe/xe_bo_types.h | 12 ++++++++++++
> drivers/gpu/drm/xe/xe_pt.c | 22 ++++++++++++++++++----
> 2 files changed, 30 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
> index 14ef13b7b421..6d599f1e846b 100644
> --- a/drivers/gpu/drm/xe/xe_bo_types.h
> +++ b/drivers/gpu/drm/xe/xe_bo_types.h
> @@ -91,6 +91,18 @@ struct xe_bo {
>
> /** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
> struct list_head vram_userfault_link;
> +
> + /**
> + * @pat_index: The pat index requested when bind this BO
> + */
> + u16 pat_index;
> +
> + /**
> + * @has_sealed_pat_index: The pat index is sealed because this BO is
> + * pinned as framebuffer. This is to prevent flipping compression
> + * on/off from framebuffers while in use.
> + */
> + bool has_sealed_pat_index;
> };
>
> #define intel_bo_to_drm_bo(bo) (&(bo)->ttm.base)
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index de1030a47588..c72cb75d993c 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -1208,10 +1208,11 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
> struct dma_fence *fence;
> struct invalidation_fence *ifence = NULL;
> struct xe_range_fence *rfence;
> + struct xe_bo *bo = xe_vma_bo(vma);
> int err;
>
> bind_pt_update.locked = false;
> - xe_bo_assert_held(xe_vma_bo(vma));
> + xe_bo_assert_held(bo);
> xe_vm_assert_held(vm);
>
> vm_dbg(&xe_vma_vm(vma)->xe->drm,
> @@ -1252,8 +1253,21 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
> return ERR_PTR(-ENOMEM);
> }
>
> + /*
> + * On Xe2 BO which was pinned as framebuffer before with different
> + * PAT index cannot be bound with different PAT index. This is
> + * to prevent switching CCS on/off from framebuffers on the fly
> + * with Xe2.
> + */
I haven't been following all the discussion here, but why is switching
it on/off a problem? On Xe2 can't we just always turn on decompression
(assuming they were 4-tile)?
Even if a content producer puts data into the buffer using a
non-compression PAT index, my understanding is that the FlatCCS metadata
for that part of the buffer still gets updated appropriately (to 0000 or
whatever the code is for "uncompressed block"). If the decompression
bit in PLANE_CTL basically translates to "pay attention to FlatCCS" vs
"ignore FlatCCS" it shouldn't matter whether the data is truly
compressed or not, right? Since the FlatCCS area that corresponds to a
buffer is still correct even when non-compressed PAT is used (I think),
is there a reason to turn off decompression for 4-tile?
Am I overlooking something?
Matt
> + if (bo) {
> + if (bo->has_sealed_pat_index && bo->pat_index != vma->pat_index)
> + return ERR_PTR(-EINVAL);
> +
> + bo->pat_index = vma->pat_index;
> + }
> +
> fence = xe_migrate_update_pgtables(tile->migrate,
> - vm, xe_vma_bo(vma), q,
> + vm, bo, q,
> entries, num_entries,
> syncs, num_syncs,
> &bind_pt_update.base);
> @@ -1287,8 +1301,8 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
> DMA_RESV_USAGE_KERNEL :
> DMA_RESV_USAGE_BOOKKEEP);
>
> - if (!xe_vma_has_no_bo(vma) && !xe_vma_bo(vma)->vm)
> - dma_resv_add_fence(xe_vma_bo(vma)->ttm.base.resv, fence,
> + if (!xe_vma_has_no_bo(vma) && !bo->vm)
> + dma_resv_add_fence(bo->ttm.base.resv, fence,
> DMA_RESV_USAGE_BOOKKEEP);
> xe_pt_commit_bind(vma, entries, num_entries, rebind,
> bind_pt_update.locked ? &deferred : NULL);
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure
2024-01-31 18:56 ` Matt Roper
@ 2024-02-01 14:17 ` Juha-Pekka Heikkila
2024-02-01 15:02 ` Juha-Pekka Heikkila
0 siblings, 1 reply; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-02-01 14:17 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-xe, intel-gfx
On 31.1.2024 20.56, Matt Roper wrote:
> On Tue, Jan 30, 2024 at 09:36:50PM +0200, Juha-Pekka Heikkila wrote:
>> Add BO bind time pat index member to xe_bo structure and store
>> pat index from xe_vma to xe_bo.
>>
>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>> ---
>> drivers/gpu/drm/xe/xe_bo_types.h | 12 ++++++++++++
>> drivers/gpu/drm/xe/xe_pt.c | 22 ++++++++++++++++++----
>> 2 files changed, 30 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
>> index 14ef13b7b421..6d599f1e846b 100644
>> --- a/drivers/gpu/drm/xe/xe_bo_types.h
>> +++ b/drivers/gpu/drm/xe/xe_bo_types.h
>> @@ -91,6 +91,18 @@ struct xe_bo {
>>
>> /** @vram_userfault_link: Link into @mem_access.vram_userfault.list */
>> struct list_head vram_userfault_link;
>> +
>> + /**
>> + * @pat_index: The pat index requested when bind this BO
>> + */
>> + u16 pat_index;
>> +
>> + /**
>> + * @has_sealed_pat_index: The pat index is sealed because this BO is
>> + * pinned as framebuffer. This is to prevent flipping compression
>> + * on/off from framebuffers while in use.
>> + */
>> + bool has_sealed_pat_index;
>> };
>>
>> #define intel_bo_to_drm_bo(bo) (&(bo)->ttm.base)
>> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
>> index de1030a47588..c72cb75d993c 100644
>> --- a/drivers/gpu/drm/xe/xe_pt.c
>> +++ b/drivers/gpu/drm/xe/xe_pt.c
>> @@ -1208,10 +1208,11 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
>> struct dma_fence *fence;
>> struct invalidation_fence *ifence = NULL;
>> struct xe_range_fence *rfence;
>> + struct xe_bo *bo = xe_vma_bo(vma);
>> int err;
>>
>> bind_pt_update.locked = false;
>> - xe_bo_assert_held(xe_vma_bo(vma));
>> + xe_bo_assert_held(bo);
>> xe_vm_assert_held(vm);
>>
>> vm_dbg(&xe_vma_vm(vma)->xe->drm,
>> @@ -1252,8 +1253,21 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
>> return ERR_PTR(-ENOMEM);
>> }
>>
>> + /*
>> + * On Xe2 BO which was pinned as framebuffer before with different
>> + * PAT index cannot be bound with different PAT index. This is
>> + * to prevent switching CCS on/off from framebuffers on the fly
>> + * with Xe2.
>> + */
>
> I haven't been following all the discussion here, but why is switching
> it on/off a problem? On Xe2 can't we just always turn on decompression
> (assuming they were 4-tile)?
>
> Even if a content producer puts data into the buffer using a
> non-compression PAT index, my understanding is that the FlatCCS metadata
> for that part of the buffer still gets updated appropriately (to 0000 or
> whatever the code is for "uncompressed block"). If the decompression
> bit in PLANE_CTL basically translates to "pay attention to FlatCCS" vs
> "ignore FlatCCS" it shouldn't matter whether the data is truly
> compressed or not, right? Since the FlatCCS area that corresponds to a
> buffer is still correct even when non-compressed PAT is used (I think),
> is there a reason to turn off decompression for 4-tile?
>
> Am I overlooking something?
Hi Matt,
you got it correct for the case of tile4, on patch 4/4 of this set I put
decompression on unconditionally for tile4 for display when on xe2.
Problems come when we're not on tile4 but linear/x-tile where display
engine doesn't support decompression for these. These PAT indexes for
BOs are set by user space so I will not be allowed to change it and can
only deny changing pat index for BO if it was already accepted as good
configuration for display. That has_sealed_pat_index is set when
framebuffer is pinned.
Decompression for linear and x-tile is marked as not supported and I
have sas document for xe2 compression where is said sw must disable
compression for linear/x-tile.
/Juha-Pekka
>
>> + if (bo) {
>> + if (bo->has_sealed_pat_index && bo->pat_index != vma->pat_index)
>> + return ERR_PTR(-EINVAL);
>> +
>> + bo->pat_index = vma->pat_index;
>> + }
>> +
>> fence = xe_migrate_update_pgtables(tile->migrate,
>> - vm, xe_vma_bo(vma), q,
>> + vm, bo, q,
>> entries, num_entries,
>> syncs, num_syncs,
>> &bind_pt_update.base);
>> @@ -1287,8 +1301,8 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct xe_vma *vma, struct xe_exec_queue
>> DMA_RESV_USAGE_KERNEL :
>> DMA_RESV_USAGE_BOOKKEEP);
>>
>> - if (!xe_vma_has_no_bo(vma) && !xe_vma_bo(vma)->vm)
>> - dma_resv_add_fence(xe_vma_bo(vma)->ttm.base.resv, fence,
>> + if (!xe_vma_has_no_bo(vma) && !bo->vm)
>> + dma_resv_add_fence(bo->ttm.base.resv, fence,
>> DMA_RESV_USAGE_BOOKKEEP);
>> xe_pt_commit_bind(vma, entries, num_entries, rebind,
>> bind_pt_update.locked ? &deferred : NULL);
>> --
>> 2.25.1
>>
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure
2024-02-01 14:17 ` Juha-Pekka Heikkila
@ 2024-02-01 15:02 ` Juha-Pekka Heikkila
0 siblings, 0 replies; 17+ messages in thread
From: Juha-Pekka Heikkila @ 2024-02-01 15:02 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-xe, intel-gfx
On 1.2.2024 16.17, Juha-Pekka Heikkila wrote:
> On 31.1.2024 20.56, Matt Roper wrote:
>> On Tue, Jan 30, 2024 at 09:36:50PM +0200, Juha-Pekka Heikkila wrote:
>>> Add BO bind time pat index member to xe_bo structure and store
>>> pat index from xe_vma to xe_bo.
>>>
>>> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_bo_types.h | 12 ++++++++++++
>>> drivers/gpu/drm/xe/xe_pt.c | 22 ++++++++++++++++++----
>>> 2 files changed, 30 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_bo_types.h
>>> b/drivers/gpu/drm/xe/xe_bo_types.h
>>> index 14ef13b7b421..6d599f1e846b 100644
>>> --- a/drivers/gpu/drm/xe/xe_bo_types.h
>>> +++ b/drivers/gpu/drm/xe/xe_bo_types.h
>>> @@ -91,6 +91,18 @@ struct xe_bo {
>>> /** @vram_userfault_link: Link into
>>> @mem_access.vram_userfault.list */
>>> struct list_head vram_userfault_link;
>>> +
>>> + /**
>>> + * @pat_index: The pat index requested when bind this BO
>>> + */
>>> + u16 pat_index;
>>> +
>>> + /**
>>> + * @has_sealed_pat_index: The pat index is sealed because this
>>> BO is
>>> + * pinned as framebuffer. This is to prevent flipping compression
>>> + * on/off from framebuffers while in use.
>>> + */
>>> + bool has_sealed_pat_index;
>>> };
>>> #define intel_bo_to_drm_bo(bo) (&(bo)->ttm.base)
>>> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
>>> index de1030a47588..c72cb75d993c 100644
>>> --- a/drivers/gpu/drm/xe/xe_pt.c
>>> +++ b/drivers/gpu/drm/xe/xe_pt.c
>>> @@ -1208,10 +1208,11 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct
>>> xe_vma *vma, struct xe_exec_queue
>>> struct dma_fence *fence;
>>> struct invalidation_fence *ifence = NULL;
>>> struct xe_range_fence *rfence;
>>> + struct xe_bo *bo = xe_vma_bo(vma);
>>> int err;
>>> bind_pt_update.locked = false;
>>> - xe_bo_assert_held(xe_vma_bo(vma));
>>> + xe_bo_assert_held(bo);
>>> xe_vm_assert_held(vm);
>>> vm_dbg(&xe_vma_vm(vma)->xe->drm,
>>> @@ -1252,8 +1253,21 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct
>>> xe_vma *vma, struct xe_exec_queue
>>> return ERR_PTR(-ENOMEM);
>>> }
>>> + /*
>>> + * On Xe2 BO which was pinned as framebuffer before with different
>>> + * PAT index cannot be bound with different PAT index. This is
>>> + * to prevent switching CCS on/off from framebuffers on the fly
>>> + * with Xe2.
>>> + */
>>
>> I haven't been following all the discussion here, but why is switching
>> it on/off a problem? On Xe2 can't we just always turn on decompression
>> (assuming they were 4-tile)?
>>
>> Even if a content producer puts data into the buffer using a
>> non-compression PAT index, my understanding is that the FlatCCS metadata
>> for that part of the buffer still gets updated appropriately (to 0000 or
>> whatever the code is for "uncompressed block"). If the decompression
>> bit in PLANE_CTL basically translates to "pay attention to FlatCCS" vs
>> "ignore FlatCCS" it shouldn't matter whether the data is truly
>> compressed or not, right? Since the FlatCCS area that corresponds to a
>> buffer is still correct even when non-compressed PAT is used (I think),
>> is there a reason to turn off decompression for 4-tile?
>>
>> Am I overlooking something?
>
> Hi Matt,
>
> you got it correct for the case of tile4, on patch 4/4 of this set I put
> decompression on unconditionally for tile4 for display when on xe2.
>
> Problems come when we're not on tile4 but linear/x-tile where display
> engine doesn't support decompression for these. These PAT indexes for
> BOs are set by user space so I will not be allowed to change it and can
> only deny changing pat index for BO if it was already accepted as good
> configuration for display. That has_sealed_pat_index is set when
> framebuffer is pinned.
>
> Decompression for linear and x-tile is marked as not supported and I
> have sas document for xe2 compression where is said sw must disable
> compression for linear/x-tile.
>
I did just talk with Ville and we did agree we could just drop these
checks. By default everything will be decompressed and user space will
need explicitly to enable compression. Linear and x-tile will misrender
if they're compressed and with patch 4/4 from this set tile4 will work
in all cases.
>>
>>> + if (bo) {
>>> + if (bo->has_sealed_pat_index && bo->pat_index !=
>>> vma->pat_index)
>>> + return ERR_PTR(-EINVAL);
>>> +
>>> + bo->pat_index = vma->pat_index;
>>> + }
>>> +
>>> fence = xe_migrate_update_pgtables(tile->migrate,
>>> - vm, xe_vma_bo(vma), q,
>>> + vm, bo, q,
>>> entries, num_entries,
>>> syncs, num_syncs,
>>> &bind_pt_update.base);
>>> @@ -1287,8 +1301,8 @@ __xe_pt_bind_vma(struct xe_tile *tile, struct
>>> xe_vma *vma, struct xe_exec_queue
>>> DMA_RESV_USAGE_KERNEL :
>>> DMA_RESV_USAGE_BOOKKEEP);
>>> - if (!xe_vma_has_no_bo(vma) && !xe_vma_bo(vma)->vm)
>>> - dma_resv_add_fence(xe_vma_bo(vma)->ttm.base.resv, fence,
>>> + if (!xe_vma_has_no_bo(vma) && !bo->vm)
>>> + dma_resv_add_fence(bo->ttm.base.resv, fence,
>>> DMA_RESV_USAGE_BOOKKEEP);
>>> xe_pt_commit_bind(vma, entries, num_entries, rebind,
>>> bind_pt_update.locked ? &deferred : NULL);
>>> --
>>> 2.25.1
>>>
>>
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev6)
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
` (3 preceding siblings ...)
2024-01-30 19:36 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
@ 2024-02-02 5:26 ` Patchwork
2024-02-02 7:09 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2024-02-02 5:26 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3446 bytes --]
== Series Details ==
Series: Enable ccs compressed framebuffers on Xe2 (rev6)
URL : https://patchwork.freedesktop.org/series/128947/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14210 -> Patchwork_128947v6
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/index.html
Participating hosts (39 -> 36)
------------------------------
Missing (3): fi-bsw-n3050 bat-adlp-6 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_128947v6:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_create@basic@smem:
- {bat-arls-2}: [DMESG-WARN][1] ([i915#10194]) -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/bat-arls-2/igt@gem_exec_create@basic@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/bat-arls-2/igt@gem_exec_create@basic@smem.html
Known issues
------------
Here are the changes found in Patchwork_128947v6 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@gem_tiled_blits@basic:
- fi-pnv-d510: [SKIP][3] ([fdo#109271]) -> [PASS][4] +1 other test pass
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/fi-pnv-d510/igt@gem_tiled_blits@basic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/fi-pnv-d510/igt@gem_tiled_blits@basic.html
* igt@i915_selftest@live@hangcheck:
- bat-mtlp-6: [DMESG-WARN][5] ([i915#10217]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/bat-mtlp-6/igt@i915_selftest@live@hangcheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/bat-mtlp-6/igt@i915_selftest@live@hangcheck.html
- bat-adlp-9: [ABORT][7] ([i915#10021]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/bat-adlp-9/igt@i915_selftest@live@hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/bat-adlp-9/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#10021]: https://gitlab.freedesktop.org/drm/intel/issues/10021
[i915#10194]: https://gitlab.freedesktop.org/drm/intel/issues/10194
[i915#10217]: https://gitlab.freedesktop.org/drm/intel/issues/10217
Build changes
-------------
* Linux: CI_DRM_14210 -> Patchwork_128947v6
CI-20190529: 20190529
CI_DRM_14210: 18a9fefd9e05291cbe792d358bbdc04dc6d21adb @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7701: 7701
Patchwork_128947v6: 18a9fefd9e05291cbe792d358bbdc04dc6d21adb @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
589f1e1508e6 drm/i915/display: On Xe2 always enable decompression with tile4
ded2d61bb641 drm/xe/xe2: Limit ccs framebuffers to tile4 only
8185808bce2d drm/xe: add bind time pat index to xe_bo structure
f75cca1ccac6 drm/xe/pat: annotate pat index table with compression info
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/index.html
[-- Attachment #2: Type: text/html, Size: 4136 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.IGT: failure for Enable ccs compressed framebuffers on Xe2 (rev6)
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
` (4 preceding siblings ...)
2024-02-02 5:26 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev6) Patchwork
@ 2024-02-02 7:09 ` Patchwork
5 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2024-02-02 7:09 UTC (permalink / raw)
To: Juha-Pekka Heikkila; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 85306 bytes --]
== Series Details ==
Series: Enable ccs compressed framebuffers on Xe2 (rev6)
URL : https://patchwork.freedesktop.org/series/128947/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14210_full -> Patchwork_128947v6_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_128947v6_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_128947v6_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_128947v6_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@dmabuf:
- shard-mtlp: NOTRUN -> [DMESG-FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@i915_selftest@live@dmabuf.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2:
- shard-rkl: [PASS][2] -> [INCOMPLETE][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a2.html
Known issues
------------
Here are the changes found in Patchwork_128947v6_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- shard-rkl: ([PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [FAIL][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) ([i915#8293]) -> ([PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-3/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-3/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-3/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-3/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-3/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-5/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-5/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-5/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-6/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-6/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-6/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-7/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-7/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-7/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-6/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-6/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-4/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-4/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-4/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-4/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-3/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-3/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-2/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-2/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-2/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/boot.html
### IGT changes ###
#### Issues hit ####
* igt@device_reset@unbind-cold-reset-rebind:
- shard-rkl: NOTRUN -> [SKIP][52] ([i915#7701])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@device_reset@unbind-cold-reset-rebind.html
- shard-mtlp: NOTRUN -> [SKIP][53] ([i915#7701])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@device_reset@unbind-cold-reset-rebind.html
* igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_limit:
- shard-glk: NOTRUN -> [DMESG-WARN][54] ([i915#10140]) +1 other test dmesg-warn
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk6/igt@drm_buddy@drm_buddy@drm_test_buddy_alloc_limit.html
* igt@drm_fdinfo@busy-check-all@ccs3:
- shard-dg2: NOTRUN -> [SKIP][55] ([i915#8414]) +9 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@drm_fdinfo@busy-check-all@ccs3.html
* igt@drm_fdinfo@isolation@rcs0:
- shard-mtlp: NOTRUN -> [SKIP][56] ([i915#8414]) +11 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@drm_fdinfo@isolation@rcs0.html
* igt@drm_fdinfo@most-busy-check-all@rcs0:
- shard-rkl: NOTRUN -> [FAIL][57] ([i915#7742])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@drm_fdinfo@most-busy-check-all@rcs0.html
* igt@drm_mm@drm_mm@drm_test_mm_init:
- shard-dg2: NOTRUN -> [DMESG-WARN][58] ([i915#10140])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@drm_mm@drm_mm@drm_test_mm_init.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-mtlp: NOTRUN -> [SKIP][59] ([i915#9323]) +1 other test skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@gem_ccs@ctrl-surf-copy-new-ctx.html
* igt@gem_ccs@suspend-resume:
- shard-rkl: NOTRUN -> [SKIP][60] ([i915#9323])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@gem_ccs@suspend-resume.html
* igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: [PASS][61] -> [INCOMPLETE][62] ([i915#10137] / [i915#7297])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg2-2/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-2/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-rkl: NOTRUN -> [FAIL][63] ([i915#6268])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_persistence@file:
- shard-snb: NOTRUN -> [SKIP][64] ([fdo#109271] / [i915#1099])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb5/igt@gem_ctx_persistence@file.html
* igt@gem_ctx_persistence@hang:
- shard-mtlp: NOTRUN -> [SKIP][65] ([i915#8555])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@gem_ctx_persistence@hang.html
* igt@gem_ctx_persistence@heartbeat-hostile:
- shard-dg2: NOTRUN -> [SKIP][66] ([i915#8555])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@gem_ctx_persistence@heartbeat-hostile.html
* igt@gem_exec_balancer@bonded-pair:
- shard-mtlp: NOTRUN -> [SKIP][67] ([i915#4771])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gem_exec_balancer@bonded-pair.html
* igt@gem_exec_balancer@bonded-sync:
- shard-dg2: NOTRUN -> [SKIP][68] ([i915#4771])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@gem_exec_balancer@bonded-sync.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-rkl: NOTRUN -> [SKIP][69] ([i915#4525])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_balancer@sliced:
- shard-dg2: NOTRUN -> [SKIP][70] ([i915#4812])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@gem_exec_balancer@sliced.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-glk: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#6334])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk8/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_capture@many-4k-zero:
- shard-glk: NOTRUN -> [FAIL][72] ([i915#9606])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk6/igt@gem_exec_capture@many-4k-zero.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-rkl: [PASS][73] -> [FAIL][74] ([i915#2842]) +1 other test fail
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/igt@gem_exec_fair@basic-none@rcs0.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-sync:
- shard-dg2: NOTRUN -> [SKIP][75] ([i915#3539])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@gem_exec_fair@basic-sync.html
* igt@gem_exec_flush@basic-wb-ro-before-default:
- shard-dg2: NOTRUN -> [SKIP][76] ([i915#3539] / [i915#4852]) +2 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@gem_exec_flush@basic-wb-ro-before-default.html
* igt@gem_exec_gttfill@all-engines:
- shard-snb: [PASS][77] -> [INCOMPLETE][78] ([i915#10137])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb2/igt@gem_exec_gttfill@all-engines.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb1/igt@gem_exec_gttfill@all-engines.html
* igt@gem_exec_params@rsvd2-dirt:
- shard-mtlp: NOTRUN -> [SKIP][79] ([i915#5107])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@gem_exec_params@rsvd2-dirt.html
* igt@gem_exec_reloc@basic-cpu-gtt-noreloc:
- shard-rkl: NOTRUN -> [SKIP][80] ([i915#3281]) +5 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@gem_exec_reloc@basic-cpu-gtt-noreloc.html
* igt@gem_exec_reloc@basic-write-cpu-noreloc:
- shard-mtlp: NOTRUN -> [SKIP][81] ([i915#3281]) +4 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gem_exec_reloc@basic-write-cpu-noreloc.html
* igt@gem_exec_reloc@basic-write-read-active:
- shard-dg2: NOTRUN -> [SKIP][82] ([i915#3281]) +10 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@gem_exec_reloc@basic-write-read-active.html
* igt@gem_exec_schedule@reorder-wide:
- shard-dg2: NOTRUN -> [SKIP][83] ([i915#4537] / [i915#4812]) +1 other test skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@gem_exec_schedule@reorder-wide.html
* igt@gem_fence_thrash@bo-write-verify-threaded-none:
- shard-dg2: NOTRUN -> [SKIP][84] ([i915#4860])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@gem_fence_thrash@bo-write-verify-threaded-none.html
* igt@gem_lmem_swapping@basic:
- shard-mtlp: NOTRUN -> [SKIP][85] ([i915#4613]) +2 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@massive-random:
- shard-glk: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#4613]) +3 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk6/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@verify:
- shard-rkl: NOTRUN -> [SKIP][87] ([i915#4613]) +1 other test skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@gem_lmem_swapping@verify.html
* igt@gem_madvise@dontneed-before-pwrite:
- shard-dg2: NOTRUN -> [SKIP][88] ([i915#3282])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@gem_madvise@dontneed-before-pwrite.html
* igt@gem_mmap@basic-small-bo:
- shard-mtlp: NOTRUN -> [SKIP][89] ([i915#4083])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@gem_mmap@basic-small-bo.html
* igt@gem_mmap_gtt@basic-write-read:
- shard-mtlp: NOTRUN -> [SKIP][90] ([i915#4077]) +5 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gem_mmap_gtt@basic-write-read.html
* igt@gem_mmap_wc@write-wc-read-gtt:
- shard-dg2: NOTRUN -> [SKIP][91] ([i915#4083]) +2 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@gem_mmap_wc@write-wc-read-gtt.html
* igt@gem_pread@exhaustion:
- shard-glk: NOTRUN -> [INCOMPLETE][92] ([i915#10042] / [i915#10137])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk6/igt@gem_pread@exhaustion.html
* igt@gem_pxp@create-protected-buffer:
- shard-mtlp: NOTRUN -> [SKIP][93] ([i915#4270])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@gem_pxp@create-protected-buffer.html
* igt@gem_pxp@create-valid-protected-context:
- shard-dg2: NOTRUN -> [SKIP][94] ([i915#4270]) +2 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@gem_pxp@create-valid-protected-context.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-tglu: NOTRUN -> [SKIP][95] ([i915#4270])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
- shard-rkl: NOTRUN -> [SKIP][96] ([i915#4270])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html
* igt@gem_render_copy@y-tiled-to-vebox-y-tiled:
- shard-mtlp: NOTRUN -> [SKIP][97] ([i915#8428]) +4 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gem_render_copy@y-tiled-to-vebox-y-tiled.html
* igt@gem_render_tiled_blits@basic:
- shard-mtlp: NOTRUN -> [SKIP][98] ([i915#4079])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gem_render_tiled_blits@basic.html
* igt@gem_set_tiling_vs_pwrite:
- shard-rkl: NOTRUN -> [SKIP][99] ([i915#3282]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@gem_set_tiling_vs_pwrite.html
* igt@gem_softpin@evict-snoop:
- shard-dg2: NOTRUN -> [SKIP][100] ([i915#4885])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@gem_softpin@evict-snoop.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-tglu: NOTRUN -> [SKIP][101] ([fdo#109312])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gem_tiled_swapping@non-threaded:
- shard-dg2: NOTRUN -> [SKIP][102] ([i915#4077]) +6 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@gem_tiled_swapping@non-threaded.html
* igt@gem_userptr_blits@map-fixed-invalidate:
- shard-dg2: NOTRUN -> [SKIP][103] ([i915#3297] / [i915#4880])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@gem_userptr_blits@map-fixed-invalidate.html
* igt@gem_userptr_blits@readonly-unsync:
- shard-rkl: NOTRUN -> [SKIP][104] ([i915#3297]) +2 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@gem_userptr_blits@readonly-unsync.html
* igt@gem_userptr_blits@unsync-overlap:
- shard-mtlp: NOTRUN -> [SKIP][105] ([i915#3297]) +2 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gem_userptr_blits@unsync-overlap.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-tglu: NOTRUN -> [SKIP][106] ([i915#3297])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@gem_userptr_blits@unsync-unmap.html
* igt@gen3_render_mixed_blits:
- shard-dg2: NOTRUN -> [SKIP][107] ([fdo#109289])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@gen3_render_mixed_blits.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][108] -> [INCOMPLETE][109] ([i915#10137] / [i915#5566])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-glk2/igt@gen9_exec_parse@allowed-single.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk4/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@bb-large:
- shard-tglu: NOTRUN -> [SKIP][110] ([i915#2527] / [i915#2856])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@gen9_exec_parse@bb-large.html
* igt@gen9_exec_parse@bb-start-out:
- shard-rkl: NOTRUN -> [SKIP][111] ([i915#2527]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@gen9_exec_parse@bb-start-out.html
* igt@gen9_exec_parse@shadow-peek:
- shard-mtlp: NOTRUN -> [SKIP][112] ([i915#2856])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@gen9_exec_parse@shadow-peek.html
* igt@gen9_exec_parse@unaligned-access:
- shard-dg2: NOTRUN -> [SKIP][113] ([i915#2856]) +3 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_module_load@load:
- shard-glk: NOTRUN -> [SKIP][114] ([fdo#109271] / [i915#6227])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk6/igt@i915_module_load@load.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-snb: [PASS][115] -> [INCOMPLETE][116] ([i915#10137] / [i915#9200] / [i915#9849])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb4/igt@i915_module_load@reload-with-fault-injection.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb6/igt@i915_module_load@reload-with-fault-injection.html
- shard-dg2: [PASS][117] -> [INCOMPLETE][118] ([i915#10137] / [i915#9849])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg2-5/igt@i915_module_load@reload-with-fault-injection.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_freq_api@freq-suspend:
- shard-rkl: NOTRUN -> [SKIP][119] ([i915#8399]) +1 other test skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@i915_pm_freq_api@freq-suspend.html
* igt@i915_pm_rpm@system-suspend-devices:
- shard-tglu: [PASS][120] -> [ABORT][121] ([i915#8213])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-tglu-7/igt@i915_pm_rpm@system-suspend-devices.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-9/igt@i915_pm_rpm@system-suspend-devices.html
* igt@i915_pm_rps@reset:
- shard-tglu: [PASS][122] -> [INCOMPLETE][123] ([i915#10137])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-tglu-6/igt@i915_pm_rps@reset.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-10/igt@i915_pm_rps@reset.html
- shard-mtlp: NOTRUN -> [FAIL][124] ([i915#8346])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@i915_pm_rps@reset.html
* igt@i915_query@hwconfig_table:
- shard-rkl: NOTRUN -> [SKIP][125] ([i915#6245])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@i915_query@hwconfig_table.html
* igt@i915_query@query-topology-coherent-slice-mask:
- shard-mtlp: NOTRUN -> [SKIP][126] ([i915#6188])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@i915_query@query-topology-coherent-slice-mask.html
* igt@i915_selftest@mock@memory_region:
- shard-snb: NOTRUN -> [DMESG-WARN][127] ([i915#9311])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb5/igt@i915_selftest@mock@memory_region.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-tglu: NOTRUN -> [INCOMPLETE][128] ([i915#7443])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-dg2: NOTRUN -> [SKIP][129] ([i915#5190]) +6 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- shard-mtlp: NOTRUN -> [SKIP][130] ([i915#4212])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][131] ([i915#2521])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk6/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-hdmi-a-1.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc:
- shard-rkl: NOTRUN -> [SKIP][132] ([i915#8709]) +3 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs:
- shard-dg1: NOTRUN -> [SKIP][133] ([i915#8709]) +7 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-12/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs.html
* igt@kms_async_flips@test-cursor:
- shard-mtlp: NOTRUN -> [SKIP][134] ([i915#6229])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_async_flips@test-cursor.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-mtlp: NOTRUN -> [SKIP][135] ([i915#3555])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-mtlp: NOTRUN -> [SKIP][136] ([i915#1769] / [i915#3555])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-dg2: NOTRUN -> [SKIP][137] ([i915#1769] / [i915#3555])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
- shard-glk: NOTRUN -> [SKIP][138] ([fdo#109271] / [i915#1769])
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk8/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-rkl: NOTRUN -> [SKIP][139] ([i915#5286]) +2 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [PASS][140] -> [FAIL][141] ([i915#5138])
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][142] ([fdo#111614])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][143] ([fdo#111614] / [i915#3638])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][144] ([fdo#111614]) +1 other test skip
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-mtlp: NOTRUN -> [SKIP][145] ([fdo#111615]) +5 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][146] ([fdo#110723]) +1 other test skip
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
- shard-dg2: NOTRUN -> [SKIP][147] ([i915#4538] / [i915#5190]) +6 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
- shard-tglu: NOTRUN -> [SKIP][148] ([fdo#111615]) +1 other test skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_joiner@2x-modeset:
- shard-dg2: NOTRUN -> [SKIP][149] ([i915#2705])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_big_joiner@2x-modeset.html
* igt@kms_ccs@pipe-a-bad-aux-stride-y-tiled-ccs:
- shard-mtlp: NOTRUN -> [SKIP][150] ([i915#5354] / [i915#6095]) +13 other tests skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_ccs@pipe-a-bad-aux-stride-y-tiled-ccs.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-yf-tiled-ccs:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#5354]) +50 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-yf-tiled-ccs.html
* igt@kms_ccs@pipe-b-random-ccs-data-yf-tiled-ccs:
- shard-rkl: NOTRUN -> [SKIP][152] ([i915#5354] / [i915#6095]) +10 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_ccs@pipe-b-random-ccs-data-yf-tiled-ccs.html
* igt@kms_ccs@pipe-d-bad-rotation-90-4-tiled-mtl-rc-ccs:
- shard-rkl: NOTRUN -> [SKIP][153] ([i915#5354]) +15 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_ccs@pipe-d-bad-rotation-90-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@pipe-d-crc-primary-basic-4-tiled-dg2-rc-ccs:
- shard-tglu: NOTRUN -> [SKIP][154] ([i915#5354] / [i915#6095]) +10 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_ccs@pipe-d-crc-primary-basic-4-tiled-dg2-rc-ccs.html
* igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][155] ([i915#7213]) +3 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html
* igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][156] ([i915#4087]) +3 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_cdclk@plane-scaling@pipe-d-hdmi-a-1.html
* igt@kms_chamelium_audio@dp-audio:
- shard-mtlp: NOTRUN -> [SKIP][157] ([i915#7828]) +5 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_chamelium_audio@dp-audio.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-dg2: NOTRUN -> [SKIP][158] ([fdo#111827])
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
- shard-dg2: NOTRUN -> [SKIP][159] ([i915#7828]) +6 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html
* igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
- shard-rkl: NOTRUN -> [SKIP][160] ([i915#7828]) +3 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-tglu: NOTRUN -> [SKIP][161] ([i915#7828]) +2 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_content_protection@atomic-dpms:
- shard-rkl: NOTRUN -> [SKIP][162] ([i915#7118])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@content-type-change:
- shard-tglu: NOTRUN -> [SKIP][163] ([i915#6944] / [i915#9424])
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-mtlp: NOTRUN -> [SKIP][164] ([i915#3299])
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-dg2: NOTRUN -> [SKIP][165] ([i915#3299])
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@legacy:
- shard-dg2: NOTRUN -> [SKIP][166] ([i915#7118])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@cursor-offscreen-64x21:
- shard-mtlp: NOTRUN -> [SKIP][167] ([i915#8814])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_cursor_crc@cursor-offscreen-64x21.html
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- shard-tglu: NOTRUN -> [SKIP][168] ([i915#3555])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_cursor_crc@cursor-offscreen-max-size.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#3359]) +1 other test skip
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-rkl: NOTRUN -> [SKIP][170] ([i915#3359])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_cursor_crc@cursor-random-512x170.html
- shard-mtlp: NOTRUN -> [SKIP][171] ([i915#3359])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-dg2: NOTRUN -> [SKIP][172] ([i915#3555]) +4 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-rkl: NOTRUN -> [SKIP][173] ([i915#3555]) +1 other test skip
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_cursor_crc@cursor-sliding-32x10.html
- shard-mtlp: NOTRUN -> [SKIP][174] ([i915#3555] / [i915#8814])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-dg2: NOTRUN -> [SKIP][175] ([fdo#109274] / [fdo#111767] / [i915#5354])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-rkl: NOTRUN -> [SKIP][176] ([fdo#111825]) +5 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
- shard-mtlp: NOTRUN -> [SKIP][177] ([i915#9809])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
- shard-dg2: NOTRUN -> [SKIP][178] ([fdo#109274] / [i915#5354]) +2 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-tglu: NOTRUN -> [SKIP][179] ([fdo#109274] / [fdo#111767])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
- shard-tglu: NOTRUN -> [SKIP][180] ([i915#9067])
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-mtlp: NOTRUN -> [SKIP][181] ([i915#4213])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][182] ([fdo#110189] / [i915#9723])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-3/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-hdmi-a-2.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-vga-1:
- shard-snb: NOTRUN -> [SKIP][183] ([fdo#109271] / [fdo#110189])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb7/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-vga-1.html
* igt@kms_display_modes@mst-extended-mode-negative:
- shard-tglu: NOTRUN -> [SKIP][184] ([i915#8588])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_display_modes@mst-extended-mode-negative.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][185] ([i915#3804])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-2/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][186] ([i915#3555] / [i915#8812])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_dsc@dsc-basic:
- shard-dg2: NOTRUN -> [SKIP][187] ([i915#3555] / [i915#3840])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-dg2: NOTRUN -> [SKIP][188] ([i915#3840] / [i915#9688])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-dg2: NOTRUN -> [SKIP][189] ([i915#3840])
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_dsc@dsc-with-bpc:
- shard-mtlp: NOTRUN -> [SKIP][190] ([i915#3555] / [i915#3840])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-rkl: NOTRUN -> [SKIP][191] ([i915#3840] / [i915#9053])
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: NOTRUN -> [SKIP][192] ([fdo#110189] / [i915#3955])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@display-3x:
- shard-rkl: NOTRUN -> [SKIP][193] ([i915#1839])
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@psr2:
- shard-rkl: NOTRUN -> [SKIP][194] ([i915#658])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
- shard-rkl: NOTRUN -> [SKIP][195] ([fdo#111767] / [fdo#111825]) +1 other test skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
- shard-dg2: NOTRUN -> [SKIP][196] ([fdo#109274]) +7 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html
* igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][197] ([i915#3637]) +6 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][198] ([i915#2672]) +2 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][199] ([i915#2672]) +1 other test skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][200] ([i915#2587] / [i915#2672]) +1 other test skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][201] ([i915#2672])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][202] ([i915#2672] / [i915#3555])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
- shard-tglu: NOTRUN -> [SKIP][203] ([fdo#109280]) +8 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite:
- shard-snb: [PASS][204] -> [SKIP][205] ([fdo#109271]) +13 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][206] ([i915#8708]) +12 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-rkl: NOTRUN -> [SKIP][207] ([fdo#111767] / [fdo#111825] / [i915#1825])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite:
- shard-dg2: NOTRUN -> [SKIP][208] ([i915#3458]) +11 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-render:
- shard-dg2: NOTRUN -> [SKIP][209] ([fdo#111767] / [i915#5354]) +2 other tests skip
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][210] ([i915#8708]) +5 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-dg2: NOTRUN -> [SKIP][211] ([i915#9766])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-glk: NOTRUN -> [SKIP][212] ([fdo#109271]) +217 other tests skip
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
- shard-rkl: NOTRUN -> [SKIP][213] ([i915#3023]) +11 other tests skip
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu:
- shard-tglu: NOTRUN -> [SKIP][214] ([fdo#110189]) +5 other tests skip
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][215] ([fdo#111825] / [i915#1825]) +16 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-pwrite:
- shard-mtlp: NOTRUN -> [SKIP][216] ([i915#1825]) +13 other tests skip
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2: NOTRUN -> [SKIP][217] ([i915#3555] / [i915#8228])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-tglu: NOTRUN -> [SKIP][218] ([i915#3555] / [i915#8228])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_panel_fitting@legacy:
- shard-rkl: NOTRUN -> [SKIP][219] ([i915#6301])
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][220] ([i915#4573]) +1 other test fail
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk8/igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1.html
* igt@kms_plane_lowres@tiling-4@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][221] ([i915#3582]) +3 other tests skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_plane_lowres@tiling-4@pipe-b-edp-1.html
* igt@kms_plane_lowres@tiling-yf:
- shard-dg2: NOTRUN -> [SKIP][222] ([i915#3555] / [i915#8821])
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][223] ([i915#9423]) +3 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a-hdmi-a-3.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][224] ([i915#5176]) +3 other tests skip
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-edp-1.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][225] ([i915#9423]) +7 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-18/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-b-hdmi-a-4.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][226] ([i915#9423]) +3 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][227] ([i915#9423]) +11 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a-hdmi-a-2.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][228] ([i915#5176] / [i915#9423]) +3 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-13/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-3.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-b-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][229] ([i915#5235] / [i915#9423]) +19 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-b-hdmi-a-3.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][230] ([i915#5235]) +7 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-12/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-3.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][231] ([i915#5235]) +5 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a-edp-1.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][232] ([i915#5235]) +7 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][233] ([i915#3555] / [i915#5235]) +1 other test skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-d-edp-1.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-tglu: NOTRUN -> [SKIP][234] ([i915#9812])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc5-dpms-negative:
- shard-mtlp: NOTRUN -> [SKIP][235] ([i915#9293])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_pm_dc@dc5-dpms-negative.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-dg2: NOTRUN -> [SKIP][236] ([i915#9340])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-rkl: [PASS][237] -> [SKIP][238] ([i915#9519]) +3 other tests skip
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-pc8-residency-stress:
- shard-mtlp: NOTRUN -> [SKIP][239] ([fdo#109293])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_pm_rpm@modeset-pc8-residency-stress.html
- shard-rkl: NOTRUN -> [SKIP][240] ([fdo#109293] / [fdo#109506])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_pm_rpm@modeset-pc8-residency-stress.html
* igt@kms_prime@basic-crc-hybrid:
- shard-mtlp: NOTRUN -> [SKIP][241] ([i915#6524])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-rkl: NOTRUN -> [SKIP][242] ([i915#9683]) +1 other test skip
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-tglu: NOTRUN -> [SKIP][243] ([fdo#111068] / [i915#9683])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
- shard-dg2: NOTRUN -> [SKIP][244] ([i915#9683])
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-tglu: NOTRUN -> [SKIP][245] ([fdo#109642] / [fdo#111068] / [i915#9683])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-rkl: NOTRUN -> [SKIP][246] ([i915#9685])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@sprite-rotation-270:
- shard-snb: NOTRUN -> [SKIP][247] ([fdo#109271]) +81 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb5/igt@kms_rotation_crc@sprite-rotation-270.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-mtlp: NOTRUN -> [SKIP][248] ([i915#4235]) +1 other test skip
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_clip_offset:
- shard-tglu: [PASS][249] -> [DMESG-WARN][250] ([i915#10143])
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-tglu-6/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_clip_offset.html
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-9/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_clip_offset.html
- shard-mtlp: [PASS][251] -> [DMESG-WARN][252] ([i915#10143])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-mtlp-2/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_clip_offset.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-2/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_clip_offset.html
* igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_swab:
- shard-dg1: [PASS][253] -> [DMESG-WARN][254] ([i915#10143])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg1-17/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_swab.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-17/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_swab.html
* igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_xrgb8888_to_abgr8888:
- shard-rkl: [PASS][255] -> [DMESG-WARN][256] ([i915#10143]) +1 other test dmesg-warn
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-5/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_xrgb8888_to_abgr8888.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_xrgb8888_to_abgr8888.html
* igt@kms_tv_load_detect@load-detect:
- shard-mtlp: NOTRUN -> [SKIP][257] ([fdo#109309])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@kms_tv_load_detect@load-detect.html
- shard-rkl: NOTRUN -> [SKIP][258] ([fdo#109309])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@kms_tv_load_detect@load-detect.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-3:
- shard-dg1: [PASS][259] -> [FAIL][260] ([i915#9196])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg1-13/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-3.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-12/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-3.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-mtlp: NOTRUN -> [SKIP][261] ([i915#2437])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_writeback@writeback-invalid-parameters.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-mtlp: NOTRUN -> [SKIP][262] ([fdo#109289]) +1 other test skip
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@perf@global-sseu-config:
- shard-mtlp: NOTRUN -> [SKIP][263] ([i915#7387])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@perf@global-sseu-config.html
* igt@perf_pmu@cpu-hotplug:
- shard-dg2: NOTRUN -> [SKIP][264] ([i915#8850])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@perf_pmu@cpu-hotplug.html
* igt@perf_pmu@frequency@gt0:
- shard-dg2: NOTRUN -> [FAIL][265] ([i915#6806])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@perf_pmu@frequency@gt0.html
* igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem:
- shard-dg2: NOTRUN -> [CRASH][266] ([i915#9351])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@prime_mmap@test_aperture_limit@test_aperture_limit-smem.html
* igt@prime_vgem@basic-fence-flip:
- shard-dg2: NOTRUN -> [SKIP][267] ([i915#3708])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-write:
- shard-dg2: NOTRUN -> [SKIP][268] ([i915#3291] / [i915#3708])
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-10/igt@prime_vgem@basic-write.html
* igt@prime_vgem@fence-read-hang:
- shard-tglu: NOTRUN -> [SKIP][269] ([fdo#109295])
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@prime_vgem@fence-read-hang.html
* igt@syncobj_timeline@invalid-wait-zero-handles:
- shard-dg2: NOTRUN -> [FAIL][270] ([i915#9781])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@syncobj_timeline@invalid-wait-zero-handles.html
- shard-glk: NOTRUN -> [FAIL][271] ([i915#9781])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-glk8/igt@syncobj_timeline@invalid-wait-zero-handles.html
* igt@v3d/v3d_create_bo@create-bo-0:
- shard-dg2: NOTRUN -> [SKIP][272] ([i915#2575]) +9 other tests skip
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-5/igt@v3d/v3d_create_bo@create-bo-0.html
* igt@v3d/v3d_perfmon@create-perfmon-invalid-counters:
- shard-mtlp: NOTRUN -> [SKIP][273] ([i915#2575]) +4 other tests skip
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@v3d/v3d_perfmon@create-perfmon-invalid-counters.html
* igt@v3d/v3d_perfmon@get-values-invalid-perfmon:
- shard-tglu: NOTRUN -> [SKIP][274] ([fdo#109315] / [i915#2575]) +3 other tests skip
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@v3d/v3d_perfmon@get-values-invalid-perfmon.html
* igt@v3d/v3d_submit_cl@bad-perfmon:
- shard-rkl: NOTRUN -> [SKIP][275] ([fdo#109315]) +4 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@v3d/v3d_submit_cl@bad-perfmon.html
* igt@vc4/vc4_purgeable_bo@free-purged-bo:
- shard-tglu: NOTRUN -> [SKIP][276] ([i915#2575])
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-2/igt@vc4/vc4_purgeable_bo@free-purged-bo.html
* igt@vc4/vc4_purgeable_bo@mark-unpurgeable-check-retained:
- shard-rkl: NOTRUN -> [SKIP][277] ([i915#7711]) +2 other tests skip
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-1/igt@vc4/vc4_purgeable_bo@mark-unpurgeable-check-retained.html
- shard-mtlp: NOTRUN -> [SKIP][278] ([i915#7711]) +3 other tests skip
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-8/igt@vc4/vc4_purgeable_bo@mark-unpurgeable-check-retained.html
* igt@vc4/vc4_tiling@set-bad-modifier:
- shard-dg2: NOTRUN -> [SKIP][279] ([i915#7711]) +6 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-7/igt@vc4/vc4_tiling@set-bad-modifier.html
#### Possible fixes ####
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- shard-rkl: [FAIL][280] ([i915#7742]) -> [PASS][281]
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@gem_eio@reset-stress:
- shard-dg1: [FAIL][282] ([i915#5784]) -> [PASS][283]
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg1-12/igt@gem_eio@reset-stress.html
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-18/igt@gem_eio@reset-stress.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-rkl: [FAIL][284] ([i915#2842]) -> [PASS][285] +1 other test pass
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@gem_exec_fair@basic-pace-solo@rcs0.html
- shard-tglu: [FAIL][286] ([i915#2842]) -> [PASS][287]
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-tglu-3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_suspend@basic-s0@smem:
- shard-dg1: [DMESG-WARN][288] ([i915#4423]) -> [PASS][289] +2 other tests pass
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg1-12/igt@gem_exec_suspend@basic-s0@smem.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-13/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0:
- shard-dg1: [FAIL][290] ([i915#3591]) -> [PASS][291]
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg1-19/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@gt0-bcs0.html
* igt@i915_suspend@basic-s3-without-i915:
- shard-rkl: [FAIL][292] ([i915#10031]) -> [PASS][293]
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-6/igt@i915_suspend@basic-s3-without-i915.html
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-2/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-mtlp: [FAIL][294] ([i915#5138]) -> [PASS][295]
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-mtlp-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-snb: [SKIP][296] ([fdo#109271]) -> [PASS][297] +9 other tests pass
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb5/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb7/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_plane_cursor@overlay@pipe-d-edp-1-size-64:
- shard-mtlp: [DMESG-WARN][298] ([i915#1982]) -> [PASS][299]
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-mtlp-4/igt@kms_plane_cursor@overlay@pipe-d-edp-1-size-64.html
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-1/igt@kms_plane_cursor@overlay@pipe-d-edp-1-size-64.html
* igt@kms_pm_dc@dc6-dpms:
- shard-tglu: [FAIL][300] ([i915#9295]) -> [PASS][301]
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-tglu-6/igt@kms_pm_dc@dc6-dpms.html
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-10/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-dg2: [SKIP][302] ([i915#9519]) -> [PASS][303]
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg2-10/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-1/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-rkl: [SKIP][304] ([i915#9519]) -> [PASS][305] +2 other tests pass
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-3/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_swab:
- shard-tglu: [DMESG-WARN][306] ([i915#10143]) -> [PASS][307] +1 other test pass
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-tglu-6/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_swab.html
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-9/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_swab.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-3:
- shard-dg1: [FAIL][308] ([i915#9196]) -> [PASS][309]
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg1-13/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-3.html
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-12/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-3.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
- shard-snb: [FAIL][310] ([i915#9196]) -> [PASS][311]
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb4/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb1/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
#### Warnings ####
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg1: [INCOMPLETE][312] ([i915#10137] / [i915#9849]) -> [INCOMPLETE][313] ([i915#10137] / [i915#9820] / [i915#9849])
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg1-15/igt@i915_module_load@reload-with-fault-injection.html
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg1-12/igt@i915_module_load@reload-with-fault-injection.html
- shard-mtlp: [ABORT][314] ([i915#10131] / [i915#9820]) -> [ABORT][315] ([i915#10131] / [i915#9697])
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-mtlp-3/igt@i915_module_load@reload-with-fault-injection.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2: [SKIP][316] ([i915#4087] / [i915#7213]) -> [SKIP][317] ([i915#7213])
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-dg2-2/igt@kms_cdclk@mode-transition-all-outputs.html
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-dg2-2/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_content_protection@srm:
- shard-snb: [INCOMPLETE][318] ([i915#8816]) -> [SKIP][319] ([fdo#109271])
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb7/igt@kms_content_protection@srm.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb6/igt@kms_content_protection@srm.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-snb: [SKIP][320] ([fdo#109271]) -> [SKIP][321] ([fdo#109271] / [fdo#111767]) +2 other tests skip
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff:
- shard-snb: [SKIP][322] ([fdo#109271] / [fdo#111767]) -> [SKIP][323] ([fdo#109271]) +1 other test skip
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-snb5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-snb7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-rkl: [SKIP][324] ([i915#4816]) -> [SKIP][325] ([i915#4070] / [i915#4816])
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: [SKIP][326] ([i915#3361]) -> [SKIP][327] ([i915#4281])
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-1/igt@kms_pm_dc@dc9-dpms.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-5/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list:
- shard-rkl: [DMESG-FAIL][328] ([i915#10143]) -> [FAIL][329] ([i915#10136])
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-rkl-5/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list.html
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-rkl-7/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list.html
- shard-tglu: [FAIL][330] ([i915#10136]) -> [DMESG-FAIL][331] ([i915#10143])
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14210/shard-tglu-6/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/shard-tglu-9/igt@kms_selftest@drm_format_helper@drm_format_helper_test-drm_test_fb_build_fourcc_list.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#10031]: https://gitlab.freedesktop.org/drm/intel/issues/10031
[i915#10042]: https://gitlab.freedesktop.org/drm/intel/issues/10042
[i915#10131]: https://gitlab.freedesktop.org/drm/intel/issues/10131
[i915#10136]: https://gitlab.freedesktop.org/drm/intel/issues/10136
[i915#10137]: https://gitlab.freedesktop.org/drm/intel/issues/10137
[i915#10140]: https://gitlab.freedesktop.org/drm/intel/issues/10140
[i915#10143]: https://gitlab.freedesktop.org/drm/intel/issues/10143
[i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3582]: https://gitlab.freedesktop.org/drm/intel/issues/3582
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/intel/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#5107]: https://gitlab.freedesktop.org/drm/intel/issues/5107
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6188]: https://gitlab.freedesktop.org/drm/intel/issues/6188
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6229]: https://gitlab.freedesktop.org/drm/intel/issues/6229
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6806]: https://gitlab.freedesktop.org/drm/intel/issues/6806
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
[i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
[i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
[i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
[i915#8346]: https://gitlab.freedesktop.org/drm/intel/issues/8346
[i915#8399]: https://gitlab.freedesktop.org/drm/intel/issues/8399
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
[i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
[i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
[i915#8816]: https://gitlab.freedesktop.org/drm/intel/issues/8816
[i915#8821]: https://gitlab.freedesktop.org/drm/intel/issues/8821
[i915#8850]: https://gitlab.freedesktop.org/drm/intel/issues/8850
[i915#9053]: https://gitlab.freedesktop.org/drm/intel/issues/9053
[i915#9067]: https://gitlab.freedesktop.org/drm/intel/issues/9067
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9200]: https://gitlab.freedesktop.org/drm/intel/issues/9200
[i915#9293]: https://gitlab.freedesktop.org/drm/intel/issues/9293
[i915#9295]: https://gitlab.freedesktop.org/drm/intel/issues/9295
[i915#9311]: https://gitlab.freedesktop.org/drm/intel/issues/9311
[i915#9323]: https://gitlab.freedesktop.org/drm/intel/issues/9323
[i915#9340]: https://gitlab.freedesktop.org/drm/intel/issues/9340
[i915#9351]: https://gitlab.freedesktop.org/drm/intel/issues/9351
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
[i915#9606]: https://gitlab.freedesktop.org/drm/intel/issues/9606
[i915#9683]: https://gitlab.freedesktop.org/drm/intel/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/intel/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/intel/issues/9688
[i915#9697]: https://gitlab.freedesktop.org/drm/intel/issues/9697
[i915#9723]: https://gitlab.freedesktop.org/drm/intel/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/intel/issues/9732
[i915#9766]: https://gitlab.freedesktop.org/drm/intel/issues/9766
[i915#9781]: https://gitlab.freedesktop.org/drm/intel/issues/9781
[i915#9808]: https://gitlab.freedesktop.org/drm/intel/issues/9808
[i915#9809]: https://gitlab.freedesktop.org/drm/intel/issues/9809
[i915#9812]: https://gitlab.freedesktop.org/drm/intel/issues/9812
[i915#9820]: https://gitlab.freedesktop.org/drm/intel/issues/9820
[i915#9849]: https://gitlab.freedesktop.org/drm/intel/issues/9849
Build changes
-------------
* Linux: CI_DRM_14210 -> Patchwork_128947v6
CI-20190529: 20190529
CI_DRM_14210: 18a9fefd9e05291cbe792d358bbdc04dc6d21adb @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7701: 7701
Patchwork_128947v6: 18a9fefd9e05291cbe792d358bbdc04dc6d21adb @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128947v6/index.html
[-- Attachment #2: Type: text/html, Size: 103198 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2024-02-02 7:09 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-01-30 19:36 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 1/4] drm/xe/pat: annotate pat index table with compression info Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 2/4] drm/xe: add bind time pat index to xe_bo structure Juha-Pekka Heikkila
2024-01-31 18:56 ` Matt Roper
2024-02-01 14:17 ` Juha-Pekka Heikkila
2024-02-01 15:02 ` Juha-Pekka Heikkila
2024-01-30 19:36 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-31 11:40 ` Ville Syrjälä
2024-01-31 12:09 ` Ville Syrjälä
2024-01-30 19:36 ` [PATCH 4/4] drm/i915/display: On Xe2 always enable decompression with tile4 Juha-Pekka Heikkila
2024-02-02 5:26 ` ✓ Fi.CI.BAT: success for Enable ccs compressed framebuffers on Xe2 (rev6) Patchwork
2024-02-02 7:09 ` ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2024-01-18 15:27 [PATCH 0/4] Enable ccs compressed framebuffers on Xe2 Juha-Pekka Heikkila
2024-01-18 15:27 ` [PATCH 3/4] drm/xe/xe2: Limit ccs framebuffers to tile4 only Juha-Pekka Heikkila
2024-01-19 11:48 ` Jani Nikula
2024-01-19 12:08 ` Juha-Pekka Heikkila
2024-01-19 15:22 ` Matthew Auld
2024-01-22 18:27 ` Juha-Pekka Heikkila
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