From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 10/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VSYNC
Date: Thu, 9 May 2024 21:52:26 -0400 [thread overview]
Message-ID: <Zj192vT73b68t2FU@intel.com> (raw)
In-Reply-To: <61b464bedfd75a97ca214e066be5417d790ccb26.1715183162.git.jani.nikula@intel.com>
On Wed, May 08, 2024 at 06:47:56PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_VRR_VSYNC register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 9 ++++++---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 5031b7ac8007..fbfece3f687c 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -265,7 +265,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
> TRANS_PUSH_EN);
>
> if (HAS_AS_SDP(dev_priv))
> - intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),
> + intel_de_write(dev_priv,
> + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder),
> VRR_VSYNC_END(crtc_state->vrr.vsync_end) |
> VRR_VSYNC_START(crtc_state->vrr.vsync_start));
>
> @@ -290,7 +291,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state)
> intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), 0);
>
> if (HAS_AS_SDP(dev_priv))
> - intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), 0);
> + intel_de_write(dev_priv,
> + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder), 0);
> }
>
> void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
> @@ -326,7 +328,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>
> if (HAS_AS_SDP(dev_priv)) {
> trans_vrr_vsync =
> - intel_de_read(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder));
> + intel_de_read(dev_priv,
> + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder));
> crtc_state->vrr.vsync_start =
> REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync);
> crtc_state->vrr.vsync_end =
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9d443365b85a..7af0623bb9b5 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1322,7 +1322,7 @@
> #define TRANS_PUSH_SEND REG_BIT(30)
>
> #define _TRANS_VRR_VSYNC_A 0x60078
> -#define TRANS_VRR_VSYNC(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A)
> +#define TRANS_VRR_VSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A)
> #define VRR_VSYNC_END_MASK REG_GENMASK(28, 16)
> #define VRR_VSYNC_END(vsync_end) REG_FIELD_PREP(VRR_VSYNC_END_MASK, (vsync_end))
> #define VRR_VSYNC_START_MASK REG_GENMASK(12, 0)
> --
> 2.39.2
>
next prev parent reply other threads:[~2024-05-10 1:52 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-08 15:47 [PATCH 00/10] drm/i915/display: remove implicit dev_priv from VRR Jani Nikula
2024-05-08 15:47 ` [PATCH 01/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_CTL Jani Nikula
2024-05-10 1:47 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 02/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VMAX Jani Nikula
2024-05-10 1:48 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 03/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VMIN Jani Nikula
2024-05-10 1:48 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 04/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VMAXSHIFT Jani Nikula
2024-05-10 1:49 ` Rodrigo Vivi
2024-05-10 8:48 ` Jani Nikula
2024-05-08 15:47 ` [PATCH 05/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_STATUS Jani Nikula
2024-05-10 1:50 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 06/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VTOTAL_PREV Jani Nikula
2024-05-10 1:50 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 07/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_FLIPLINE Jani Nikula
2024-05-10 1:51 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 08/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_STATUS2 Jani Nikula
2024-05-10 1:51 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 09/10] drm/i915: pass dev_priv explicitly to TRANS_PUSH Jani Nikula
2024-05-10 1:52 ` Rodrigo Vivi
2024-05-08 15:47 ` [PATCH 10/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VSYNC Jani Nikula
2024-05-10 1:52 ` Rodrigo Vivi [this message]
2024-05-08 16:40 ` ✓ Fi.CI.BAT: success for drm/i915/display: remove implicit dev_priv from VRR Patchwork
2024-05-08 16:41 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
2024-05-09 7:53 ` ✓ Fi.CI.IGT: success " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Zj192vT73b68t2FU@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).