[PATCH 00/20] drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage

[PATCH 00/20] drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Here's an idea for a slightly better heuristic to answer
the "should fbdev use stolen or not?" question.

Ended up with a pile of refactoring and cleanups in
the FBC code as a result.

Ville Syrjälä (20):
  drm/i915/fbc: Extract intel_fbc_has_fences()
  drm/i915/fbc: Convert to intel_display, mostly
  drm/i915/fbc: s/_intel_fbc_cfb_stride()/intel_fbc_plane_cfb_stride()/
  drm/i915/fbc: Extract intel_fbc_max_plane_size()
  drm/i915/fbc: Extract intel_fbc_max_surface_size()
  drm/i915/fbc:
    s/intel_fbc_hw_tracking_covers_screen()/intel_fbc_surface_size_ok()/
  drm/i915/fbc: Adjust g4x+ platform checks
  drm/i915/fbc: Extract _intel_fbc_cfb_stride()
  drm/i915/fbc: s/lines/height/
  drm/i915/fbc: Reoder CFB max height platform checks
  drm/i915/fbc: Extract intel_fbc_max_cfb_height()
  drm/i915/fbc: Extract _intel_fbc_cfb_size()
  drm/i915/fbc: Extract intel_fbc_cfb_cpp()
  drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()
  drm/xe/fbdev: Fix BIOS FB vs.s stolen size checke
  drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()
  drm/xe/fbdev: Extract intel_fbdev_fb_prefer_stolen()
  drm/xe/fbdev: Use the same logic for fbdev stolen takever and fresh
    allocation
  drm/i915/fbdev: Adjust fbdev stolen mem usage heuristic
  drm/xe/fbdev: Adjust fbdev stolen mem usage heuristic

 .../drm/i915/display/intel_display_debugfs.c  |   4 +-
 .../drm/i915/display/intel_display_driver.c   |   4 +-
 drivers/gpu/drm/i915/display/intel_fbc.c      | 564 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_fbc.h      |  14 +-
 drivers/gpu/drm/i915/display/intel_fbdev_fb.c |  23 +-
 drivers/gpu/drm/i915/display/intel_fbdev_fb.h |   5 +-
 .../drm/i915/display/intel_fifo_underrun.c    |   2 +-
 .../drm/i915/display/intel_modeset_setup.c    |   2 +-
 .../drm/i915/display/intel_plane_initial.c    |  10 +-
 drivers/gpu/drm/xe/display/intel_fbdev_fb.c   |  22 +-
 drivers/gpu/drm/xe/display/xe_plane_initial.c |   8 +-
 11 files changed, 389 insertions(+), 269 deletions(-)

-- 
2.44.2

[PATCH 01/20] drm/i915/fbc: Extract intel_fbc_has_fences()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the "do we have fences?" check into a single helper in the FBC
code. Avoids having to call to outside the display code in multiple
places for this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 8488f82143a4..ba9820d4b78f 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -229,6 +229,11 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
 	return 0;
 }
 
+static bool intel_fbc_has_fences(struct drm_i915_private *i915)
+{
+	return intel_gt_support_legacy_fencing(to_gt(i915));
+}
+
 static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
@@ -620,7 +625,7 @@ static void ivb_fbc_activate(struct intel_fbc *fbc)
 	else if (DISPLAY_VER(i915) == 9)
 		skl_fbc_program_cfb_stride(fbc);
 
-	if (intel_gt_support_legacy_fencing(to_gt(i915)))
+	if (intel_fbc_has_fences(i915))
 		snb_fbc_program_fence(fbc);
 
 	/* wa_14019417088 Alternative WA*/
@@ -1154,7 +1159,7 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
 	fbc_state->fence_y_offset = intel_plane_fence_y_offset(plane_state);
 
 	drm_WARN_ON(&i915->drm, plane_state->flags & PLANE_HAS_FENCE &&
-		    !intel_gt_support_legacy_fencing(to_gt(i915)));
+		    !intel_fbc_has_fences(i915));
 
 	if (plane_state->flags & PLANE_HAS_FENCE)
 		fbc_state->fence_id =  i915_vma_fence_id(plane_state->ggtt_vma);
-- 
2.44.2

Re: [PATCH 01/20] drm/i915/fbc: Extract intel_fbc_has_fences()

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:35PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the "do we have fences?" check into a single helper in the FBC
> code. Avoids having to call to outside the display code in multiple
> places for this.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 8488f82143a4..ba9820d4b78f 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -229,6 +229,11 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
>  	return 0;
>  }
>  
> +static bool intel_fbc_has_fences(struct drm_i915_private *i915)
> +{
> +	return intel_gt_support_legacy_fencing(to_gt(i915));
> +}
> +
>  static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> @@ -620,7 +625,7 @@ static void ivb_fbc_activate(struct intel_fbc *fbc)
>  	else if (DISPLAY_VER(i915) == 9)
>  		skl_fbc_program_cfb_stride(fbc);
>  
> -	if (intel_gt_support_legacy_fencing(to_gt(i915)))
> +	if (intel_fbc_has_fences(i915))
>  		snb_fbc_program_fence(fbc);
>  
>  	/* wa_14019417088 Alternative WA*/
> @@ -1154,7 +1159,7 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
>  	fbc_state->fence_y_offset = intel_plane_fence_y_offset(plane_state);
>  
>  	drm_WARN_ON(&i915->drm, plane_state->flags & PLANE_HAS_FENCE &&
> -		    !intel_gt_support_legacy_fencing(to_gt(i915)));
> +		    !intel_fbc_has_fences(i915));
>  
>  	if (plane_state->flags & PLANE_HAS_FENCE)
>  		fbc_state->fence_id =  i915_vma_fence_id(plane_state->ggtt_vma);
> -- 
> 2.44.2
> 

[PATCH 02/20] drm/i915/fbc: Convert to intel_display, mostly

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Switch the FBC code over to intel_display from i915, as
much as possible. This is the future direction so that
the display code can be shared between i915 and xe more
cleanly.

Some of the platform checks and the stolen mem facing stiff
still need i915 around though.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  |   4 +-
 .../drm/i915/display/intel_display_driver.c   |   4 +-
 drivers/gpu/drm/i915/display/intel_fbc.c      | 422 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_fbc.h      |  13 +-
 .../drm/i915/display/intel_fifo_underrun.c    |   2 +-
 .../drm/i915/display/intel_modeset_setup.c    |   2 +-
 6 files changed, 239 insertions(+), 208 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 91757fed9c6d..5cf9b4af9adf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1008,7 +1008,7 @@ i915_fifo_underrun_reset_write(struct file *filp,
 			return ret;
 	}
 
-	intel_fbc_reset_underrun(dev_priv);
+	intel_fbc_reset_underrun(&dev_priv->display);
 
 	return cnt;
 }
@@ -1063,7 +1063,7 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)
 	intel_bios_debugfs_register(i915);
 	intel_cdclk_debugfs_register(i915);
 	intel_dmc_debugfs_register(i915);
-	intel_fbc_debugfs_register(i915);
+	intel_fbc_debugfs_register(&i915->display);
 	intel_hpd_debugfs_register(i915);
 	intel_opregion_debugfs_register(i915);
 	intel_psr_debugfs_register(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 794b4af38055..13e206ec450f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -265,7 +265,7 @@ int intel_display_driver_probe_noirq(struct drm_i915_private *i915)
 
 	intel_init_quirks(display);
 
-	intel_fbc_init(i915);
+	intel_fbc_init(display);
 
 	return 0;
 
@@ -607,7 +607,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
 	destroy_workqueue(i915->display.wq.flip);
 	destroy_workqueue(i915->display.wq.modeset);
 
-	intel_fbc_cleanup(i915);
+	intel_fbc_cleanup(&i915->display);
 }
 
 /* part #3: call after gem init */
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index ba9820d4b78f..de8caa69a0dd 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -61,13 +61,13 @@
 #include "intel_fbc_regs.h"
 #include "intel_frontbuffer.h"
 
-#define for_each_fbc_id(__dev_priv, __fbc_id) \
+#define for_each_fbc_id(__display, __fbc_id) \
 	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
-		for_each_if(DISPLAY_RUNTIME_INFO(__dev_priv)->fbc_mask & BIT(__fbc_id))
+		for_each_if(DISPLAY_RUNTIME_INFO(__display)->fbc_mask & BIT(__fbc_id))
 
-#define for_each_intel_fbc(__dev_priv, __fbc, __fbc_id) \
-	for_each_fbc_id((__dev_priv), (__fbc_id)) \
-		for_each_if((__fbc) = (__dev_priv)->display.fbc[(__fbc_id)])
+#define for_each_intel_fbc(__display, __fbc, __fbc_id) \
+	for_each_fbc_id((__display), (__fbc_id)) \
+		for_each_if((__fbc) = (__display)->fbc[(__fbc_id)])
 
 struct intel_fbc_funcs {
 	void (*activate)(struct intel_fbc *fbc);
@@ -90,7 +90,7 @@ struct intel_fbc_state {
 };
 
 struct intel_fbc {
-	struct drm_i915_private *i915;
+	struct intel_display *display;
 	const struct intel_fbc_funcs *funcs;
 
 	/*
@@ -151,7 +151,7 @@ static unsigned int _intel_fbc_cfb_stride(const struct intel_plane_state *plane_
 /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */
 static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int limit = 4; /* 1:4 compression limit is the worst case */
 	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
 	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
@@ -165,7 +165,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
 	 * Wa_16011863758: icl+
 	 * Avoid some hardware segment address miscalculation.
 	 */
-	if (DISPLAY_VER(i915) >= 11)
+	if (DISPLAY_VER(display) >= 11)
 		stride += 64;
 
 	/*
@@ -181,7 +181,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
 /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */
 static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
 
 	/*
@@ -189,7 +189,7 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
 	 * be 512 byte aligned. Aligning each line to 512 bytes guarantees
 	 * that regardless of the compression limit we choose later.
 	 */
-	if (DISPLAY_VER(i915) >= 9)
+	if (DISPLAY_VER(display) >= 9)
 		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(plane_state));
 	else
 		return stride;
@@ -197,12 +197,12 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
 
 static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	int lines = drm_rect_height(&plane_state->uapi.src) >> 16;
 
-	if (DISPLAY_VER(i915) == 7)
+	if (DISPLAY_VER(display) == 7)
 		lines = min(lines, 2048);
-	else if (DISPLAY_VER(i915) >= 8)
+	else if (DISPLAY_VER(display) >= 8)
 		lines = min(lines, 2560);
 
 	return lines * intel_fbc_cfb_stride(plane_state);
@@ -210,7 +210,7 @@ static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_sta
 
 static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int stride_aligned = intel_fbc_cfb_stride(plane_state);
 	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
@@ -223,28 +223,31 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
 	 * we always need to use the override there.
 	 */
 	if (stride != stride_aligned ||
-	    (DISPLAY_VER(i915) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR))
+	    (DISPLAY_VER(display) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR))
 		return stride_aligned * 4 / 64;
 
 	return 0;
 }
 
-static bool intel_fbc_has_fences(struct drm_i915_private *i915)
+static bool intel_fbc_has_fences(struct intel_display *display)
 {
+	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
+
 	return intel_gt_support_legacy_fencing(to_gt(i915));
 }
 
 static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	unsigned int cfb_stride;
 	u32 fbc_ctl;
 
 	cfb_stride = fbc_state->cfb_stride / fbc->limit;
 
 	/* FBC_CTL wants 32B or 64B units */
-	if (DISPLAY_VER(i915) == 2)
+	if (DISPLAY_VER(display) == 2)
 		cfb_stride = (cfb_stride / 32) - 1;
 	else
 		cfb_stride = (cfb_stride / 64) - 1;
@@ -278,21 +281,21 @@ static u32 i965_fbc_ctl2(struct intel_fbc *fbc)
 
 static void i8xx_fbc_deactivate(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	u32 fbc_ctl;
 
 	/* Disable compression */
-	fbc_ctl = intel_de_read(i915, FBC_CONTROL);
+	fbc_ctl = intel_de_read(display, FBC_CONTROL);
 	if ((fbc_ctl & FBC_CTL_EN) == 0)
 		return;
 
 	fbc_ctl &= ~FBC_CTL_EN;
-	intel_de_write(i915, FBC_CONTROL, fbc_ctl);
+	intel_de_write(display, FBC_CONTROL, fbc_ctl);
 
 	/* Wait for compressing bit to clear */
-	if (intel_de_wait_for_clear(i915, FBC_STATUS,
+	if (intel_de_wait_for_clear(display, FBC_STATUS,
 				    FBC_STAT_COMPRESSING, 10)) {
-		drm_dbg_kms(&i915->drm, "FBC idle timed out\n");
+		drm_dbg_kms(display->drm, "FBC idle timed out\n");
 		return;
 	}
 }
@@ -300,32 +303,32 @@ static void i8xx_fbc_deactivate(struct intel_fbc *fbc)
 static void i8xx_fbc_activate(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	int i;
 
 	/* Clear old tags */
 	for (i = 0; i < (FBC_LL_SIZE / 32) + 1; i++)
-		intel_de_write(i915, FBC_TAG(i), 0);
+		intel_de_write(display, FBC_TAG(i), 0);
 
-	if (DISPLAY_VER(i915) == 4) {
-		intel_de_write(i915, FBC_CONTROL2,
+	if (DISPLAY_VER(display) == 4) {
+		intel_de_write(display, FBC_CONTROL2,
 			       i965_fbc_ctl2(fbc));
-		intel_de_write(i915, FBC_FENCE_OFF,
+		intel_de_write(display, FBC_FENCE_OFF,
 			       fbc_state->fence_y_offset);
 	}
 
-	intel_de_write(i915, FBC_CONTROL,
+	intel_de_write(display, FBC_CONTROL,
 		       FBC_CTL_EN | i8xx_fbc_ctl(fbc));
 }
 
 static bool i8xx_fbc_is_active(struct intel_fbc *fbc)
 {
-	return intel_de_read(fbc->i915, FBC_CONTROL) & FBC_CTL_EN;
+	return intel_de_read(fbc->display, FBC_CONTROL) & FBC_CTL_EN;
 }
 
 static bool i8xx_fbc_is_compressing(struct intel_fbc *fbc)
 {
-	return intel_de_read(fbc->i915, FBC_STATUS) &
+	return intel_de_read(fbc->display, FBC_STATUS) &
 		(FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
 }
 
@@ -333,7 +336,7 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc)
 {
 	struct intel_fbc_state *fbc_state = &fbc->state;
 	enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
-	struct drm_i915_private *dev_priv = fbc->i915;
+	struct drm_i915_private *dev_priv = to_i915(fbc->display->drm);
 
 	intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane),
 			  intel_de_read_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane)));
@@ -341,13 +344,14 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc)
 
 static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	drm_WARN_ON(&i915->drm,
+	drm_WARN_ON(display->drm,
 		    range_overflows_end_t(u64, i915_gem_stolen_area_address(i915),
 					  i915_gem_stolen_node_offset(&fbc->compressed_fb),
 					  U32_MAX));
-	drm_WARN_ON(&i915->drm,
+	drm_WARN_ON(display->drm,
 		    range_overflows_end_t(u64, i915_gem_stolen_area_address(i915),
 					  i915_gem_stolen_node_offset(&fbc->compressed_llb),
 					  U32_MAX));
@@ -370,7 +374,7 @@ static void i965_fbc_nuke(struct intel_fbc *fbc)
 {
 	struct intel_fbc_state *fbc_state = &fbc->state;
 	enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
-	struct drm_i915_private *dev_priv = fbc->i915;
+	struct drm_i915_private *dev_priv = to_i915(fbc->display->drm);
 
 	intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane),
 			  intel_de_read_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane)));
@@ -403,7 +407,8 @@ static u32 g4x_dpfc_ctl_limit(struct intel_fbc *fbc)
 static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 dpfc_ctl;
 
 	dpfc_ctl = g4x_dpfc_ctl_limit(fbc) |
@@ -415,7 +420,7 @@ static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
 	if (fbc_state->fence_id >= 0) {
 		dpfc_ctl |= DPFC_CTL_FENCE_EN_G4X;
 
-		if (DISPLAY_VER(i915) < 6)
+		if (DISPLAY_VER(display) < 6)
 			dpfc_ctl |= DPFC_CTL_FENCENO(fbc_state->fence_id);
 	}
 
@@ -425,43 +430,43 @@ static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
 static void g4x_fbc_activate(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 
-	intel_de_write(i915, DPFC_FENCE_YOFF,
+	intel_de_write(display, DPFC_FENCE_YOFF,
 		       fbc_state->fence_y_offset);
 
-	intel_de_write(i915, DPFC_CONTROL,
+	intel_de_write(display, DPFC_CONTROL,
 		       DPFC_CTL_EN | g4x_dpfc_ctl(fbc));
 }
 
 static void g4x_fbc_deactivate(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	u32 dpfc_ctl;
 
 	/* Disable compression */
-	dpfc_ctl = intel_de_read(i915, DPFC_CONTROL);
+	dpfc_ctl = intel_de_read(display, DPFC_CONTROL);
 	if (dpfc_ctl & DPFC_CTL_EN) {
 		dpfc_ctl &= ~DPFC_CTL_EN;
-		intel_de_write(i915, DPFC_CONTROL, dpfc_ctl);
+		intel_de_write(display, DPFC_CONTROL, dpfc_ctl);
 	}
 }
 
 static bool g4x_fbc_is_active(struct intel_fbc *fbc)
 {
-	return intel_de_read(fbc->i915, DPFC_CONTROL) & DPFC_CTL_EN;
+	return intel_de_read(fbc->display, DPFC_CONTROL) & DPFC_CTL_EN;
 }
 
 static bool g4x_fbc_is_compressing(struct intel_fbc *fbc)
 {
-	return intel_de_read(fbc->i915, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
+	return intel_de_read(fbc->display, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
 }
 
 static void g4x_fbc_program_cfb(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 
-	intel_de_write(i915, DPFC_CB_BASE,
+	intel_de_write(display, DPFC_CB_BASE,
 		       i915_gem_stolen_node_offset(&fbc->compressed_fb));
 }
 
@@ -477,43 +482,43 @@ static const struct intel_fbc_funcs g4x_fbc_funcs = {
 static void ilk_fbc_activate(struct intel_fbc *fbc)
 {
 	struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 
-	intel_de_write(i915, ILK_DPFC_FENCE_YOFF(fbc->id),
+	intel_de_write(display, ILK_DPFC_FENCE_YOFF(fbc->id),
 		       fbc_state->fence_y_offset);
 
-	intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id),
+	intel_de_write(display, ILK_DPFC_CONTROL(fbc->id),
 		       DPFC_CTL_EN | g4x_dpfc_ctl(fbc));
 }
 
 static void ilk_fbc_deactivate(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	u32 dpfc_ctl;
 
 	/* Disable compression */
-	dpfc_ctl = intel_de_read(i915, ILK_DPFC_CONTROL(fbc->id));
+	dpfc_ctl = intel_de_read(display, ILK_DPFC_CONTROL(fbc->id));
 	if (dpfc_ctl & DPFC_CTL_EN) {
 		dpfc_ctl &= ~DPFC_CTL_EN;
-		intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
+		intel_de_write(display, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
 	}
 }
 
 static bool ilk_fbc_is_active(struct intel_fbc *fbc)
 {
-	return intel_de_read(fbc->i915, ILK_DPFC_CONTROL(fbc->id)) & DPFC_CTL_EN;
+	return intel_de_read(fbc->display, ILK_DPFC_CONTROL(fbc->id)) & DPFC_CTL_EN;
 }
 
 static bool ilk_fbc_is_compressing(struct intel_fbc *fbc)
 {
-	return intel_de_read(fbc->i915, ILK_DPFC_STATUS(fbc->id)) & DPFC_COMP_SEG_MASK;
+	return intel_de_read(fbc->display, ILK_DPFC_STATUS(fbc->id)) & DPFC_COMP_SEG_MASK;
 }
 
 static void ilk_fbc_program_cfb(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 
-	intel_de_write(i915, ILK_DPFC_CB_BASE(fbc->id),
+	intel_de_write(display, ILK_DPFC_CB_BASE(fbc->id),
 		       i915_gem_stolen_node_offset(&fbc->compressed_fb));
 }
 
@@ -529,14 +534,14 @@ static const struct intel_fbc_funcs ilk_fbc_funcs = {
 static void snb_fbc_program_fence(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	u32 ctl = 0;
 
 	if (fbc_state->fence_id >= 0)
 		ctl = SNB_DPFC_FENCE_EN | SNB_DPFC_FENCENO(fbc_state->fence_id);
 
-	intel_de_write(i915, SNB_DPFC_CTL_SA, ctl);
-	intel_de_write(i915, SNB_DPFC_CPU_FENCE_OFFSET, fbc_state->fence_y_offset);
+	intel_de_write(display, SNB_DPFC_CTL_SA, ctl);
+	intel_de_write(display, SNB_DPFC_CPU_FENCE_OFFSET, fbc_state->fence_y_offset);
 }
 
 static void snb_fbc_activate(struct intel_fbc *fbc)
@@ -548,10 +553,10 @@ static void snb_fbc_activate(struct intel_fbc *fbc)
 
 static void snb_fbc_nuke(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 
-	intel_de_write(i915, MSG_FBC_REND_STATE(fbc->id), FBC_REND_NUKE);
-	intel_de_posting_read(i915, MSG_FBC_REND_STATE(fbc->id));
+	intel_de_write(display, MSG_FBC_REND_STATE(fbc->id), FBC_REND_NUKE);
+	intel_de_posting_read(display, MSG_FBC_REND_STATE(fbc->id));
 }
 
 static const struct intel_fbc_funcs snb_fbc_funcs = {
@@ -566,20 +571,20 @@ static const struct intel_fbc_funcs snb_fbc_funcs = {
 static void glk_fbc_program_cfb_stride(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	u32 val = 0;
 
 	if (fbc_state->override_cfb_stride)
 		val |= FBC_STRIDE_OVERRIDE |
 			FBC_STRIDE(fbc_state->override_cfb_stride / fbc->limit);
 
-	intel_de_write(i915, GLK_FBC_STRIDE(fbc->id), val);
+	intel_de_write(display, GLK_FBC_STRIDE(fbc->id), val);
 }
 
 static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	u32 val = 0;
 
 	/* Display WA #0529: skl, kbl, bxt. */
@@ -587,7 +592,7 @@ static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
 		val |= CHICKEN_FBC_STRIDE_OVERRIDE |
 			CHICKEN_FBC_STRIDE(fbc_state->override_cfb_stride / fbc->limit);
 
-	intel_de_rmw(i915, CHICKEN_MISC_4,
+	intel_de_rmw(display, CHICKEN_MISC_4,
 		     CHICKEN_FBC_STRIDE_OVERRIDE |
 		     CHICKEN_FBC_STRIDE_MASK, val);
 }
@@ -595,7 +600,8 @@ static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
 static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
 {
 	const struct intel_fbc_state *fbc_state = &fbc->state;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	u32 dpfc_ctl;
 
 	dpfc_ctl = g4x_dpfc_ctl_limit(fbc);
@@ -603,7 +609,7 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
 	if (IS_IVYBRIDGE(i915))
 		dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);
 
-	if (DISPLAY_VER(i915) >= 20)
+	if (DISPLAY_VER(display) >= 20)
 		dpfc_ctl |= DPFC_CTL_PLANE_BINDING(fbc_state->plane->id);
 
 	if (fbc_state->fence_id >= 0)
@@ -617,35 +623,35 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
 
 static void ivb_fbc_activate(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	u32 dpfc_ctl;
 
-	if (DISPLAY_VER(i915) >= 10)
+	if (DISPLAY_VER(display) >= 10)
 		glk_fbc_program_cfb_stride(fbc);
-	else if (DISPLAY_VER(i915) == 9)
+	else if (DISPLAY_VER(display) == 9)
 		skl_fbc_program_cfb_stride(fbc);
 
-	if (intel_fbc_has_fences(i915))
+	if (intel_fbc_has_fences(display))
 		snb_fbc_program_fence(fbc);
 
 	/* wa_14019417088 Alternative WA*/
 	dpfc_ctl = ivb_dpfc_ctl(fbc);
-	if (DISPLAY_VER(i915) >= 20)
-		intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
+	if (DISPLAY_VER(display) >= 20)
+		intel_de_write(display, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
 
-	intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id),
+	intel_de_write(display, ILK_DPFC_CONTROL(fbc->id),
 		       DPFC_CTL_EN | dpfc_ctl);
 }
 
 static bool ivb_fbc_is_compressing(struct intel_fbc *fbc)
 {
-	return intel_de_read(fbc->i915, ILK_DPFC_STATUS2(fbc->id)) & DPFC_COMP_SEG_MASK_IVB;
+	return intel_de_read(fbc->display, ILK_DPFC_STATUS2(fbc->id)) & DPFC_COMP_SEG_MASK_IVB;
 }
 
 static void ivb_fbc_set_false_color(struct intel_fbc *fbc,
 				    bool enable)
 {
-	intel_de_rmw(fbc->i915, ILK_DPFC_CONTROL(fbc->id),
+	intel_de_rmw(fbc->display, ILK_DPFC_CONTROL(fbc->id),
 		     DPFC_CTL_FALSE_COLOR, enable ? DPFC_CTL_FALSE_COLOR : 0);
 }
 
@@ -690,10 +696,10 @@ static bool intel_fbc_is_compressing(struct intel_fbc *fbc)
 
 static void intel_fbc_nuke(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 
 	lockdep_assert_held(&fbc->lock);
-	drm_WARN_ON(&i915->drm, fbc->flip_pending);
+	drm_WARN_ON(display->drm, fbc->flip_pending);
 
 	trace_intel_fbc_nuke(fbc->state.plane);
 
@@ -720,29 +726,32 @@ static void intel_fbc_deactivate(struct intel_fbc *fbc, const char *reason)
 	fbc->no_fbc_reason = reason;
 }
 
-static u64 intel_fbc_cfb_base_max(struct drm_i915_private *i915)
+static u64 intel_fbc_cfb_base_max(struct intel_display *display)
 {
-	if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
+	if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
 		return BIT_ULL(28);
 	else
 		return BIT_ULL(32);
 }
 
-static u64 intel_fbc_stolen_end(struct drm_i915_private *i915)
+static u64 intel_fbc_stolen_end(struct intel_display *display)
 {
+	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
 	u64 end;
 
 	/* The FBC hardware for BDW/SKL doesn't have access to the stolen
 	 * reserved range size, so it always assumes the maximum (8mb) is used.
 	 * If we enable FBC using a CFB on that memory range we'll get FIFO
 	 * underruns, even if that range is not reserved by the BIOS. */
-	if (IS_BROADWELL(i915) ||
-	    (DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915)))
+	if (IS_BROADWELL(to_i915(display->drm)) ||
+	    (DISPLAY_VER(display) == 9 && !IS_BROXTON(to_i915(display->drm))))
 		end = i915_gem_stolen_area_size(i915) - 8 * 1024 * 1024;
 	else
 		end = U64_MAX;
 
-	return min(end, intel_fbc_cfb_base_max(i915));
+	return min(end, intel_fbc_cfb_base_max(display));
 }
 
 static int intel_fbc_min_limit(const struct intel_plane_state *plane_state)
@@ -750,8 +759,10 @@ static int intel_fbc_min_limit(const struct intel_plane_state *plane_state)
 	return plane_state->hw.fb->format->cpp[0] == 2 ? 2 : 1;
 }
 
-static int intel_fbc_max_limit(struct drm_i915_private *i915)
+static int intel_fbc_max_limit(struct intel_display *display)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
 	/* WaFbcOnly1to1Ratio:ctg */
 	if (IS_G4X(i915))
 		return 1;
@@ -766,8 +777,9 @@ static int intel_fbc_max_limit(struct drm_i915_private *i915)
 static int find_compression_limit(struct intel_fbc *fbc,
 				  unsigned int size, int min_limit)
 {
-	struct drm_i915_private *i915 = fbc->i915;
-	u64 end = intel_fbc_stolen_end(i915);
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
+	u64 end = intel_fbc_stolen_end(display);
 	int ret, limit = min_limit;
 
 	size /= limit;
@@ -778,7 +790,7 @@ static int find_compression_limit(struct intel_fbc *fbc,
 	if (ret == 0)
 		return limit;
 
-	for (; limit <= intel_fbc_max_limit(i915); limit <<= 1) {
+	for (; limit <= intel_fbc_max_limit(display); limit <<= 1) {
 		ret = i915_gem_stolen_insert_node_in_range(i915, &fbc->compressed_fb,
 							   size >>= 1, 4096, 0, end);
 		if (ret == 0)
@@ -791,15 +803,16 @@ static int find_compression_limit(struct intel_fbc *fbc,
 static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
 			       unsigned int size, int min_limit)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	int ret;
 
-	drm_WARN_ON(&i915->drm,
+	drm_WARN_ON(display->drm,
 		    i915_gem_stolen_node_allocated(&fbc->compressed_fb));
-	drm_WARN_ON(&i915->drm,
+	drm_WARN_ON(display->drm,
 		    i915_gem_stolen_node_allocated(&fbc->compressed_llb));
 
-	if (DISPLAY_VER(i915) < 5 && !IS_G4X(i915)) {
+	if (DISPLAY_VER(display) < 5 && !IS_G4X(to_i915(display->drm))) {
 		ret = i915_gem_stolen_insert_node(i915, &fbc->compressed_llb,
 						  4096, 4096);
 		if (ret)
@@ -810,12 +823,12 @@ static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
 	if (!ret)
 		goto err_llb;
 	else if (ret > min_limit)
-		drm_info_once(&i915->drm,
+		drm_info_once(display->drm,
 			      "Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.\n");
 
 	fbc->limit = ret;
 
-	drm_dbg_kms(&i915->drm,
+	drm_dbg_kms(display->drm,
 		    "reserved %llu bytes of contiguous stolen space for FBC, limit: %d\n",
 		    i915_gem_stolen_node_size(&fbc->compressed_fb), fbc->limit);
 	return 0;
@@ -825,7 +838,8 @@ static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
 		i915_gem_stolen_remove_node(i915, &fbc->compressed_llb);
 err:
 	if (i915_gem_stolen_initialized(i915))
-		drm_info_once(&i915->drm, "not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size);
+		drm_info_once(display->drm,
+			      "not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size);
 	return -ENOSPC;
 }
 
@@ -836,14 +850,15 @@ static void intel_fbc_program_cfb(struct intel_fbc *fbc)
 
 static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	if (IS_SKYLAKE(i915) || IS_BROXTON(i915)) {
 		/*
 		 * WaFbcHighMemBwCorruptionAvoidance:skl,bxt
 		 * Display WA #0883: skl,bxt
 		 */
-		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
+		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
 			     0, DPFC_DISABLE_DUMMY0);
 	}
 
@@ -853,24 +868,25 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
 		 * WaFbcNukeOnHostModify:skl,kbl,cfl
 		 * Display WA #0873: skl,kbl,cfl
 		 */
-		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
+		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
 			     0, DPFC_NUKE_ON_ANY_MODIFICATION);
 	}
 
 	/* Wa_1409120013:icl,jsl,tgl,dg1 */
-	if (IS_DISPLAY_VER(i915, 11, 12))
-		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
+	if (IS_DISPLAY_VER(display, 11, 12))
+		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
 			     0, DPFC_CHICKEN_COMP_DUMMY_PIXEL);
 
 	/* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp,mtl */
-	if (DISPLAY_VER(i915) >= 11 && !IS_DG2(i915))
-		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
+	if (DISPLAY_VER(display) >= 11 && !IS_DG2(i915))
+		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
 			     0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
 }
 
 static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	if (WARN_ON(intel_fbc_hw_is_active(fbc)))
 		return;
@@ -881,12 +897,12 @@ static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
 		i915_gem_stolen_remove_node(i915, &fbc->compressed_fb);
 }
 
-void intel_fbc_cleanup(struct drm_i915_private *i915)
+void intel_fbc_cleanup(struct intel_display *display)
 {
 	struct intel_fbc *fbc;
 	enum intel_fbc_id fbc_id;
 
-	for_each_intel_fbc(i915, fbc, fbc_id) {
+	for_each_intel_fbc(display, fbc, fbc_id) {
 		mutex_lock(&fbc->lock);
 		__intel_fbc_cleanup_cfb(fbc);
 		mutex_unlock(&fbc->lock);
@@ -938,15 +954,16 @@ static bool icl_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
 
 static bool stride_is_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	if (DISPLAY_VER(i915) >= 11)
+	if (DISPLAY_VER(display) >= 11)
 		return icl_fbc_stride_is_valid(plane_state);
-	else if (DISPLAY_VER(i915) >= 9)
+	else if (DISPLAY_VER(display) >= 9)
 		return skl_fbc_stride_is_valid(plane_state);
-	else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
 		return g4x_fbc_stride_is_valid(plane_state);
-	else if (DISPLAY_VER(i915) == 4)
+	else if (DISPLAY_VER(display) == 4)
 		return i965_fbc_stride_is_valid(plane_state);
 	else
 		return i8xx_fbc_stride_is_valid(plane_state);
@@ -954,7 +971,7 @@ static bool stride_is_valid(const struct intel_plane_state *plane_state)
 
 static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
 
 	switch (fb->format->format) {
@@ -964,7 +981,7 @@ static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane
 	case DRM_FORMAT_XRGB1555:
 	case DRM_FORMAT_RGB565:
 		/* 16bpp not supported on gen2 */
-		if (DISPLAY_VER(i915) == 2)
+		if (DISPLAY_VER(display) == 2)
 			return false;
 		return true;
 	default:
@@ -974,7 +991,8 @@ static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane
 
 static bool g4x_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
 
 	switch (fb->format->format) {
@@ -1009,11 +1027,12 @@ static bool lnl_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_
 
 static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	if (DISPLAY_VER(i915) >= 20)
+	if (DISPLAY_VER(display) >= 20)
 		return lnl_fbc_pixel_format_is_valid(plane_state);
-	else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
 		return g4x_fbc_pixel_format_is_valid(plane_state);
 	else
 		return i8xx_fbc_pixel_format_is_valid(plane_state);
@@ -1043,11 +1062,12 @@ static bool skl_fbc_rotation_is_valid(const struct intel_plane_state *plane_stat
 
 static bool rotation_is_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	if (DISPLAY_VER(i915) >= 9)
+	if (DISPLAY_VER(display) >= 9)
 		return skl_fbc_rotation_is_valid(plane_state);
-	else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
+	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
 		return g4x_fbc_rotation_is_valid(plane_state);
 	else
 		return i8xx_fbc_rotation_is_valid(plane_state);
@@ -1061,19 +1081,20 @@ static bool rotation_is_valid(const struct intel_plane_state *plane_state)
  */
 static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	unsigned int effective_w, effective_h, max_w, max_h;
 
-	if (DISPLAY_VER(i915) >= 11) {
+	if (DISPLAY_VER(display) >= 11) {
 		max_w = 8192;
 		max_h = 4096;
-	} else if (DISPLAY_VER(i915) >= 10) {
+	} else if (DISPLAY_VER(display) >= 10) {
 		max_w = 5120;
 		max_h = 4096;
-	} else if (DISPLAY_VER(i915) >= 7) {
+	} else if (DISPLAY_VER(display) >= 7) {
 		max_w = 4096;
 		max_h = 4096;
-	} else if (IS_G4X(i915) || DISPLAY_VER(i915) >= 5) {
+	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
 		max_w = 4096;
 		max_h = 2048;
 	} else {
@@ -1091,16 +1112,17 @@ static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *
 
 static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	unsigned int w, h, max_w, max_h;
 
-	if (DISPLAY_VER(i915) >= 10) {
+	if (DISPLAY_VER(display) >= 10) {
 		max_w = 5120;
 		max_h = 4096;
-	} else if (DISPLAY_VER(i915) >= 8 || IS_HASWELL(i915)) {
+	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
 		max_w = 4096;
 		max_h = 4096;
-	} else if (IS_G4X(i915) || DISPLAY_VER(i915) >= 5) {
+	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
 		max_w = 4096;
 		max_h = 2048;
 	} else {
@@ -1128,9 +1150,9 @@ static bool skl_fbc_tiling_valid(const struct intel_plane_state *plane_state)
 
 static bool tiling_is_valid(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 
-	if (DISPLAY_VER(i915) >= 9)
+	if (DISPLAY_VER(display) >= 9)
 		return skl_fbc_tiling_valid(plane_state);
 	else
 		return i8xx_fbc_tiling_valid(plane_state);
@@ -1140,7 +1162,7 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc,
 				   struct intel_plane *plane)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_display *display = to_intel_display(state->base.dev);
 	const struct intel_crtc_state *crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
 	const struct intel_plane_state *plane_state =
@@ -1158,8 +1180,8 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
 
 	fbc_state->fence_y_offset = intel_plane_fence_y_offset(plane_state);
 
-	drm_WARN_ON(&i915->drm, plane_state->flags & PLANE_HAS_FENCE &&
-		    !intel_fbc_has_fences(i915));
+	drm_WARN_ON(display->drm, plane_state->flags & PLANE_HAS_FENCE &&
+		    !intel_fbc_has_fences(display));
 
 	if (plane_state->flags & PLANE_HAS_FENCE)
 		fbc_state->fence_id =  i915_vma_fence_id(plane_state->ggtt_vma);
@@ -1173,7 +1195,7 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
 
 static bool intel_fbc_is_fence_ok(const struct intel_plane_state *plane_state)
 {
-	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 
 	/*
 	 * The use of a CPU fence is one of two ways to detect writes by the
@@ -1187,7 +1209,7 @@ static bool intel_fbc_is_fence_ok(const struct intel_plane_state *plane_state)
 	 * so have no fence associated with it) due to aperture constraints
 	 * at the time of pinning.
 	 */
-	return DISPLAY_VER(i915) >= 9 ||
+	return DISPLAY_VER(display) >= 9 ||
 		(plane_state->flags & PLANE_HAS_FENCE &&
 		 i915_vma_fence_id(plane_state->ggtt_vma) != -1);
 }
@@ -1212,7 +1234,8 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
 static int intel_fbc_check_plane(struct intel_atomic_state *state,
 				 struct intel_plane *plane)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_display *display = to_intel_display(state->base.dev);
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_plane_state *plane_state =
 		intel_atomic_get_new_plane_state(state, plane);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
@@ -1233,7 +1256,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 		return 0;
 	}
 
-	if (!i915->display.params.enable_fbc) {
+	if (!display->params.enable_fbc) {
 		plane_state->no_fbc_reason = "disabled per module param or by default";
 		return 0;
 	}
@@ -1271,14 +1294,14 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 	 * Recommendation is to keep this combination disabled
 	 * Bspec: 50422 HSD: 14010260002
 	 */
-	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update &&
+	if (IS_DISPLAY_VER(display, 12, 14) && crtc_state->has_sel_update &&
 	    !crtc_state->has_panel_replay) {
 		plane_state->no_fbc_reason = "PSR2 enabled";
 		return 0;
 	}
 
 	/* Wa_14016291713 */
-	if ((IS_DISPLAY_VER(i915, 12, 13) ||
+	if ((IS_DISPLAY_VER(display, 12, 13) ||
 	     IS_DISPLAY_IP_STEP(i915, IP_VER(14, 0), STEP_A0, STEP_C0)) &&
 	    crtc_state->has_psr && !crtc_state->has_panel_replay) {
 		plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
@@ -1305,7 +1328,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 		return 0;
 	}
 
-	if (DISPLAY_VER(i915) < 20 &&
+	if (DISPLAY_VER(display) < 20 &&
 	    plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
 	    fb->format->has_alpha) {
 		plane_state->no_fbc_reason = "per-pixel alpha not supported";
@@ -1327,14 +1350,14 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 	 * having a Y offset that isn't divisible by 4 causes FIFO underrun
 	 * and screen flicker.
 	 */
-	if (DISPLAY_VER(i915) >= 9 &&
+	if (DISPLAY_VER(display) >= 9 &&
 	    plane_state->view.color_plane[0].y & 3) {
 		plane_state->no_fbc_reason = "plane start Y offset misaligned";
 		return 0;
 	}
 
 	/* Wa_22010751166: icl, ehl, tgl, dg1, rkl */
-	if (DISPLAY_VER(i915) >= 11 &&
+	if (DISPLAY_VER(display) >= 11 &&
 	    (plane_state->view.color_plane[0].y +
 	     (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {
 		plane_state->no_fbc_reason = "plane end Y offset misaligned";
@@ -1410,7 +1433,7 @@ static bool __intel_fbc_pre_update(struct intel_atomic_state *state,
 				   struct intel_crtc *crtc,
 				   struct intel_plane *plane)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_display *display = to_intel_display(state->base.dev);
 	struct intel_fbc *fbc = plane->fbc;
 	bool need_vblank_wait = false;
 
@@ -1436,7 +1459,7 @@ static bool __intel_fbc_pre_update(struct intel_atomic_state *state,
 	 * and skipping the extra vblank wait before the plane update
 	 * if at least one frame has already passed.
 	 */
-	if (fbc->activated && DISPLAY_VER(i915) >= 10)
+	if (fbc->activated && DISPLAY_VER(display) >= 10)
 		need_vblank_wait = true;
 	fbc->activated = false;
 
@@ -1470,13 +1493,13 @@ bool intel_fbc_pre_update(struct intel_atomic_state *state,
 
 static void __intel_fbc_disable(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 	struct intel_plane *plane = fbc->state.plane;
 
 	lockdep_assert_held(&fbc->lock);
-	drm_WARN_ON(&i915->drm, fbc->active);
+	drm_WARN_ON(display->drm, fbc->active);
 
-	drm_dbg_kms(&i915->drm, "Disabling FBC on [PLANE:%d:%s]\n",
+	drm_dbg_kms(display->drm, "Disabling FBC on [PLANE:%d:%s]\n",
 		    plane->base.base.id, plane->base.name);
 
 	__intel_fbc_cleanup_cfb(fbc);
@@ -1553,7 +1576,7 @@ void intel_fbc_invalidate(struct drm_i915_private *i915,
 	struct intel_fbc *fbc;
 	enum intel_fbc_id fbc_id;
 
-	for_each_intel_fbc(i915, fbc, fbc_id)
+	for_each_intel_fbc(&i915->display, fbc, fbc_id)
 		__intel_fbc_invalidate(fbc, frontbuffer_bits, origin);
 
 }
@@ -1592,7 +1615,7 @@ void intel_fbc_flush(struct drm_i915_private *i915,
 	struct intel_fbc *fbc;
 	enum intel_fbc_id fbc_id;
 
-	for_each_intel_fbc(i915, fbc, fbc_id)
+	for_each_intel_fbc(&i915->display, fbc, fbc_id)
 		__intel_fbc_flush(fbc, frontbuffer_bits, origin);
 }
 
@@ -1617,7 +1640,7 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
 			       struct intel_crtc *crtc,
 			       struct intel_plane *plane)
 {
-	struct drm_i915_private *i915 = to_i915(state->base.dev);
+	struct intel_display *display = to_intel_display(state->base.dev);
 	const struct intel_plane_state *plane_state =
 		intel_atomic_get_new_plane_state(state, plane);
 	struct intel_fbc *fbc = plane->fbc;
@@ -1636,7 +1659,7 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
 		__intel_fbc_disable(fbc);
 	}
 
-	drm_WARN_ON(&i915->drm, fbc->active);
+	drm_WARN_ON(display->drm, fbc->active);
 
 	fbc->no_fbc_reason = plane_state->no_fbc_reason;
 	if (fbc->no_fbc_reason)
@@ -1658,7 +1681,7 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
 		return;
 	}
 
-	drm_dbg_kms(&i915->drm, "Enabling FBC on [PLANE:%d:%s]\n",
+	drm_dbg_kms(display->drm, "Enabling FBC on [PLANE:%d:%s]\n",
 		    plane->base.base.id, plane->base.name);
 	fbc->no_fbc_reason = "FBC enabled but not active yet\n";
 
@@ -1676,10 +1699,10 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
  */
 void intel_fbc_disable(struct intel_crtc *crtc)
 {
-	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+	struct intel_display *display = to_intel_display(crtc->base.dev);
 	struct intel_plane *plane;
 
-	for_each_intel_plane(&i915->drm, plane) {
+	for_each_intel_plane(display->drm, plane) {
 		struct intel_fbc *fbc = plane->fbc;
 
 		if (!fbc || plane->pipe != crtc->pipe)
@@ -1724,7 +1747,8 @@ void intel_fbc_update(struct intel_atomic_state *state,
 static void intel_fbc_underrun_work_fn(struct work_struct *work)
 {
 	struct intel_fbc *fbc = container_of(work, typeof(*fbc), underrun_work);
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	mutex_lock(&fbc->lock);
 
@@ -1732,7 +1756,7 @@ static void intel_fbc_underrun_work_fn(struct work_struct *work)
 	if (fbc->underrun_detected || !fbc->state.plane)
 		goto out;
 
-	drm_dbg_kms(&i915->drm, "Disabling FBC due to FIFO underrun.\n");
+	drm_dbg_kms(display->drm, "Disabling FBC due to FIFO underrun.\n");
 	fbc->underrun_detected = true;
 
 	intel_fbc_deactivate(fbc, "FIFO underrun");
@@ -1745,14 +1769,14 @@ static void intel_fbc_underrun_work_fn(struct work_struct *work)
 
 static void __intel_fbc_reset_underrun(struct intel_fbc *fbc)
 {
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
 
 	cancel_work_sync(&fbc->underrun_work);
 
 	mutex_lock(&fbc->lock);
 
 	if (fbc->underrun_detected) {
-		drm_dbg_kms(&i915->drm,
+		drm_dbg_kms(display->drm,
 			    "Re-allowing FBC after fifo underrun\n");
 		fbc->no_fbc_reason = "FIFO underrun cleared";
 	}
@@ -1763,22 +1787,24 @@ static void __intel_fbc_reset_underrun(struct intel_fbc *fbc)
 
 /*
  * intel_fbc_reset_underrun - reset FBC fifo underrun status.
- * @i915: the i915 device
+ * @display: display
  *
  * See intel_fbc_handle_fifo_underrun_irq(). For automated testing we
  * want to re-enable FBC after an underrun to increase test coverage.
  */
-void intel_fbc_reset_underrun(struct drm_i915_private *i915)
+void intel_fbc_reset_underrun(struct intel_display *display)
 {
 	struct intel_fbc *fbc;
 	enum intel_fbc_id fbc_id;
 
-	for_each_intel_fbc(i915, fbc, fbc_id)
+	for_each_intel_fbc(display, fbc, fbc_id)
 		__intel_fbc_reset_underrun(fbc);
 }
 
 static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
 {
+	struct drm_i915_private *i915 = to_i915(fbc->display->drm);
+
 	/*
 	 * There's no guarantee that underrun_detected won't be set to true
 	 * right after this check and before the work is scheduled, but that's
@@ -1790,12 +1816,12 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
 	if (READ_ONCE(fbc->underrun_detected))
 		return;
 
-	queue_work(fbc->i915->unordered_wq, &fbc->underrun_work);
+	queue_work(i915->unordered_wq, &fbc->underrun_work);
 }
 
 /**
  * intel_fbc_handle_fifo_underrun_irq - disable FBC when we get a FIFO underrun
- * @i915: i915 device
+ * @display: display
  *
  * Without FBC, most underruns are harmless and don't really cause too many
  * problems, except for an annoying message on dmesg. With FBC, underruns can
@@ -1807,12 +1833,12 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
  *
  * This function is called from the IRQ handler.
  */
-void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
+void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display)
 {
 	struct intel_fbc *fbc;
 	enum intel_fbc_id fbc_id;
 
-	for_each_intel_fbc(i915, fbc, fbc_id)
+	for_each_intel_fbc(display, fbc, fbc_id)
 		__intel_fbc_handle_fifo_underrun_irq(fbc);
 }
 
@@ -1825,15 +1851,17 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
  * space to change the value during runtime without sanitizing it again. IGT
  * relies on being able to change i915.enable_fbc at runtime.
  */
-static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
+static int intel_sanitize_fbc_option(struct intel_display *display)
 {
-	if (i915->display.params.enable_fbc >= 0)
-		return !!i915->display.params.enable_fbc;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	if (!HAS_FBC(i915))
+	if (display->params.enable_fbc >= 0)
+		return !!display->params.enable_fbc;
+
+	if (!HAS_FBC(display))
 		return 0;
 
-	if (IS_BROADWELL(i915) || DISPLAY_VER(i915) >= 9)
+	if (IS_BROADWELL(i915) || DISPLAY_VER(display) >= 9)
 		return 1;
 
 	return 0;
@@ -1844,9 +1872,10 @@ void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)
 	plane->fbc = fbc;
 }
 
-static struct intel_fbc *intel_fbc_create(struct drm_i915_private *i915,
+static struct intel_fbc *intel_fbc_create(struct intel_display *display,
 					  enum intel_fbc_id fbc_id)
 {
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_fbc *fbc;
 
 	fbc = kzalloc(sizeof(*fbc), GFP_KERNEL);
@@ -1854,19 +1883,19 @@ static struct intel_fbc *intel_fbc_create(struct drm_i915_private *i915,
 		return NULL;
 
 	fbc->id = fbc_id;
-	fbc->i915 = i915;
+	fbc->display = display;
 	INIT_WORK(&fbc->underrun_work, intel_fbc_underrun_work_fn);
 	mutex_init(&fbc->lock);
 
-	if (DISPLAY_VER(i915) >= 7)
+	if (DISPLAY_VER(display) >= 7)
 		fbc->funcs = &ivb_fbc_funcs;
-	else if (DISPLAY_VER(i915) == 6)
+	else if (DISPLAY_VER(display) == 6)
 		fbc->funcs = &snb_fbc_funcs;
-	else if (DISPLAY_VER(i915) == 5)
+	else if (DISPLAY_VER(display) == 5)
 		fbc->funcs = &ilk_fbc_funcs;
 	else if (IS_G4X(i915))
 		fbc->funcs = &g4x_fbc_funcs;
-	else if (DISPLAY_VER(i915) == 4)
+	else if (DISPLAY_VER(display) == 4)
 		fbc->funcs = &i965_fbc_funcs;
 	else
 		fbc->funcs = &i8xx_fbc_funcs;
@@ -1876,36 +1905,36 @@ static struct intel_fbc *intel_fbc_create(struct drm_i915_private *i915,
 
 /**
  * intel_fbc_init - Initialize FBC
- * @i915: the i915 device
+ * @display: display
  *
  * This function might be called during PM init process.
  */
-void intel_fbc_init(struct drm_i915_private *i915)
+void intel_fbc_init(struct intel_display *display)
 {
 	enum intel_fbc_id fbc_id;
 
-	i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915);
-	drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
-		    i915->display.params.enable_fbc);
+	display->params.enable_fbc = intel_sanitize_fbc_option(display);
+	drm_dbg_kms(display->drm, "Sanitized enable_fbc value: %d\n",
+		    display->params.enable_fbc);
 
-	for_each_fbc_id(i915, fbc_id)
-		i915->display.fbc[fbc_id] = intel_fbc_create(i915, fbc_id);
+	for_each_fbc_id(display, fbc_id)
+		display->fbc[fbc_id] = intel_fbc_create(display, fbc_id);
 }
 
 /**
  * intel_fbc_sanitize - Sanitize FBC
- * @i915: the i915 device
+ * @display: display
  *
  * Make sure FBC is initially disabled since we have no
  * idea eg. into which parts of stolen it might be scribbling
  * into.
  */
-void intel_fbc_sanitize(struct drm_i915_private *i915)
+void intel_fbc_sanitize(struct intel_display *display)
 {
 	struct intel_fbc *fbc;
 	enum intel_fbc_id fbc_id;
 
-	for_each_intel_fbc(i915, fbc, fbc_id) {
+	for_each_intel_fbc(display, fbc, fbc_id) {
 		if (intel_fbc_hw_is_active(fbc))
 			intel_fbc_hw_deactivate(fbc);
 	}
@@ -1914,11 +1943,12 @@ void intel_fbc_sanitize(struct drm_i915_private *i915)
 static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
 {
 	struct intel_fbc *fbc = m->private;
-	struct drm_i915_private *i915 = fbc->i915;
+	struct intel_display *display = fbc->display;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 	struct intel_plane *plane;
 	intel_wakeref_t wakeref;
 
-	drm_modeset_lock_all(&i915->drm);
+	drm_modeset_lock_all(display->drm);
 
 	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
 	mutex_lock(&fbc->lock);
@@ -1931,7 +1961,7 @@ static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
 		seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
 	}
 
-	for_each_intel_plane(&i915->drm, plane) {
+	for_each_intel_plane(display->drm, plane) {
 		const struct intel_plane_state *plane_state =
 			to_intel_plane_state(plane->base.state);
 
@@ -1947,7 +1977,7 @@ static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
 	mutex_unlock(&fbc->lock);
 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
 
-	drm_modeset_unlock_all(&i915->drm);
+	drm_modeset_unlock_all(display->drm);
 
 	return 0;
 }
@@ -2004,12 +2034,12 @@ void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc)
 }
 
 /* FIXME: remove this once igt is on board with per-crtc stuff */
-void intel_fbc_debugfs_register(struct drm_i915_private *i915)
+void intel_fbc_debugfs_register(struct intel_display *display)
 {
-	struct drm_minor *minor = i915->drm.primary;
+	struct drm_minor *minor = display->drm->primary;
 	struct intel_fbc *fbc;
 
-	fbc = i915->display.fbc[INTEL_FBC_A];
+	fbc = display->fbc[INTEL_FBC_A];
 	if (fbc)
 		intel_fbc_debugfs_add(fbc, minor->debugfs_root);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index 6720ec8ee8a2..834b271505b1 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -13,6 +13,7 @@ struct drm_i915_private;
 struct intel_atomic_state;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_display;
 struct intel_fbc;
 struct intel_plane;
 struct intel_plane_state;
@@ -31,9 +32,9 @@ bool intel_fbc_pre_update(struct intel_atomic_state *state,
 			  struct intel_crtc *crtc);
 void intel_fbc_post_update(struct intel_atomic_state *state,
 			   struct intel_crtc *crtc);
-void intel_fbc_init(struct drm_i915_private *dev_priv);
-void intel_fbc_cleanup(struct drm_i915_private *dev_priv);
-void intel_fbc_sanitize(struct drm_i915_private *dev_priv);
+void intel_fbc_init(struct intel_display *dev_priv);
+void intel_fbc_cleanup(struct intel_display *dev_priv);
+void intel_fbc_sanitize(struct intel_display *dev_priv);
 void intel_fbc_update(struct intel_atomic_state *state,
 		      struct intel_crtc *crtc);
 void intel_fbc_disable(struct intel_crtc *crtc);
@@ -43,9 +44,9 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
 void intel_fbc_flush(struct drm_i915_private *dev_priv,
 		     unsigned int frontbuffer_bits, enum fb_op_origin origin);
 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
-void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
-void intel_fbc_reset_underrun(struct drm_i915_private *i915);
+void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);
+void intel_fbc_reset_underrun(struct intel_display *display);
 void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
-void intel_fbc_debugfs_register(struct drm_i915_private *i915);
+void intel_fbc_debugfs_register(struct intel_display *display);
 
 #endif /* __INTEL_FBC_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index e5e4ca7cc499..8949fbb1cc60 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -440,7 +440,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
 			drm_err(&dev_priv->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));
 	}
 
-	intel_fbc_handle_fifo_underrun_irq(dev_priv);
+	intel_fbc_handle_fifo_underrun_irq(&dev_priv->display);
 }
 
 /**
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 7602cb30ebf1..6f85f5352455 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -966,7 +966,7 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915,
 		}
 	}
 
-	intel_fbc_sanitize(i915);
+	intel_fbc_sanitize(&i915->display);
 
 	intel_sanitize_plane_mapping(i915);
 
-- 
2.44.2

Re: [PATCH 02/20] drm/i915/fbc: Convert to intel_display, mostly

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:36PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Switch the FBC code over to intel_display from i915, as
> much as possible. This is the future direction so that
> the display code can be shared between i915 and xe more
> cleanly.
> 
> Some of the platform checks and the stolen mem facing stiff
> still need i915 around though.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../drm/i915/display/intel_display_debugfs.c  |   4 +-
>  .../drm/i915/display/intel_display_driver.c   |   4 +-
>  drivers/gpu/drm/i915/display/intel_fbc.c      | 422 ++++++++++--------
>  drivers/gpu/drm/i915/display/intel_fbc.h      |  13 +-
>  .../drm/i915/display/intel_fifo_underrun.c    |   2 +-
>  .../drm/i915/display/intel_modeset_setup.c    |   2 +-
>  6 files changed, 239 insertions(+), 208 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 91757fed9c6d..5cf9b4af9adf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1008,7 +1008,7 @@ i915_fifo_underrun_reset_write(struct file *filp,
>  			return ret;
>  	}
>  
> -	intel_fbc_reset_underrun(dev_priv);
> +	intel_fbc_reset_underrun(&dev_priv->display);
>  
>  	return cnt;
>  }
> @@ -1063,7 +1063,7 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)
>  	intel_bios_debugfs_register(i915);
>  	intel_cdclk_debugfs_register(i915);
>  	intel_dmc_debugfs_register(i915);
> -	intel_fbc_debugfs_register(i915);
> +	intel_fbc_debugfs_register(&i915->display);
>  	intel_hpd_debugfs_register(i915);
>  	intel_opregion_debugfs_register(i915);
>  	intel_psr_debugfs_register(i915);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
> index 794b4af38055..13e206ec450f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> @@ -265,7 +265,7 @@ int intel_display_driver_probe_noirq(struct drm_i915_private *i915)
>  
>  	intel_init_quirks(display);
>  
> -	intel_fbc_init(i915);
> +	intel_fbc_init(display);
>  
>  	return 0;
>  
> @@ -607,7 +607,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
>  	destroy_workqueue(i915->display.wq.flip);
>  	destroy_workqueue(i915->display.wq.modeset);
>  
> -	intel_fbc_cleanup(i915);
> +	intel_fbc_cleanup(&i915->display);
>  }
>  
>  /* part #3: call after gem init */
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index ba9820d4b78f..de8caa69a0dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -61,13 +61,13 @@
>  #include "intel_fbc_regs.h"
>  #include "intel_frontbuffer.h"
>  
> -#define for_each_fbc_id(__dev_priv, __fbc_id) \
> +#define for_each_fbc_id(__display, __fbc_id) \
>  	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
> -		for_each_if(DISPLAY_RUNTIME_INFO(__dev_priv)->fbc_mask & BIT(__fbc_id))
> +		for_each_if(DISPLAY_RUNTIME_INFO(__display)->fbc_mask & BIT(__fbc_id))
>  
> -#define for_each_intel_fbc(__dev_priv, __fbc, __fbc_id) \
> -	for_each_fbc_id((__dev_priv), (__fbc_id)) \
> -		for_each_if((__fbc) = (__dev_priv)->display.fbc[(__fbc_id)])
> +#define for_each_intel_fbc(__display, __fbc, __fbc_id) \
> +	for_each_fbc_id((__display), (__fbc_id)) \
> +		for_each_if((__fbc) = (__display)->fbc[(__fbc_id)])
>  
>  struct intel_fbc_funcs {
>  	void (*activate)(struct intel_fbc *fbc);
> @@ -90,7 +90,7 @@ struct intel_fbc_state {
>  };
>  
>  struct intel_fbc {
> -	struct drm_i915_private *i915;
> +	struct intel_display *display;
>  	const struct intel_fbc_funcs *funcs;
>  
>  	/*
> @@ -151,7 +151,7 @@ static unsigned int _intel_fbc_cfb_stride(const struct intel_plane_state *plane_
>  /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */
>  static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	unsigned int limit = 4; /* 1:4 compression limit is the worst case */
>  	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
>  	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
> @@ -165,7 +165,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
>  	 * Wa_16011863758: icl+
>  	 * Avoid some hardware segment address miscalculation.
>  	 */
> -	if (DISPLAY_VER(i915) >= 11)
> +	if (DISPLAY_VER(display) >= 11)
>  		stride += 64;
>  
>  	/*
> @@ -181,7 +181,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
>  /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */
>  static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
>  
>  	/*
> @@ -189,7 +189,7 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
>  	 * be 512 byte aligned. Aligning each line to 512 bytes guarantees
>  	 * that regardless of the compression limit we choose later.
>  	 */
> -	if (DISPLAY_VER(i915) >= 9)
> +	if (DISPLAY_VER(display) >= 9)
>  		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(plane_state));
>  	else
>  		return stride;
> @@ -197,12 +197,12 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
>  
>  static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	int lines = drm_rect_height(&plane_state->uapi.src) >> 16;
>  
> -	if (DISPLAY_VER(i915) == 7)
> +	if (DISPLAY_VER(display) == 7)
>  		lines = min(lines, 2048);
> -	else if (DISPLAY_VER(i915) >= 8)
> +	else if (DISPLAY_VER(display) >= 8)
>  		lines = min(lines, 2560);
>  
>  	return lines * intel_fbc_cfb_stride(plane_state);
> @@ -210,7 +210,7 @@ static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_sta
>  
>  static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	unsigned int stride_aligned = intel_fbc_cfb_stride(plane_state);
>  	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
>  	const struct drm_framebuffer *fb = plane_state->hw.fb;
> @@ -223,28 +223,31 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
>  	 * we always need to use the override there.
>  	 */
>  	if (stride != stride_aligned ||
> -	    (DISPLAY_VER(i915) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR))
> +	    (DISPLAY_VER(display) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR))
>  		return stride_aligned * 4 / 64;
>  
>  	return 0;
>  }
>  
> -static bool intel_fbc_has_fences(struct drm_i915_private *i915)
> +static bool intel_fbc_has_fences(struct intel_display *display)
>  {
> +	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);

I was going to ask why __maybe_unused,
but then I remember about the xe compat-headers where below function is
defined to 0...


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


> +
>  	return intel_gt_support_legacy_fencing(to_gt(i915));
>  }
>  
>  static u32 i8xx_fbc_ctl(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	unsigned int cfb_stride;
>  	u32 fbc_ctl;
>  
>  	cfb_stride = fbc_state->cfb_stride / fbc->limit;
>  
>  	/* FBC_CTL wants 32B or 64B units */
> -	if (DISPLAY_VER(i915) == 2)
> +	if (DISPLAY_VER(display) == 2)
>  		cfb_stride = (cfb_stride / 32) - 1;
>  	else
>  		cfb_stride = (cfb_stride / 64) - 1;
> @@ -278,21 +281,21 @@ static u32 i965_fbc_ctl2(struct intel_fbc *fbc)
>  
>  static void i8xx_fbc_deactivate(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	u32 fbc_ctl;
>  
>  	/* Disable compression */
> -	fbc_ctl = intel_de_read(i915, FBC_CONTROL);
> +	fbc_ctl = intel_de_read(display, FBC_CONTROL);
>  	if ((fbc_ctl & FBC_CTL_EN) == 0)
>  		return;
>  
>  	fbc_ctl &= ~FBC_CTL_EN;
> -	intel_de_write(i915, FBC_CONTROL, fbc_ctl);
> +	intel_de_write(display, FBC_CONTROL, fbc_ctl);
>  
>  	/* Wait for compressing bit to clear */
> -	if (intel_de_wait_for_clear(i915, FBC_STATUS,
> +	if (intel_de_wait_for_clear(display, FBC_STATUS,
>  				    FBC_STAT_COMPRESSING, 10)) {
> -		drm_dbg_kms(&i915->drm, "FBC idle timed out\n");
> +		drm_dbg_kms(display->drm, "FBC idle timed out\n");
>  		return;
>  	}
>  }
> @@ -300,32 +303,32 @@ static void i8xx_fbc_deactivate(struct intel_fbc *fbc)
>  static void i8xx_fbc_activate(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	int i;
>  
>  	/* Clear old tags */
>  	for (i = 0; i < (FBC_LL_SIZE / 32) + 1; i++)
> -		intel_de_write(i915, FBC_TAG(i), 0);
> +		intel_de_write(display, FBC_TAG(i), 0);
>  
> -	if (DISPLAY_VER(i915) == 4) {
> -		intel_de_write(i915, FBC_CONTROL2,
> +	if (DISPLAY_VER(display) == 4) {
> +		intel_de_write(display, FBC_CONTROL2,
>  			       i965_fbc_ctl2(fbc));
> -		intel_de_write(i915, FBC_FENCE_OFF,
> +		intel_de_write(display, FBC_FENCE_OFF,
>  			       fbc_state->fence_y_offset);
>  	}
>  
> -	intel_de_write(i915, FBC_CONTROL,
> +	intel_de_write(display, FBC_CONTROL,
>  		       FBC_CTL_EN | i8xx_fbc_ctl(fbc));
>  }
>  
>  static bool i8xx_fbc_is_active(struct intel_fbc *fbc)
>  {
> -	return intel_de_read(fbc->i915, FBC_CONTROL) & FBC_CTL_EN;
> +	return intel_de_read(fbc->display, FBC_CONTROL) & FBC_CTL_EN;
>  }
>  
>  static bool i8xx_fbc_is_compressing(struct intel_fbc *fbc)
>  {
> -	return intel_de_read(fbc->i915, FBC_STATUS) &
> +	return intel_de_read(fbc->display, FBC_STATUS) &
>  		(FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
>  }
>  
> @@ -333,7 +336,7 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc)
>  {
>  	struct intel_fbc_state *fbc_state = &fbc->state;
>  	enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
> -	struct drm_i915_private *dev_priv = fbc->i915;
> +	struct drm_i915_private *dev_priv = to_i915(fbc->display->drm);
>  
>  	intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane),
>  			  intel_de_read_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane)));
> @@ -341,13 +344,14 @@ static void i8xx_fbc_nuke(struct intel_fbc *fbc)
>  
>  static void i8xx_fbc_program_cfb(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
> -	drm_WARN_ON(&i915->drm,
> +	drm_WARN_ON(display->drm,
>  		    range_overflows_end_t(u64, i915_gem_stolen_area_address(i915),
>  					  i915_gem_stolen_node_offset(&fbc->compressed_fb),
>  					  U32_MAX));
> -	drm_WARN_ON(&i915->drm,
> +	drm_WARN_ON(display->drm,
>  		    range_overflows_end_t(u64, i915_gem_stolen_area_address(i915),
>  					  i915_gem_stolen_node_offset(&fbc->compressed_llb),
>  					  U32_MAX));
> @@ -370,7 +374,7 @@ static void i965_fbc_nuke(struct intel_fbc *fbc)
>  {
>  	struct intel_fbc_state *fbc_state = &fbc->state;
>  	enum i9xx_plane_id i9xx_plane = fbc_state->plane->i9xx_plane;
> -	struct drm_i915_private *dev_priv = fbc->i915;
> +	struct drm_i915_private *dev_priv = to_i915(fbc->display->drm);
>  
>  	intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane),
>  			  intel_de_read_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane)));
> @@ -403,7 +407,8 @@ static u32 g4x_dpfc_ctl_limit(struct intel_fbc *fbc)
>  static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	u32 dpfc_ctl;
>  
>  	dpfc_ctl = g4x_dpfc_ctl_limit(fbc) |
> @@ -415,7 +420,7 @@ static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
>  	if (fbc_state->fence_id >= 0) {
>  		dpfc_ctl |= DPFC_CTL_FENCE_EN_G4X;
>  
> -		if (DISPLAY_VER(i915) < 6)
> +		if (DISPLAY_VER(display) < 6)
>  			dpfc_ctl |= DPFC_CTL_FENCENO(fbc_state->fence_id);
>  	}
>  
> @@ -425,43 +430,43 @@ static u32 g4x_dpfc_ctl(struct intel_fbc *fbc)
>  static void g4x_fbc_activate(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  
> -	intel_de_write(i915, DPFC_FENCE_YOFF,
> +	intel_de_write(display, DPFC_FENCE_YOFF,
>  		       fbc_state->fence_y_offset);
>  
> -	intel_de_write(i915, DPFC_CONTROL,
> +	intel_de_write(display, DPFC_CONTROL,
>  		       DPFC_CTL_EN | g4x_dpfc_ctl(fbc));
>  }
>  
>  static void g4x_fbc_deactivate(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	u32 dpfc_ctl;
>  
>  	/* Disable compression */
> -	dpfc_ctl = intel_de_read(i915, DPFC_CONTROL);
> +	dpfc_ctl = intel_de_read(display, DPFC_CONTROL);
>  	if (dpfc_ctl & DPFC_CTL_EN) {
>  		dpfc_ctl &= ~DPFC_CTL_EN;
> -		intel_de_write(i915, DPFC_CONTROL, dpfc_ctl);
> +		intel_de_write(display, DPFC_CONTROL, dpfc_ctl);
>  	}
>  }
>  
>  static bool g4x_fbc_is_active(struct intel_fbc *fbc)
>  {
> -	return intel_de_read(fbc->i915, DPFC_CONTROL) & DPFC_CTL_EN;
> +	return intel_de_read(fbc->display, DPFC_CONTROL) & DPFC_CTL_EN;
>  }
>  
>  static bool g4x_fbc_is_compressing(struct intel_fbc *fbc)
>  {
> -	return intel_de_read(fbc->i915, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
> +	return intel_de_read(fbc->display, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
>  }
>  
>  static void g4x_fbc_program_cfb(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  
> -	intel_de_write(i915, DPFC_CB_BASE,
> +	intel_de_write(display, DPFC_CB_BASE,
>  		       i915_gem_stolen_node_offset(&fbc->compressed_fb));
>  }
>  
> @@ -477,43 +482,43 @@ static const struct intel_fbc_funcs g4x_fbc_funcs = {
>  static void ilk_fbc_activate(struct intel_fbc *fbc)
>  {
>  	struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  
> -	intel_de_write(i915, ILK_DPFC_FENCE_YOFF(fbc->id),
> +	intel_de_write(display, ILK_DPFC_FENCE_YOFF(fbc->id),
>  		       fbc_state->fence_y_offset);
>  
> -	intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id),
> +	intel_de_write(display, ILK_DPFC_CONTROL(fbc->id),
>  		       DPFC_CTL_EN | g4x_dpfc_ctl(fbc));
>  }
>  
>  static void ilk_fbc_deactivate(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	u32 dpfc_ctl;
>  
>  	/* Disable compression */
> -	dpfc_ctl = intel_de_read(i915, ILK_DPFC_CONTROL(fbc->id));
> +	dpfc_ctl = intel_de_read(display, ILK_DPFC_CONTROL(fbc->id));
>  	if (dpfc_ctl & DPFC_CTL_EN) {
>  		dpfc_ctl &= ~DPFC_CTL_EN;
> -		intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
> +		intel_de_write(display, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
>  	}
>  }
>  
>  static bool ilk_fbc_is_active(struct intel_fbc *fbc)
>  {
> -	return intel_de_read(fbc->i915, ILK_DPFC_CONTROL(fbc->id)) & DPFC_CTL_EN;
> +	return intel_de_read(fbc->display, ILK_DPFC_CONTROL(fbc->id)) & DPFC_CTL_EN;
>  }
>  
>  static bool ilk_fbc_is_compressing(struct intel_fbc *fbc)
>  {
> -	return intel_de_read(fbc->i915, ILK_DPFC_STATUS(fbc->id)) & DPFC_COMP_SEG_MASK;
> +	return intel_de_read(fbc->display, ILK_DPFC_STATUS(fbc->id)) & DPFC_COMP_SEG_MASK;
>  }
>  
>  static void ilk_fbc_program_cfb(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  
> -	intel_de_write(i915, ILK_DPFC_CB_BASE(fbc->id),
> +	intel_de_write(display, ILK_DPFC_CB_BASE(fbc->id),
>  		       i915_gem_stolen_node_offset(&fbc->compressed_fb));
>  }
>  
> @@ -529,14 +534,14 @@ static const struct intel_fbc_funcs ilk_fbc_funcs = {
>  static void snb_fbc_program_fence(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	u32 ctl = 0;
>  
>  	if (fbc_state->fence_id >= 0)
>  		ctl = SNB_DPFC_FENCE_EN | SNB_DPFC_FENCENO(fbc_state->fence_id);
>  
> -	intel_de_write(i915, SNB_DPFC_CTL_SA, ctl);
> -	intel_de_write(i915, SNB_DPFC_CPU_FENCE_OFFSET, fbc_state->fence_y_offset);
> +	intel_de_write(display, SNB_DPFC_CTL_SA, ctl);
> +	intel_de_write(display, SNB_DPFC_CPU_FENCE_OFFSET, fbc_state->fence_y_offset);
>  }
>  
>  static void snb_fbc_activate(struct intel_fbc *fbc)
> @@ -548,10 +553,10 @@ static void snb_fbc_activate(struct intel_fbc *fbc)
>  
>  static void snb_fbc_nuke(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  
> -	intel_de_write(i915, MSG_FBC_REND_STATE(fbc->id), FBC_REND_NUKE);
> -	intel_de_posting_read(i915, MSG_FBC_REND_STATE(fbc->id));
> +	intel_de_write(display, MSG_FBC_REND_STATE(fbc->id), FBC_REND_NUKE);
> +	intel_de_posting_read(display, MSG_FBC_REND_STATE(fbc->id));
>  }
>  
>  static const struct intel_fbc_funcs snb_fbc_funcs = {
> @@ -566,20 +571,20 @@ static const struct intel_fbc_funcs snb_fbc_funcs = {
>  static void glk_fbc_program_cfb_stride(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	u32 val = 0;
>  
>  	if (fbc_state->override_cfb_stride)
>  		val |= FBC_STRIDE_OVERRIDE |
>  			FBC_STRIDE(fbc_state->override_cfb_stride / fbc->limit);
>  
> -	intel_de_write(i915, GLK_FBC_STRIDE(fbc->id), val);
> +	intel_de_write(display, GLK_FBC_STRIDE(fbc->id), val);
>  }
>  
>  static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	u32 val = 0;
>  
>  	/* Display WA #0529: skl, kbl, bxt. */
> @@ -587,7 +592,7 @@ static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
>  		val |= CHICKEN_FBC_STRIDE_OVERRIDE |
>  			CHICKEN_FBC_STRIDE(fbc_state->override_cfb_stride / fbc->limit);
>  
> -	intel_de_rmw(i915, CHICKEN_MISC_4,
> +	intel_de_rmw(display, CHICKEN_MISC_4,
>  		     CHICKEN_FBC_STRIDE_OVERRIDE |
>  		     CHICKEN_FBC_STRIDE_MASK, val);
>  }
> @@ -595,7 +600,8 @@ static void skl_fbc_program_cfb_stride(struct intel_fbc *fbc)
>  static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
>  {
>  	const struct intel_fbc_state *fbc_state = &fbc->state;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	u32 dpfc_ctl;
>  
>  	dpfc_ctl = g4x_dpfc_ctl_limit(fbc);
> @@ -603,7 +609,7 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
>  	if (IS_IVYBRIDGE(i915))
>  		dpfc_ctl |= DPFC_CTL_PLANE_IVB(fbc_state->plane->i9xx_plane);
>  
> -	if (DISPLAY_VER(i915) >= 20)
> +	if (DISPLAY_VER(display) >= 20)
>  		dpfc_ctl |= DPFC_CTL_PLANE_BINDING(fbc_state->plane->id);
>  
>  	if (fbc_state->fence_id >= 0)
> @@ -617,35 +623,35 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)
>  
>  static void ivb_fbc_activate(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	u32 dpfc_ctl;
>  
> -	if (DISPLAY_VER(i915) >= 10)
> +	if (DISPLAY_VER(display) >= 10)
>  		glk_fbc_program_cfb_stride(fbc);
> -	else if (DISPLAY_VER(i915) == 9)
> +	else if (DISPLAY_VER(display) == 9)
>  		skl_fbc_program_cfb_stride(fbc);
>  
> -	if (intel_fbc_has_fences(i915))
> +	if (intel_fbc_has_fences(display))
>  		snb_fbc_program_fence(fbc);
>  
>  	/* wa_14019417088 Alternative WA*/
>  	dpfc_ctl = ivb_dpfc_ctl(fbc);
> -	if (DISPLAY_VER(i915) >= 20)
> -		intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
> +	if (DISPLAY_VER(display) >= 20)
> +		intel_de_write(display, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
>  
> -	intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id),
> +	intel_de_write(display, ILK_DPFC_CONTROL(fbc->id),
>  		       DPFC_CTL_EN | dpfc_ctl);
>  }
>  
>  static bool ivb_fbc_is_compressing(struct intel_fbc *fbc)
>  {
> -	return intel_de_read(fbc->i915, ILK_DPFC_STATUS2(fbc->id)) & DPFC_COMP_SEG_MASK_IVB;
> +	return intel_de_read(fbc->display, ILK_DPFC_STATUS2(fbc->id)) & DPFC_COMP_SEG_MASK_IVB;
>  }
>  
>  static void ivb_fbc_set_false_color(struct intel_fbc *fbc,
>  				    bool enable)
>  {
> -	intel_de_rmw(fbc->i915, ILK_DPFC_CONTROL(fbc->id),
> +	intel_de_rmw(fbc->display, ILK_DPFC_CONTROL(fbc->id),
>  		     DPFC_CTL_FALSE_COLOR, enable ? DPFC_CTL_FALSE_COLOR : 0);
>  }
>  
> @@ -690,10 +696,10 @@ static bool intel_fbc_is_compressing(struct intel_fbc *fbc)
>  
>  static void intel_fbc_nuke(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  
>  	lockdep_assert_held(&fbc->lock);
> -	drm_WARN_ON(&i915->drm, fbc->flip_pending);
> +	drm_WARN_ON(display->drm, fbc->flip_pending);
>  
>  	trace_intel_fbc_nuke(fbc->state.plane);
>  
> @@ -720,29 +726,32 @@ static void intel_fbc_deactivate(struct intel_fbc *fbc, const char *reason)
>  	fbc->no_fbc_reason = reason;
>  }
>  
> -static u64 intel_fbc_cfb_base_max(struct drm_i915_private *i915)
> +static u64 intel_fbc_cfb_base_max(struct intel_display *display)
>  {
> -	if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
> +	if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
>  		return BIT_ULL(28);
>  	else
>  		return BIT_ULL(32);
>  }
>  
> -static u64 intel_fbc_stolen_end(struct drm_i915_private *i915)
> +static u64 intel_fbc_stolen_end(struct intel_display *display)
>  {
> +	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
>  	u64 end;
>  
>  	/* The FBC hardware for BDW/SKL doesn't have access to the stolen
>  	 * reserved range size, so it always assumes the maximum (8mb) is used.
>  	 * If we enable FBC using a CFB on that memory range we'll get FIFO
>  	 * underruns, even if that range is not reserved by the BIOS. */
> -	if (IS_BROADWELL(i915) ||
> -	    (DISPLAY_VER(i915) == 9 && !IS_BROXTON(i915)))
> +	if (IS_BROADWELL(to_i915(display->drm)) ||
> +	    (DISPLAY_VER(display) == 9 && !IS_BROXTON(to_i915(display->drm))))
>  		end = i915_gem_stolen_area_size(i915) - 8 * 1024 * 1024;
>  	else
>  		end = U64_MAX;
>  
> -	return min(end, intel_fbc_cfb_base_max(i915));
> +	return min(end, intel_fbc_cfb_base_max(display));
>  }
>  
>  static int intel_fbc_min_limit(const struct intel_plane_state *plane_state)
> @@ -750,8 +759,10 @@ static int intel_fbc_min_limit(const struct intel_plane_state *plane_state)
>  	return plane_state->hw.fb->format->cpp[0] == 2 ? 2 : 1;
>  }
>  
> -static int intel_fbc_max_limit(struct drm_i915_private *i915)
> +static int intel_fbc_max_limit(struct intel_display *display)
>  {
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
>  	/* WaFbcOnly1to1Ratio:ctg */
>  	if (IS_G4X(i915))
>  		return 1;
> @@ -766,8 +777,9 @@ static int intel_fbc_max_limit(struct drm_i915_private *i915)
>  static int find_compression_limit(struct intel_fbc *fbc,
>  				  unsigned int size, int min_limit)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> -	u64 end = intel_fbc_stolen_end(i915);
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +	u64 end = intel_fbc_stolen_end(display);
>  	int ret, limit = min_limit;
>  
>  	size /= limit;
> @@ -778,7 +790,7 @@ static int find_compression_limit(struct intel_fbc *fbc,
>  	if (ret == 0)
>  		return limit;
>  
> -	for (; limit <= intel_fbc_max_limit(i915); limit <<= 1) {
> +	for (; limit <= intel_fbc_max_limit(display); limit <<= 1) {
>  		ret = i915_gem_stolen_insert_node_in_range(i915, &fbc->compressed_fb,
>  							   size >>= 1, 4096, 0, end);
>  		if (ret == 0)
> @@ -791,15 +803,16 @@ static int find_compression_limit(struct intel_fbc *fbc,
>  static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
>  			       unsigned int size, int min_limit)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	int ret;
>  
> -	drm_WARN_ON(&i915->drm,
> +	drm_WARN_ON(display->drm,
>  		    i915_gem_stolen_node_allocated(&fbc->compressed_fb));
> -	drm_WARN_ON(&i915->drm,
> +	drm_WARN_ON(display->drm,
>  		    i915_gem_stolen_node_allocated(&fbc->compressed_llb));
>  
> -	if (DISPLAY_VER(i915) < 5 && !IS_G4X(i915)) {
> +	if (DISPLAY_VER(display) < 5 && !IS_G4X(to_i915(display->drm))) {
>  		ret = i915_gem_stolen_insert_node(i915, &fbc->compressed_llb,
>  						  4096, 4096);
>  		if (ret)
> @@ -810,12 +823,12 @@ static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
>  	if (!ret)
>  		goto err_llb;
>  	else if (ret > min_limit)
> -		drm_info_once(&i915->drm,
> +		drm_info_once(display->drm,
>  			      "Reducing the compressed framebuffer size. This may lead to less power savings than a non-reduced-size. Try to increase stolen memory size if available in BIOS.\n");
>  
>  	fbc->limit = ret;
>  
> -	drm_dbg_kms(&i915->drm,
> +	drm_dbg_kms(display->drm,
>  		    "reserved %llu bytes of contiguous stolen space for FBC, limit: %d\n",
>  		    i915_gem_stolen_node_size(&fbc->compressed_fb), fbc->limit);
>  	return 0;
> @@ -825,7 +838,8 @@ static int intel_fbc_alloc_cfb(struct intel_fbc *fbc,
>  		i915_gem_stolen_remove_node(i915, &fbc->compressed_llb);
>  err:
>  	if (i915_gem_stolen_initialized(i915))
> -		drm_info_once(&i915->drm, "not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size);
> +		drm_info_once(display->drm,
> +			      "not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size);
>  	return -ENOSPC;
>  }
>  
> @@ -836,14 +850,15 @@ static void intel_fbc_program_cfb(struct intel_fbc *fbc)
>  
>  static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
>  	if (IS_SKYLAKE(i915) || IS_BROXTON(i915)) {
>  		/*
>  		 * WaFbcHighMemBwCorruptionAvoidance:skl,bxt
>  		 * Display WA #0883: skl,bxt
>  		 */
> -		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
> +		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
>  			     0, DPFC_DISABLE_DUMMY0);
>  	}
>  
> @@ -853,24 +868,25 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
>  		 * WaFbcNukeOnHostModify:skl,kbl,cfl
>  		 * Display WA #0873: skl,kbl,cfl
>  		 */
> -		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
> +		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
>  			     0, DPFC_NUKE_ON_ANY_MODIFICATION);
>  	}
>  
>  	/* Wa_1409120013:icl,jsl,tgl,dg1 */
> -	if (IS_DISPLAY_VER(i915, 11, 12))
> -		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
> +	if (IS_DISPLAY_VER(display, 11, 12))
> +		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
>  			     0, DPFC_CHICKEN_COMP_DUMMY_PIXEL);
>  
>  	/* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp,mtl */
> -	if (DISPLAY_VER(i915) >= 11 && !IS_DG2(i915))
> -		intel_de_rmw(i915, ILK_DPFC_CHICKEN(fbc->id),
> +	if (DISPLAY_VER(display) >= 11 && !IS_DG2(i915))
> +		intel_de_rmw(display, ILK_DPFC_CHICKEN(fbc->id),
>  			     0, DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
>  }
>  
>  static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
>  	if (WARN_ON(intel_fbc_hw_is_active(fbc)))
>  		return;
> @@ -881,12 +897,12 @@ static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
>  		i915_gem_stolen_remove_node(i915, &fbc->compressed_fb);
>  }
>  
> -void intel_fbc_cleanup(struct drm_i915_private *i915)
> +void intel_fbc_cleanup(struct intel_display *display)
>  {
>  	struct intel_fbc *fbc;
>  	enum intel_fbc_id fbc_id;
>  
> -	for_each_intel_fbc(i915, fbc, fbc_id) {
> +	for_each_intel_fbc(display, fbc, fbc_id) {
>  		mutex_lock(&fbc->lock);
>  		__intel_fbc_cleanup_cfb(fbc);
>  		mutex_unlock(&fbc->lock);
> @@ -938,15 +954,16 @@ static bool icl_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
>  
>  static bool stride_is_valid(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
> -	if (DISPLAY_VER(i915) >= 11)
> +	if (DISPLAY_VER(display) >= 11)
>  		return icl_fbc_stride_is_valid(plane_state);
> -	else if (DISPLAY_VER(i915) >= 9)
> +	else if (DISPLAY_VER(display) >= 9)
>  		return skl_fbc_stride_is_valid(plane_state);
> -	else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
> +	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
>  		return g4x_fbc_stride_is_valid(plane_state);
> -	else if (DISPLAY_VER(i915) == 4)
> +	else if (DISPLAY_VER(display) == 4)
>  		return i965_fbc_stride_is_valid(plane_state);
>  	else
>  		return i8xx_fbc_stride_is_valid(plane_state);
> @@ -954,7 +971,7 @@ static bool stride_is_valid(const struct intel_plane_state *plane_state)
>  
>  static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	const struct drm_framebuffer *fb = plane_state->hw.fb;
>  
>  	switch (fb->format->format) {
> @@ -964,7 +981,7 @@ static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane
>  	case DRM_FORMAT_XRGB1555:
>  	case DRM_FORMAT_RGB565:
>  		/* 16bpp not supported on gen2 */
> -		if (DISPLAY_VER(i915) == 2)
> +		if (DISPLAY_VER(display) == 2)
>  			return false;
>  		return true;
>  	default:
> @@ -974,7 +991,8 @@ static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane
>  
>  static bool g4x_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	const struct drm_framebuffer *fb = plane_state->hw.fb;
>  
>  	switch (fb->format->format) {
> @@ -1009,11 +1027,12 @@ static bool lnl_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_
>  
>  static bool pixel_format_is_valid(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
> -	if (DISPLAY_VER(i915) >= 20)
> +	if (DISPLAY_VER(display) >= 20)
>  		return lnl_fbc_pixel_format_is_valid(plane_state);
> -	else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
> +	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
>  		return g4x_fbc_pixel_format_is_valid(plane_state);
>  	else
>  		return i8xx_fbc_pixel_format_is_valid(plane_state);
> @@ -1043,11 +1062,12 @@ static bool skl_fbc_rotation_is_valid(const struct intel_plane_state *plane_stat
>  
>  static bool rotation_is_valid(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
> -	if (DISPLAY_VER(i915) >= 9)
> +	if (DISPLAY_VER(display) >= 9)
>  		return skl_fbc_rotation_is_valid(plane_state);
> -	else if (DISPLAY_VER(i915) >= 5 || IS_G4X(i915))
> +	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
>  		return g4x_fbc_rotation_is_valid(plane_state);
>  	else
>  		return i8xx_fbc_rotation_is_valid(plane_state);
> @@ -1061,19 +1081,20 @@ static bool rotation_is_valid(const struct intel_plane_state *plane_state)
>   */
>  static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	unsigned int effective_w, effective_h, max_w, max_h;
>  
> -	if (DISPLAY_VER(i915) >= 11) {
> +	if (DISPLAY_VER(display) >= 11) {
>  		max_w = 8192;
>  		max_h = 4096;
> -	} else if (DISPLAY_VER(i915) >= 10) {
> +	} else if (DISPLAY_VER(display) >= 10) {
>  		max_w = 5120;
>  		max_h = 4096;
> -	} else if (DISPLAY_VER(i915) >= 7) {
> +	} else if (DISPLAY_VER(display) >= 7) {
>  		max_w = 4096;
>  		max_h = 4096;
> -	} else if (IS_G4X(i915) || DISPLAY_VER(i915) >= 5) {
> +	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
>  		max_w = 4096;
>  		max_h = 2048;
>  	} else {
> @@ -1091,16 +1112,17 @@ static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *
>  
>  static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	unsigned int w, h, max_w, max_h;
>  
> -	if (DISPLAY_VER(i915) >= 10) {
> +	if (DISPLAY_VER(display) >= 10) {
>  		max_w = 5120;
>  		max_h = 4096;
> -	} else if (DISPLAY_VER(i915) >= 8 || IS_HASWELL(i915)) {
> +	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
>  		max_w = 4096;
>  		max_h = 4096;
> -	} else if (IS_G4X(i915) || DISPLAY_VER(i915) >= 5) {
> +	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
>  		max_w = 4096;
>  		max_h = 2048;
>  	} else {
> @@ -1128,9 +1150,9 @@ static bool skl_fbc_tiling_valid(const struct intel_plane_state *plane_state)
>  
>  static bool tiling_is_valid(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  
> -	if (DISPLAY_VER(i915) >= 9)
> +	if (DISPLAY_VER(display) >= 9)
>  		return skl_fbc_tiling_valid(plane_state);
>  	else
>  		return i8xx_fbc_tiling_valid(plane_state);
> @@ -1140,7 +1162,7 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
>  				   struct intel_crtc *crtc,
>  				   struct intel_plane *plane)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	struct intel_display *display = to_intel_display(state->base.dev);
>  	const struct intel_crtc_state *crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
>  	const struct intel_plane_state *plane_state =
> @@ -1158,8 +1180,8 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
>  
>  	fbc_state->fence_y_offset = intel_plane_fence_y_offset(plane_state);
>  
> -	drm_WARN_ON(&i915->drm, plane_state->flags & PLANE_HAS_FENCE &&
> -		    !intel_fbc_has_fences(i915));
> +	drm_WARN_ON(display->drm, plane_state->flags & PLANE_HAS_FENCE &&
> +		    !intel_fbc_has_fences(display));
>  
>  	if (plane_state->flags & PLANE_HAS_FENCE)
>  		fbc_state->fence_id =  i915_vma_fence_id(plane_state->ggtt_vma);
> @@ -1173,7 +1195,7 @@ static void intel_fbc_update_state(struct intel_atomic_state *state,
>  
>  static bool intel_fbc_is_fence_ok(const struct intel_plane_state *plane_state)
>  {
> -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  
>  	/*
>  	 * The use of a CPU fence is one of two ways to detect writes by the
> @@ -1187,7 +1209,7 @@ static bool intel_fbc_is_fence_ok(const struct intel_plane_state *plane_state)
>  	 * so have no fence associated with it) due to aperture constraints
>  	 * at the time of pinning.
>  	 */
> -	return DISPLAY_VER(i915) >= 9 ||
> +	return DISPLAY_VER(display) >= 9 ||
>  		(plane_state->flags & PLANE_HAS_FENCE &&
>  		 i915_vma_fence_id(plane_state->ggtt_vma) != -1);
>  }
> @@ -1212,7 +1234,8 @@ static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state)
>  static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  				 struct intel_plane *plane)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	struct intel_display *display = to_intel_display(state->base.dev);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	struct intel_plane_state *plane_state =
>  		intel_atomic_get_new_plane_state(state, plane);
>  	const struct drm_framebuffer *fb = plane_state->hw.fb;
> @@ -1233,7 +1256,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  		return 0;
>  	}
>  
> -	if (!i915->display.params.enable_fbc) {
> +	if (!display->params.enable_fbc) {
>  		plane_state->no_fbc_reason = "disabled per module param or by default";
>  		return 0;
>  	}
> @@ -1271,14 +1294,14 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  	 * Recommendation is to keep this combination disabled
>  	 * Bspec: 50422 HSD: 14010260002
>  	 */
> -	if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_sel_update &&
> +	if (IS_DISPLAY_VER(display, 12, 14) && crtc_state->has_sel_update &&
>  	    !crtc_state->has_panel_replay) {
>  		plane_state->no_fbc_reason = "PSR2 enabled";
>  		return 0;
>  	}
>  
>  	/* Wa_14016291713 */
> -	if ((IS_DISPLAY_VER(i915, 12, 13) ||
> +	if ((IS_DISPLAY_VER(display, 12, 13) ||
>  	     IS_DISPLAY_IP_STEP(i915, IP_VER(14, 0), STEP_A0, STEP_C0)) &&
>  	    crtc_state->has_psr && !crtc_state->has_panel_replay) {
>  		plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)";
> @@ -1305,7 +1328,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  		return 0;
>  	}
>  
> -	if (DISPLAY_VER(i915) < 20 &&
> +	if (DISPLAY_VER(display) < 20 &&
>  	    plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE &&
>  	    fb->format->has_alpha) {
>  		plane_state->no_fbc_reason = "per-pixel alpha not supported";
> @@ -1327,14 +1350,14 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  	 * having a Y offset that isn't divisible by 4 causes FIFO underrun
>  	 * and screen flicker.
>  	 */
> -	if (DISPLAY_VER(i915) >= 9 &&
> +	if (DISPLAY_VER(display) >= 9 &&
>  	    plane_state->view.color_plane[0].y & 3) {
>  		plane_state->no_fbc_reason = "plane start Y offset misaligned";
>  		return 0;
>  	}
>  
>  	/* Wa_22010751166: icl, ehl, tgl, dg1, rkl */
> -	if (DISPLAY_VER(i915) >= 11 &&
> +	if (DISPLAY_VER(display) >= 11 &&
>  	    (plane_state->view.color_plane[0].y +
>  	     (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) {
>  		plane_state->no_fbc_reason = "plane end Y offset misaligned";
> @@ -1410,7 +1433,7 @@ static bool __intel_fbc_pre_update(struct intel_atomic_state *state,
>  				   struct intel_crtc *crtc,
>  				   struct intel_plane *plane)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	struct intel_display *display = to_intel_display(state->base.dev);
>  	struct intel_fbc *fbc = plane->fbc;
>  	bool need_vblank_wait = false;
>  
> @@ -1436,7 +1459,7 @@ static bool __intel_fbc_pre_update(struct intel_atomic_state *state,
>  	 * and skipping the extra vblank wait before the plane update
>  	 * if at least one frame has already passed.
>  	 */
> -	if (fbc->activated && DISPLAY_VER(i915) >= 10)
> +	if (fbc->activated && DISPLAY_VER(display) >= 10)
>  		need_vblank_wait = true;
>  	fbc->activated = false;
>  
> @@ -1470,13 +1493,13 @@ bool intel_fbc_pre_update(struct intel_atomic_state *state,
>  
>  static void __intel_fbc_disable(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  	struct intel_plane *plane = fbc->state.plane;
>  
>  	lockdep_assert_held(&fbc->lock);
> -	drm_WARN_ON(&i915->drm, fbc->active);
> +	drm_WARN_ON(display->drm, fbc->active);
>  
> -	drm_dbg_kms(&i915->drm, "Disabling FBC on [PLANE:%d:%s]\n",
> +	drm_dbg_kms(display->drm, "Disabling FBC on [PLANE:%d:%s]\n",
>  		    plane->base.base.id, plane->base.name);
>  
>  	__intel_fbc_cleanup_cfb(fbc);
> @@ -1553,7 +1576,7 @@ void intel_fbc_invalidate(struct drm_i915_private *i915,
>  	struct intel_fbc *fbc;
>  	enum intel_fbc_id fbc_id;
>  
> -	for_each_intel_fbc(i915, fbc, fbc_id)
> +	for_each_intel_fbc(&i915->display, fbc, fbc_id)
>  		__intel_fbc_invalidate(fbc, frontbuffer_bits, origin);
>  
>  }
> @@ -1592,7 +1615,7 @@ void intel_fbc_flush(struct drm_i915_private *i915,
>  	struct intel_fbc *fbc;
>  	enum intel_fbc_id fbc_id;
>  
> -	for_each_intel_fbc(i915, fbc, fbc_id)
> +	for_each_intel_fbc(&i915->display, fbc, fbc_id)
>  		__intel_fbc_flush(fbc, frontbuffer_bits, origin);
>  }
>  
> @@ -1617,7 +1640,7 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
>  			       struct intel_crtc *crtc,
>  			       struct intel_plane *plane)
>  {
> -	struct drm_i915_private *i915 = to_i915(state->base.dev);
> +	struct intel_display *display = to_intel_display(state->base.dev);
>  	const struct intel_plane_state *plane_state =
>  		intel_atomic_get_new_plane_state(state, plane);
>  	struct intel_fbc *fbc = plane->fbc;
> @@ -1636,7 +1659,7 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
>  		__intel_fbc_disable(fbc);
>  	}
>  
> -	drm_WARN_ON(&i915->drm, fbc->active);
> +	drm_WARN_ON(display->drm, fbc->active);
>  
>  	fbc->no_fbc_reason = plane_state->no_fbc_reason;
>  	if (fbc->no_fbc_reason)
> @@ -1658,7 +1681,7 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
>  		return;
>  	}
>  
> -	drm_dbg_kms(&i915->drm, "Enabling FBC on [PLANE:%d:%s]\n",
> +	drm_dbg_kms(display->drm, "Enabling FBC on [PLANE:%d:%s]\n",
>  		    plane->base.base.id, plane->base.name);
>  	fbc->no_fbc_reason = "FBC enabled but not active yet\n";
>  
> @@ -1676,10 +1699,10 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
>   */
>  void intel_fbc_disable(struct intel_crtc *crtc)
>  {
> -	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +	struct intel_display *display = to_intel_display(crtc->base.dev);
>  	struct intel_plane *plane;
>  
> -	for_each_intel_plane(&i915->drm, plane) {
> +	for_each_intel_plane(display->drm, plane) {
>  		struct intel_fbc *fbc = plane->fbc;
>  
>  		if (!fbc || plane->pipe != crtc->pipe)
> @@ -1724,7 +1747,8 @@ void intel_fbc_update(struct intel_atomic_state *state,
>  static void intel_fbc_underrun_work_fn(struct work_struct *work)
>  {
>  	struct intel_fbc *fbc = container_of(work, typeof(*fbc), underrun_work);
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
>  	mutex_lock(&fbc->lock);
>  
> @@ -1732,7 +1756,7 @@ static void intel_fbc_underrun_work_fn(struct work_struct *work)
>  	if (fbc->underrun_detected || !fbc->state.plane)
>  		goto out;
>  
> -	drm_dbg_kms(&i915->drm, "Disabling FBC due to FIFO underrun.\n");
> +	drm_dbg_kms(display->drm, "Disabling FBC due to FIFO underrun.\n");
>  	fbc->underrun_detected = true;
>  
>  	intel_fbc_deactivate(fbc, "FIFO underrun");
> @@ -1745,14 +1769,14 @@ static void intel_fbc_underrun_work_fn(struct work_struct *work)
>  
>  static void __intel_fbc_reset_underrun(struct intel_fbc *fbc)
>  {
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
>  
>  	cancel_work_sync(&fbc->underrun_work);
>  
>  	mutex_lock(&fbc->lock);
>  
>  	if (fbc->underrun_detected) {
> -		drm_dbg_kms(&i915->drm,
> +		drm_dbg_kms(display->drm,
>  			    "Re-allowing FBC after fifo underrun\n");
>  		fbc->no_fbc_reason = "FIFO underrun cleared";
>  	}
> @@ -1763,22 +1787,24 @@ static void __intel_fbc_reset_underrun(struct intel_fbc *fbc)
>  
>  /*
>   * intel_fbc_reset_underrun - reset FBC fifo underrun status.
> - * @i915: the i915 device
> + * @display: display
>   *
>   * See intel_fbc_handle_fifo_underrun_irq(). For automated testing we
>   * want to re-enable FBC after an underrun to increase test coverage.
>   */
> -void intel_fbc_reset_underrun(struct drm_i915_private *i915)
> +void intel_fbc_reset_underrun(struct intel_display *display)
>  {
>  	struct intel_fbc *fbc;
>  	enum intel_fbc_id fbc_id;
>  
> -	for_each_intel_fbc(i915, fbc, fbc_id)
> +	for_each_intel_fbc(display, fbc, fbc_id)
>  		__intel_fbc_reset_underrun(fbc);
>  }
>  
>  static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
>  {
> +	struct drm_i915_private *i915 = to_i915(fbc->display->drm);
> +
>  	/*
>  	 * There's no guarantee that underrun_detected won't be set to true
>  	 * right after this check and before the work is scheduled, but that's
> @@ -1790,12 +1816,12 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
>  	if (READ_ONCE(fbc->underrun_detected))
>  		return;
>  
> -	queue_work(fbc->i915->unordered_wq, &fbc->underrun_work);
> +	queue_work(i915->unordered_wq, &fbc->underrun_work);
>  }
>  
>  /**
>   * intel_fbc_handle_fifo_underrun_irq - disable FBC when we get a FIFO underrun
> - * @i915: i915 device
> + * @display: display
>   *
>   * Without FBC, most underruns are harmless and don't really cause too many
>   * problems, except for an annoying message on dmesg. With FBC, underruns can
> @@ -1807,12 +1833,12 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
>   *
>   * This function is called from the IRQ handler.
>   */
> -void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
> +void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display)
>  {
>  	struct intel_fbc *fbc;
>  	enum intel_fbc_id fbc_id;
>  
> -	for_each_intel_fbc(i915, fbc, fbc_id)
> +	for_each_intel_fbc(display, fbc, fbc_id)
>  		__intel_fbc_handle_fifo_underrun_irq(fbc);
>  }
>  
> @@ -1825,15 +1851,17 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
>   * space to change the value during runtime without sanitizing it again. IGT
>   * relies on being able to change i915.enable_fbc at runtime.
>   */
> -static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
> +static int intel_sanitize_fbc_option(struct intel_display *display)
>  {
> -	if (i915->display.params.enable_fbc >= 0)
> -		return !!i915->display.params.enable_fbc;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  
> -	if (!HAS_FBC(i915))
> +	if (display->params.enable_fbc >= 0)
> +		return !!display->params.enable_fbc;
> +
> +	if (!HAS_FBC(display))
>  		return 0;
>  
> -	if (IS_BROADWELL(i915) || DISPLAY_VER(i915) >= 9)
> +	if (IS_BROADWELL(i915) || DISPLAY_VER(display) >= 9)
>  		return 1;
>  
>  	return 0;
> @@ -1844,9 +1872,10 @@ void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)
>  	plane->fbc = fbc;
>  }
>  
> -static struct intel_fbc *intel_fbc_create(struct drm_i915_private *i915,
> +static struct intel_fbc *intel_fbc_create(struct intel_display *display,
>  					  enum intel_fbc_id fbc_id)
>  {
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	struct intel_fbc *fbc;
>  
>  	fbc = kzalloc(sizeof(*fbc), GFP_KERNEL);
> @@ -1854,19 +1883,19 @@ static struct intel_fbc *intel_fbc_create(struct drm_i915_private *i915,
>  		return NULL;
>  
>  	fbc->id = fbc_id;
> -	fbc->i915 = i915;
> +	fbc->display = display;
>  	INIT_WORK(&fbc->underrun_work, intel_fbc_underrun_work_fn);
>  	mutex_init(&fbc->lock);
>  
> -	if (DISPLAY_VER(i915) >= 7)
> +	if (DISPLAY_VER(display) >= 7)
>  		fbc->funcs = &ivb_fbc_funcs;
> -	else if (DISPLAY_VER(i915) == 6)
> +	else if (DISPLAY_VER(display) == 6)
>  		fbc->funcs = &snb_fbc_funcs;
> -	else if (DISPLAY_VER(i915) == 5)
> +	else if (DISPLAY_VER(display) == 5)
>  		fbc->funcs = &ilk_fbc_funcs;
>  	else if (IS_G4X(i915))
>  		fbc->funcs = &g4x_fbc_funcs;
> -	else if (DISPLAY_VER(i915) == 4)
> +	else if (DISPLAY_VER(display) == 4)
>  		fbc->funcs = &i965_fbc_funcs;
>  	else
>  		fbc->funcs = &i8xx_fbc_funcs;
> @@ -1876,36 +1905,36 @@ static struct intel_fbc *intel_fbc_create(struct drm_i915_private *i915,
>  
>  /**
>   * intel_fbc_init - Initialize FBC
> - * @i915: the i915 device
> + * @display: display
>   *
>   * This function might be called during PM init process.
>   */
> -void intel_fbc_init(struct drm_i915_private *i915)
> +void intel_fbc_init(struct intel_display *display)
>  {
>  	enum intel_fbc_id fbc_id;
>  
> -	i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915);
> -	drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
> -		    i915->display.params.enable_fbc);
> +	display->params.enable_fbc = intel_sanitize_fbc_option(display);
> +	drm_dbg_kms(display->drm, "Sanitized enable_fbc value: %d\n",
> +		    display->params.enable_fbc);
>  
> -	for_each_fbc_id(i915, fbc_id)
> -		i915->display.fbc[fbc_id] = intel_fbc_create(i915, fbc_id);
> +	for_each_fbc_id(display, fbc_id)
> +		display->fbc[fbc_id] = intel_fbc_create(display, fbc_id);
>  }
>  
>  /**
>   * intel_fbc_sanitize - Sanitize FBC
> - * @i915: the i915 device
> + * @display: display
>   *
>   * Make sure FBC is initially disabled since we have no
>   * idea eg. into which parts of stolen it might be scribbling
>   * into.
>   */
> -void intel_fbc_sanitize(struct drm_i915_private *i915)
> +void intel_fbc_sanitize(struct intel_display *display)
>  {
>  	struct intel_fbc *fbc;
>  	enum intel_fbc_id fbc_id;
>  
> -	for_each_intel_fbc(i915, fbc, fbc_id) {
> +	for_each_intel_fbc(display, fbc, fbc_id) {
>  		if (intel_fbc_hw_is_active(fbc))
>  			intel_fbc_hw_deactivate(fbc);
>  	}
> @@ -1914,11 +1943,12 @@ void intel_fbc_sanitize(struct drm_i915_private *i915)
>  static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
>  {
>  	struct intel_fbc *fbc = m->private;
> -	struct drm_i915_private *i915 = fbc->i915;
> +	struct intel_display *display = fbc->display;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
>  	struct intel_plane *plane;
>  	intel_wakeref_t wakeref;
>  
> -	drm_modeset_lock_all(&i915->drm);
> +	drm_modeset_lock_all(display->drm);
>  
>  	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>  	mutex_lock(&fbc->lock);
> @@ -1931,7 +1961,7 @@ static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
>  		seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
>  	}
>  
> -	for_each_intel_plane(&i915->drm, plane) {
> +	for_each_intel_plane(display->drm, plane) {
>  		const struct intel_plane_state *plane_state =
>  			to_intel_plane_state(plane->base.state);
>  
> @@ -1947,7 +1977,7 @@ static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
>  	mutex_unlock(&fbc->lock);
>  	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
>  
> -	drm_modeset_unlock_all(&i915->drm);
> +	drm_modeset_unlock_all(display->drm);
>  
>  	return 0;
>  }
> @@ -2004,12 +2034,12 @@ void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc)
>  }
>  
>  /* FIXME: remove this once igt is on board with per-crtc stuff */
> -void intel_fbc_debugfs_register(struct drm_i915_private *i915)
> +void intel_fbc_debugfs_register(struct intel_display *display)
>  {
> -	struct drm_minor *minor = i915->drm.primary;
> +	struct drm_minor *minor = display->drm->primary;
>  	struct intel_fbc *fbc;
>  
> -	fbc = i915->display.fbc[INTEL_FBC_A];
> +	fbc = display->fbc[INTEL_FBC_A];
>  	if (fbc)
>  		intel_fbc_debugfs_add(fbc, minor->debugfs_root);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
> index 6720ec8ee8a2..834b271505b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -13,6 +13,7 @@ struct drm_i915_private;
>  struct intel_atomic_state;
>  struct intel_crtc;
>  struct intel_crtc_state;
> +struct intel_display;
>  struct intel_fbc;
>  struct intel_plane;
>  struct intel_plane_state;
> @@ -31,9 +32,9 @@ bool intel_fbc_pre_update(struct intel_atomic_state *state,
>  			  struct intel_crtc *crtc);
>  void intel_fbc_post_update(struct intel_atomic_state *state,
>  			   struct intel_crtc *crtc);
> -void intel_fbc_init(struct drm_i915_private *dev_priv);
> -void intel_fbc_cleanup(struct drm_i915_private *dev_priv);
> -void intel_fbc_sanitize(struct drm_i915_private *dev_priv);
> +void intel_fbc_init(struct intel_display *dev_priv);
> +void intel_fbc_cleanup(struct intel_display *dev_priv);
> +void intel_fbc_sanitize(struct intel_display *dev_priv);
>  void intel_fbc_update(struct intel_atomic_state *state,
>  		      struct intel_crtc *crtc);
>  void intel_fbc_disable(struct intel_crtc *crtc);
> @@ -43,9 +44,9 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
>  void intel_fbc_flush(struct drm_i915_private *dev_priv,
>  		     unsigned int frontbuffer_bits, enum fb_op_origin origin);
>  void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
> -void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
> -void intel_fbc_reset_underrun(struct drm_i915_private *i915);
> +void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);
> +void intel_fbc_reset_underrun(struct intel_display *display);
>  void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
> -void intel_fbc_debugfs_register(struct drm_i915_private *i915);
> +void intel_fbc_debugfs_register(struct intel_display *display);
>  
>  #endif /* __INTEL_FBC_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> index e5e4ca7cc499..8949fbb1cc60 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> @@ -440,7 +440,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
>  			drm_err(&dev_priv->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));
>  	}
>  
> -	intel_fbc_handle_fifo_underrun_irq(dev_priv);
> +	intel_fbc_handle_fifo_underrun_irq(&dev_priv->display);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index 7602cb30ebf1..6f85f5352455 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -966,7 +966,7 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915,
>  		}
>  	}
>  
> -	intel_fbc_sanitize(i915);
> +	intel_fbc_sanitize(&i915->display);
>  
>  	intel_sanitize_plane_mapping(i915);
>  
> -- 
> 2.44.2
> 

Re: [PATCH 02/20] drm/i915/fbc: Convert to intel_display, mostly

[Ville Syrjälä]

On Tue, Jul 09, 2024 at 03:49:29PM -0400, Rodrigo Vivi wrote:
> On Fri, Jul 05, 2024 at 05:52:36PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Switch the FBC code over to intel_display from i915, as
> > much as possible. This is the future direction so that
> > the display code can be shared between i915 and xe more
> > cleanly.
> > 
> > Some of the platform checks and the stolen mem facing stiff
> > still need i915 around though.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  .../drm/i915/display/intel_display_debugfs.c  |   4 +-
> >  .../drm/i915/display/intel_display_driver.c   |   4 +-
> >  drivers/gpu/drm/i915/display/intel_fbc.c      | 422 ++++++++++--------
> >  drivers/gpu/drm/i915/display/intel_fbc.h      |  13 +-
> >  .../drm/i915/display/intel_fifo_underrun.c    |   2 +-
> >  .../drm/i915/display/intel_modeset_setup.c    |   2 +-
> >  6 files changed, 239 insertions(+), 208 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > index 91757fed9c6d..5cf9b4af9adf 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > @@ -1008,7 +1008,7 @@ i915_fifo_underrun_reset_write(struct file *filp,
> >  			return ret;
> >  	}
> >  
> > -	intel_fbc_reset_underrun(dev_priv);
> > +	intel_fbc_reset_underrun(&dev_priv->display);
> >  
> >  	return cnt;
> >  }
> > @@ -1063,7 +1063,7 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)
> >  	intel_bios_debugfs_register(i915);
> >  	intel_cdclk_debugfs_register(i915);
> >  	intel_dmc_debugfs_register(i915);
> > -	intel_fbc_debugfs_register(i915);
> > +	intel_fbc_debugfs_register(&i915->display);
> >  	intel_hpd_debugfs_register(i915);
> >  	intel_opregion_debugfs_register(i915);
> >  	intel_psr_debugfs_register(i915);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
> > index 794b4af38055..13e206ec450f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> > @@ -265,7 +265,7 @@ int intel_display_driver_probe_noirq(struct drm_i915_private *i915)
> >  
> >  	intel_init_quirks(display);
> >  
> > -	intel_fbc_init(i915);
> > +	intel_fbc_init(display);
> >  
> >  	return 0;
> >  
> > @@ -607,7 +607,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
> >  	destroy_workqueue(i915->display.wq.flip);
> >  	destroy_workqueue(i915->display.wq.modeset);
> >  
> > -	intel_fbc_cleanup(i915);
> > +	intel_fbc_cleanup(&i915->display);
> >  }
> >  
> >  /* part #3: call after gem init */
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index ba9820d4b78f..de8caa69a0dd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -61,13 +61,13 @@
> >  #include "intel_fbc_regs.h"
> >  #include "intel_frontbuffer.h"
> >  
> > -#define for_each_fbc_id(__dev_priv, __fbc_id) \
> > +#define for_each_fbc_id(__display, __fbc_id) \
> >  	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
> > -		for_each_if(DISPLAY_RUNTIME_INFO(__dev_priv)->fbc_mask & BIT(__fbc_id))
> > +		for_each_if(DISPLAY_RUNTIME_INFO(__display)->fbc_mask & BIT(__fbc_id))
> >  
> > -#define for_each_intel_fbc(__dev_priv, __fbc, __fbc_id) \
> > -	for_each_fbc_id((__dev_priv), (__fbc_id)) \
> > -		for_each_if((__fbc) = (__dev_priv)->display.fbc[(__fbc_id)])
> > +#define for_each_intel_fbc(__display, __fbc, __fbc_id) \
> > +	for_each_fbc_id((__display), (__fbc_id)) \
> > +		for_each_if((__fbc) = (__display)->fbc[(__fbc_id)])
> >  
> >  struct intel_fbc_funcs {
> >  	void (*activate)(struct intel_fbc *fbc);
> > @@ -90,7 +90,7 @@ struct intel_fbc_state {
> >  };
> >  
> >  struct intel_fbc {
> > -	struct drm_i915_private *i915;
> > +	struct intel_display *display;
> >  	const struct intel_fbc_funcs *funcs;
> >  
> >  	/*
> > @@ -151,7 +151,7 @@ static unsigned int _intel_fbc_cfb_stride(const struct intel_plane_state *plane_
> >  /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */
> >  static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane_state)
> >  {
> > -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> > +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> >  	unsigned int limit = 4; /* 1:4 compression limit is the worst case */
> >  	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
> >  	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
> > @@ -165,7 +165,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
> >  	 * Wa_16011863758: icl+
> >  	 * Avoid some hardware segment address miscalculation.
> >  	 */
> > -	if (DISPLAY_VER(i915) >= 11)
> > +	if (DISPLAY_VER(display) >= 11)
> >  		stride += 64;
> >  
> >  	/*
> > @@ -181,7 +181,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
> >  /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */
> >  static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
> >  {
> > -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> > +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> >  	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
> >  
> >  	/*
> > @@ -189,7 +189,7 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
> >  	 * be 512 byte aligned. Aligning each line to 512 bytes guarantees
> >  	 * that regardless of the compression limit we choose later.
> >  	 */
> > -	if (DISPLAY_VER(i915) >= 9)
> > +	if (DISPLAY_VER(display) >= 9)
> >  		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(plane_state));
> >  	else
> >  		return stride;
> > @@ -197,12 +197,12 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
> >  
> >  static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
> >  {
> > -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> > +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> >  	int lines = drm_rect_height(&plane_state->uapi.src) >> 16;
> >  
> > -	if (DISPLAY_VER(i915) == 7)
> > +	if (DISPLAY_VER(display) == 7)
> >  		lines = min(lines, 2048);
> > -	else if (DISPLAY_VER(i915) >= 8)
> > +	else if (DISPLAY_VER(display) >= 8)
> >  		lines = min(lines, 2560);
> >  
> >  	return lines * intel_fbc_cfb_stride(plane_state);
> > @@ -210,7 +210,7 @@ static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_sta
> >  
> >  static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
> >  {
> > -	struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
> > +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> >  	unsigned int stride_aligned = intel_fbc_cfb_stride(plane_state);
> >  	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
> >  	const struct drm_framebuffer *fb = plane_state->hw.fb;
> > @@ -223,28 +223,31 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
> >  	 * we always need to use the override there.
> >  	 */
> >  	if (stride != stride_aligned ||
> > -	    (DISPLAY_VER(i915) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR))
> > +	    (DISPLAY_VER(display) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR))
> >  		return stride_aligned * 4 / 64;
> >  
> >  	return 0;
> >  }
> >  
> > -static bool intel_fbc_has_fences(struct drm_i915_private *i915)
> > +static bool intel_fbc_has_fences(struct intel_display *display)
> >  {
> > +	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);
> 
> I was going to ask why __maybe_unused,
> but then I remember about the xe compat-headers where below function is
> defined to 0...

Yaeh this one is needed.


 >  
> > -static u64 intel_fbc_stolen_end(struct drm_i915_private *i915)
> > +static u64 intel_fbc_stolen_end(struct intel_display *display)
> >  {
> > +	struct drm_i915_private __maybe_unused *i915 = to_i915(display->drm);

This one was only needed because I accidentally used to_i915() below
instead of using the local i915 variable. I adjusted this while pushing.

-- 
Ville Syrjälä
Intel

[PATCH 03/20] drm/i915/fbc: s/_intel_fbc_cfb_stride()/intel_fbc_plane_cfb_stride()/

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

_intel_fbc_cfb_stride() calculates the CFB stride the hardware would
automagically generate from the plane's stride. Rename the function
to intel_fbc_plane_cfb_stride() to better reflect its purpose.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index de8caa69a0dd..8f3b8f2cbf7b 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -141,7 +141,7 @@ static unsigned int intel_fbc_plane_stride(const struct intel_plane_state *plane
 }
 
 /* plane stride based cfb stride in bytes, assuming 1:1 compression limit */
-static unsigned int _intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
+static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *plane_state)
 {
 	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
 
@@ -182,7 +182,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
 static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
-	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
+	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
 
 	/*
 	 * At least some of the platforms require each 4 line segment to
@@ -212,7 +212,7 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
 {
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int stride_aligned = intel_fbc_cfb_stride(plane_state);
-	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
+	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
 	const struct drm_framebuffer *fb = plane_state->hw.fb;
 
 	/*
-- 
2.44.2

Re: [PATCH 03/20] drm/i915/fbc: s/_intel_fbc_cfb_stride()/intel_fbc_plane_cfb_stride()/

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:37PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> _intel_fbc_cfb_stride() calculates the CFB stride the hardware would
> automagically generate from the plane's stride. Rename the function
> to intel_fbc_plane_cfb_stride() to better reflect its purpose.
> 

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index de8caa69a0dd..8f3b8f2cbf7b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -141,7 +141,7 @@ static unsigned int intel_fbc_plane_stride(const struct intel_plane_state *plane
>  }
>  
>  /* plane stride based cfb stride in bytes, assuming 1:1 compression limit */
> -static unsigned int _intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
> +static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *plane_state)
>  {
>  	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
>  
> @@ -182,7 +182,7 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
>  static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
>  {
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> -	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
> +	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
>  
>  	/*
>  	 * At least some of the platforms require each 4 line segment to
> @@ -212,7 +212,7 @@ static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_s
>  {
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	unsigned int stride_aligned = intel_fbc_cfb_stride(plane_state);
> -	unsigned int stride = _intel_fbc_cfb_stride(plane_state);
> +	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
>  	const struct drm_framebuffer *fb = plane_state->hw.fb;
>  
>  	/*
> -- 
> 2.44.2
> 

[PATCH 04/20] drm/i915/fbc: Extract intel_fbc_max_plane_size()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract intel_fbc_max_plane_size() from intel_fbc_plane_size_valid().
We'll have another use for this soon in determining how much stolen
memory we'd like to keep reserved for FBC.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 29 +++++++++++++++---------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 8f3b8f2cbf7b..08a431cfbbb3 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1110,25 +1110,32 @@ static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *
 	return effective_w <= max_w && effective_h <= max_h;
 }
 
-static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state)
+static void intel_fbc_max_plane_size(struct intel_display *display,
+				     unsigned int *w, unsigned int *h)
 {
-	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	struct drm_i915_private *i915 = to_i915(display->drm);
-	unsigned int w, h, max_w, max_h;
 
 	if (DISPLAY_VER(display) >= 10) {
-		max_w = 5120;
-		max_h = 4096;
+		*w = 5120;
+		*h = 4096;
 	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
-		max_w = 4096;
-		max_h = 4096;
+		*w = 4096;
+		*h = 4096;
 	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
-		max_w = 4096;
-		max_h = 2048;
+		*w = 4096;
+		*h = 2048;
 	} else {
-		max_w = 2048;
-		max_h = 1536;
+		*w = 2048;
+		*h = 1536;
 	}
+}
+
+static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state)
+{
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	unsigned int w, h, max_w, max_h;
+
+	intel_fbc_max_plane_size(display, &max_w, &max_h);
 
 	w = drm_rect_width(&plane_state->uapi.src) >> 16;
 	h = drm_rect_height(&plane_state->uapi.src) >> 16;
-- 
2.44.2

Re: [PATCH 04/20] drm/i915/fbc: Extract intel_fbc_max_plane_size()

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:38PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Extract intel_fbc_max_plane_size() from intel_fbc_plane_size_valid().
> We'll have another use for this soon in determining how much stolen
> memory we'd like to keep reserved for FBC.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 29 +++++++++++++++---------
>  1 file changed, 18 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 8f3b8f2cbf7b..08a431cfbbb3 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1110,25 +1110,32 @@ static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *
>  	return effective_w <= max_w && effective_h <= max_h;
>  }
>  
> -static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state)
> +static void intel_fbc_max_plane_size(struct intel_display *display,
> +				     unsigned int *w, unsigned int *h)
>  {
> -	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	struct drm_i915_private *i915 = to_i915(display->drm);
> -	unsigned int w, h, max_w, max_h;
>  
>  	if (DISPLAY_VER(display) >= 10) {
> -		max_w = 5120;
> -		max_h = 4096;
> +		*w = 5120;
> +		*h = 4096;
>  	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
> -		max_w = 4096;
> -		max_h = 4096;
> +		*w = 4096;
> +		*h = 4096;
>  	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
> -		max_w = 4096;
> -		max_h = 2048;
> +		*w = 4096;
> +		*h = 2048;
>  	} else {
> -		max_w = 2048;
> -		max_h = 1536;
> +		*w = 2048;
> +		*h = 1536;
>  	}
> +}
> +
> +static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state)
> +{
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> +	unsigned int w, h, max_w, max_h;
> +
> +	intel_fbc_max_plane_size(display, &max_w, &max_h);
>  
>  	w = drm_rect_width(&plane_state->uapi.src) >> 16;
>  	h = drm_rect_height(&plane_state->uapi.src) >> 16;
> -- 
> 2.44.2
> 

[PATCH 05/20] drm/i915/fbc: Extract intel_fbc_max_surface_size()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract intel_fbc_max_surface_size() from
intel_fbc_hw_tracking_covers_screen(), mainly to mirror the
"max plane size" counterparts.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 41 ++++++++++++++----------
 1 file changed, 24 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 08a431cfbbb3..c7fd774440a8 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1073,6 +1073,29 @@ static bool rotation_is_valid(const struct intel_plane_state *plane_state)
 		return i8xx_fbc_rotation_is_valid(plane_state);
 }
 
+static void intel_fbc_max_surface_size(struct intel_display *display,
+				       unsigned int *w, unsigned int *h)
+{
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
+	if (DISPLAY_VER(display) >= 11) {
+		*w = 8192;
+		*h = 4096;
+	} else if (DISPLAY_VER(display) >= 10) {
+		*w = 5120;
+		*h = 4096;
+	} else if (DISPLAY_VER(display) >= 7) {
+		*w = 4096;
+		*h = 4096;
+	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
+		*w = 4096;
+		*h = 2048;
+	} else {
+		*w = 2048;
+		*h = 1536;
+	}
+}
+
 /*
  * For some reason, the hardware tracking starts looking at whatever we
  * programmed as the display plane base address register. It does not look at
@@ -1082,25 +1105,9 @@ static bool rotation_is_valid(const struct intel_plane_state *plane_state)
 static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
-	struct drm_i915_private *i915 = to_i915(display->drm);
 	unsigned int effective_w, effective_h, max_w, max_h;
 
-	if (DISPLAY_VER(display) >= 11) {
-		max_w = 8192;
-		max_h = 4096;
-	} else if (DISPLAY_VER(display) >= 10) {
-		max_w = 5120;
-		max_h = 4096;
-	} else if (DISPLAY_VER(display) >= 7) {
-		max_w = 4096;
-		max_h = 4096;
-	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
-		max_w = 4096;
-		max_h = 2048;
-	} else {
-		max_w = 2048;
-		max_h = 1536;
-	}
+	intel_fbc_max_surface_size(display, &max_w, &max_h);
 
 	effective_w = plane_state->view.color_plane[0].x +
 		(drm_rect_width(&plane_state->uapi.src) >> 16);
-- 
2.44.2

Re: [PATCH 05/20] drm/i915/fbc: Extract intel_fbc_max_surface_size()

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:39PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Extract intel_fbc_max_surface_size() from
> intel_fbc_hw_tracking_covers_screen(), mainly to mirror the
> "max plane size" counterparts.
> 

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 41 ++++++++++++++----------
>  1 file changed, 24 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 08a431cfbbb3..c7fd774440a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1073,6 +1073,29 @@ static bool rotation_is_valid(const struct intel_plane_state *plane_state)
>  		return i8xx_fbc_rotation_is_valid(plane_state);
>  }
>  
> +static void intel_fbc_max_surface_size(struct intel_display *display,
> +				       unsigned int *w, unsigned int *h)
> +{
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
> +	if (DISPLAY_VER(display) >= 11) {
> +		*w = 8192;
> +		*h = 4096;
> +	} else if (DISPLAY_VER(display) >= 10) {
> +		*w = 5120;
> +		*h = 4096;
> +	} else if (DISPLAY_VER(display) >= 7) {
> +		*w = 4096;
> +		*h = 4096;
> +	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
> +		*w = 4096;
> +		*h = 2048;
> +	} else {
> +		*w = 2048;
> +		*h = 1536;
> +	}
> +}
> +
>  /*
>   * For some reason, the hardware tracking starts looking at whatever we
>   * programmed as the display plane base address register. It does not look at
> @@ -1082,25 +1105,9 @@ static bool rotation_is_valid(const struct intel_plane_state *plane_state)
>  static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *plane_state)
>  {
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> -	struct drm_i915_private *i915 = to_i915(display->drm);
>  	unsigned int effective_w, effective_h, max_w, max_h;
>  
> -	if (DISPLAY_VER(display) >= 11) {
> -		max_w = 8192;
> -		max_h = 4096;
> -	} else if (DISPLAY_VER(display) >= 10) {
> -		max_w = 5120;
> -		max_h = 4096;
> -	} else if (DISPLAY_VER(display) >= 7) {
> -		max_w = 4096;
> -		max_h = 4096;
> -	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
> -		max_w = 4096;
> -		max_h = 2048;
> -	} else {
> -		max_w = 2048;
> -		max_h = 1536;
> -	}
> +	intel_fbc_max_surface_size(display, &max_w, &max_h);
>  
>  	effective_w = plane_state->view.color_plane[0].x +
>  		(drm_rect_width(&plane_state->uapi.src) >> 16);
> -- 
> 2.44.2
> 

[PATCH 06/20] drm/i915/fbc: s/intel_fbc_hw_tracking_covers_screen()/intel_fbc_surface_size_ok()/

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rename intel_fbc_hw_tracking_covers_screen() to intel_fbc_surface_size_ok()
so that the naming scheme is the same for the surface size vs. plane
size checks. "surface size" is what bspec talks about.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index c7fd774440a8..40a3b4937dc5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1102,7 +1102,7 @@ static void intel_fbc_max_surface_size(struct intel_display *display,
  * the X and Y offset registers. That's why we include the src x/y offsets
  * instead of just looking at the plane size.
  */
-static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *plane_state)
+static bool intel_fbc_surface_size_ok(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int effective_w, effective_h, max_w, max_h;
@@ -1354,7 +1354,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
 		return 0;
 	}
 
-	if (!intel_fbc_hw_tracking_covers_screen(plane_state)) {
+	if (!intel_fbc_surface_size_ok(plane_state)) {
 		plane_state->no_fbc_reason = "surface size too big";
 		return 0;
 	}
-- 
2.44.2

Re: [PATCH 06/20] drm/i915/fbc: s/intel_fbc_hw_tracking_covers_screen()/intel_fbc_surface_size_ok()/

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:40PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Rename intel_fbc_hw_tracking_covers_screen() to intel_fbc_surface_size_ok()
> so that the naming scheme is the same for the surface size vs. plane
> size checks. "surface size" is what bspec talks about.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index c7fd774440a8..40a3b4937dc5 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1102,7 +1102,7 @@ static void intel_fbc_max_surface_size(struct intel_display *display,
>   * the X and Y offset registers. That's why we include the src x/y offsets
>   * instead of just looking at the plane size.
>   */
> -static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *plane_state)
> +static bool intel_fbc_surface_size_ok(const struct intel_plane_state *plane_state)
>  {
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	unsigned int effective_w, effective_h, max_w, max_h;
> @@ -1354,7 +1354,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
>  		return 0;
>  	}
>  
> -	if (!intel_fbc_hw_tracking_covers_screen(plane_state)) {
> +	if (!intel_fbc_surface_size_ok(plane_state)) {
>  		plane_state->no_fbc_reason = "surface size too big";
>  		return 0;
>  	}
> -- 
> 2.44.2
> 

[PATCH 07/20] drm/i915/fbc: Adjust g4x+ platform checks

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Do the "is this ilk+ or g4x" checks in the customary order instead
of the reverse order. Easier for the poor brain to parse this
when it's always done the same way.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 40a3b4937dc5..5ba3d8797243 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1087,7 +1087,7 @@ static void intel_fbc_max_surface_size(struct intel_display *display,
 	} else if (DISPLAY_VER(display) >= 7) {
 		*w = 4096;
 		*h = 4096;
-	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
+	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
 		*w = 4096;
 		*h = 2048;
 	} else {
@@ -1128,7 +1128,7 @@ static void intel_fbc_max_plane_size(struct intel_display *display,
 	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
 		*w = 4096;
 		*h = 4096;
-	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
+	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
 		*w = 4096;
 		*h = 2048;
 	} else {
-- 
2.44.2

Re: [PATCH 07/20] drm/i915/fbc: Adjust g4x+ platform checks

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:41PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Do the "is this ilk+ or g4x" checks in the customary order instead
> of the reverse order. Easier for the poor brain to parse this
> when it's always done the same way.

my poor and lazy brain thanks this!
I would likely stop reading at 'G4' if trying to read code for newer
platforms...

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 40a3b4937dc5..5ba3d8797243 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1087,7 +1087,7 @@ static void intel_fbc_max_surface_size(struct intel_display *display,
>  	} else if (DISPLAY_VER(display) >= 7) {
>  		*w = 4096;
>  		*h = 4096;
> -	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
> +	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
>  		*w = 4096;
>  		*h = 2048;
>  	} else {
> @@ -1128,7 +1128,7 @@ static void intel_fbc_max_plane_size(struct intel_display *display,
>  	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
>  		*w = 4096;
>  		*h = 4096;
> -	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
> +	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
>  		*w = 4096;
>  		*h = 2048;
>  	} else {
> -- 
> 2.44.2
> 

[PATCH 08/20] drm/i915/fbc: Extract _intel_fbc_cfb_stride()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the lower level stuff out from intel_fbc_cfb_stride() into
a separate function that doesn't depend on the plane_state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 5ba3d8797243..4a9321f5218f 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -149,12 +149,11 @@ static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *p
 }
 
 /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */
-static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane_state)
+static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display,
+					   unsigned int width)
 {
-	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int limit = 4; /* 1:4 compression limit is the worst case */
 	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
-	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
 	unsigned int height = 4; /* FBC segment is 4 lines */
 	unsigned int stride;
 
@@ -179,22 +178,29 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane
 }
 
 /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */
-static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
+static unsigned int _intel_fbc_cfb_stride(struct intel_display *display,
+					  unsigned int width, unsigned int stride)
 {
-	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
-	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
-
 	/*
 	 * At least some of the platforms require each 4 line segment to
 	 * be 512 byte aligned. Aligning each line to 512 bytes guarantees
 	 * that regardless of the compression limit we choose later.
 	 */
 	if (DISPLAY_VER(display) >= 9)
-		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(plane_state));
+		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display, width));
 	else
 		return stride;
 }
 
+static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
+{
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
+	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
+
+	return _intel_fbc_cfb_stride(display, width, stride);
+}
+
 static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
-- 
2.44.2

RE: [PATCH 08/20] drm/i915/fbc: Extract _intel_fbc_cfb_stride()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 08/20] drm/i915/fbc: Extract _intel_fbc_cfb_stride()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the lower level stuff out from intel_fbc_cfb_stride() into a separate function
> that doesn't depend on the plane_state.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 22 ++++++++++++++--------
>  1 file changed, 14 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 5ba3d8797243..4a9321f5218f 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -149,12 +149,11 @@ static unsigned int intel_fbc_plane_cfb_stride(const
> struct intel_plane_state *p  }
> 
>  /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */ -
> static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state
> *plane_state)
> +static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display,
> +					   unsigned int width)
>  {
> -	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
>  	unsigned int limit = 4; /* 1:4 compression limit is the worst case */
>  	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
> -	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
>  	unsigned int height = 4; /* FBC segment is 4 lines */
>  	unsigned int stride;
> 
> @@ -179,22 +178,29 @@ static unsigned int skl_fbc_min_cfb_stride(const struct
> intel_plane_state *plane  }
> 
>  /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */ -static
> unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state)
> +static unsigned int _intel_fbc_cfb_stride(struct intel_display *display,
> +					  unsigned int width, unsigned int stride)
>  {
> -	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
> -	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
> -
>  	/*
>  	 * At least some of the platforms require each 4 line segment to
>  	 * be 512 byte aligned. Aligning each line to 512 bytes guarantees
>  	 * that regardless of the compression limit we choose later.
>  	 */
>  	if (DISPLAY_VER(display) >= 9)
> -		return max(ALIGN(stride, 512),
> skl_fbc_min_cfb_stride(plane_state));
> +		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display,
> +width));
>  	else
>  		return stride;
>  }
> 
> +static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state
> +*plane_state) {
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
> +	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
> +	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
> +
> +	return _intel_fbc_cfb_stride(display, width, stride); }
> +
>  static unsigned int intel_fbc_cfb_size(const struct intel_plane_state
> *plane_state)  {
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
> --
> 2.44.2

[PATCH 09/20] drm/i915/fbc: s/lines/height/

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Use the more customary name 'height' instead of 'lines'.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 4a9321f5218f..4d25ebb5ae9d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -204,14 +204,14 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
 static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
-	int lines = drm_rect_height(&plane_state->uapi.src) >> 16;
+	int height = drm_rect_height(&plane_state->uapi.src) >> 16;
 
 	if (DISPLAY_VER(display) == 7)
-		lines = min(lines, 2048);
+		height = min(height, 2048);
 	else if (DISPLAY_VER(display) >= 8)
-		lines = min(lines, 2560);
+		height = min(height, 2560);
 
-	return lines * intel_fbc_cfb_stride(plane_state);
+	return height * intel_fbc_cfb_stride(plane_state);
 }
 
 static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
-- 
2.44.2

Re: [PATCH 09/20] drm/i915/fbc: s/lines/height/

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:43PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Use the more customary name 'height' instead of 'lines'.
> 

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 4a9321f5218f..4d25ebb5ae9d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -204,14 +204,14 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
>  static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
>  {
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
> -	int lines = drm_rect_height(&plane_state->uapi.src) >> 16;
> +	int height = drm_rect_height(&plane_state->uapi.src) >> 16;
>  
>  	if (DISPLAY_VER(display) == 7)
> -		lines = min(lines, 2048);
> +		height = min(height, 2048);
>  	else if (DISPLAY_VER(display) >= 8)
> -		lines = min(lines, 2560);
> +		height = min(height, 2560);
>  
> -	return lines * intel_fbc_cfb_stride(plane_state);
> +	return height * intel_fbc_cfb_stride(plane_state);
>  }
>  
>  static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
> -- 
> 2.44.2
> 

[PATCH 10/20] drm/i915/fbc: Reoder CFB max height platform checks

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rearrange the max CFB max height platform into the
more common "new first, old last" order.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 4d25ebb5ae9d..cf5750ed4681 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -206,10 +206,10 @@ static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_sta
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	int height = drm_rect_height(&plane_state->uapi.src) >> 16;
 
-	if (DISPLAY_VER(display) == 7)
-		height = min(height, 2048);
-	else if (DISPLAY_VER(display) >= 8)
+	if (DISPLAY_VER(display) >= 8)
 		height = min(height, 2560);
+	else if (DISPLAY_VER(display) == 7)
+		height = min(height, 2048);
 
 	return height * intel_fbc_cfb_stride(plane_state);
 }
-- 
2.44.2

Re: [PATCH 10/20] drm/i915/fbc: Reoder CFB max height platform checks

[Rodrigo Vivi]

On Fri, Jul 05, 2024 at 05:52:44PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Rearrange the max CFB max height platform into the
> more common "new first, old last" order.
> 

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 4d25ebb5ae9d..cf5750ed4681 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -206,10 +206,10 @@ static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_sta
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
>  	int height = drm_rect_height(&plane_state->uapi.src) >> 16;
>  
> -	if (DISPLAY_VER(display) == 7)
> -		height = min(height, 2048);
> -	else if (DISPLAY_VER(display) >= 8)
> +	if (DISPLAY_VER(display) >= 8)
>  		height = min(height, 2560);
> +	else if (DISPLAY_VER(display) == 7)
> +		height = min(height, 2048);
>  
>  	return height * intel_fbc_cfb_stride(plane_state);
>  }
> -- 
> 2.44.2
> 

[PATCH 11/20] drm/i915/fbc: Extract intel_fbc_max_cfb_height()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the code to determine the maximum CFB height
into a separate function. For pre-HSW the maximum CFB
height is the same as the maximum plane height (ie. the
older hardware supposedely doens't have the trick of leaving
the extra lines uncompressed).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 27 ++++++++++++++++++------
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index cf5750ed4681..47b715e5d533 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -201,17 +201,30 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
 	return _intel_fbc_cfb_stride(display, width, stride);
 }
 
-static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
+/*
+ * Maximum height the hardware will compress, on HSW+
+ * additional lines (up to the actual plane height) will
+ * remain uncompressed.
+ */
+static unsigned int intel_fbc_max_cfb_height(struct intel_display *display)
 {
-	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
-	int height = drm_rect_height(&plane_state->uapi.src) >> 16;
+	struct drm_i915_private *i915 = to_i915(display->drm);
 
 	if (DISPLAY_VER(display) >= 8)
-		height = min(height, 2560);
-	else if (DISPLAY_VER(display) == 7)
-		height = min(height, 2048);
+		return 2560;
+	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
+		return 2048;
+	else
+		return 1536;
+}
 
-	return height * intel_fbc_cfb_stride(plane_state);
+static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
+{
+	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
+	unsigned int height = drm_rect_height(&plane_state->uapi.src) >> 16;
+
+	return min(height, intel_fbc_max_cfb_height(display)) *
+		intel_fbc_cfb_stride(plane_state);
 }
 
 static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
-- 
2.44.2

RE: [PATCH 11/20] drm/i915/fbc: Extract intel_fbc_max_cfb_height()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 11/20] drm/i915/fbc: Extract intel_fbc_max_cfb_height()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the code to determine the maximum CFB height into a separate function. For
> pre-HSW the maximum CFB height is the same as the maximum plane height (ie.
> the older hardware supposedely doens't have the trick of leaving the extra lines
> uncompressed).
> 

Nit: Typo in supposedly and doesn't.

Limit is also altered along with refactor; would a separate patch be better ?
Leave it your judgement. Overall logic looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 27 ++++++++++++++++++------
>  1 file changed, 20 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index cf5750ed4681..47b715e5d533 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -201,17 +201,30 @@ static unsigned int intel_fbc_cfb_stride(const struct
> intel_plane_state *plane_s
>  	return _intel_fbc_cfb_stride(display, width, stride);  }
> 
> -static unsigned int intel_fbc_cfb_size(const struct intel_plane_state
> *plane_state)
> +/*
> + * Maximum height the hardware will compress, on HSW+
> + * additional lines (up to the actual plane height) will
> + * remain uncompressed.
> + */
> +static unsigned int intel_fbc_max_cfb_height(struct intel_display
> +*display)
>  {
> -	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
> -	int height = drm_rect_height(&plane_state->uapi.src) >> 16;
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> 
>  	if (DISPLAY_VER(display) >= 8)
> -		height = min(height, 2560);
> -	else if (DISPLAY_VER(display) == 7)
> -		height = min(height, 2048);
> +		return 2560;
> +	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
> +		return 2048;
> +	else
> +		return 1536;
> +}
> 
> -	return height * intel_fbc_cfb_stride(plane_state);
> +static unsigned int intel_fbc_cfb_size(const struct intel_plane_state
> +*plane_state) {
> +	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
> +	unsigned int height = drm_rect_height(&plane_state->uapi.src) >> 16;
> +
> +	return min(height, intel_fbc_max_cfb_height(display)) *
> +		intel_fbc_cfb_stride(plane_state);
>  }
> 
>  static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state
> *plane_state)
> --
> 2.44.2

Re: [PATCH 11/20] drm/i915/fbc: Extract intel_fbc_max_cfb_height()

[Ville Syrjälä]

On Wed, Jul 10, 2024 at 08:26:54AM +0000, Shankar, Uma wrote:
> 
> 
> > -----Original Message-----
> > From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> > Sent: Friday, July 5, 2024 8:23 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel-xe@lists.freedesktop.org
> > Subject: [PATCH 11/20] drm/i915/fbc: Extract intel_fbc_max_cfb_height()
> > 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Pull the code to determine the maximum CFB height into a separate function. For
> > pre-HSW the maximum CFB height is the same as the maximum plane height (ie.
> > the older hardware supposedely doens't have the trick of leaving the extra lines
> > uncompressed).
> > 
> 
> Nit: Typo in supposedly and doesn't.
> 
> Limit is also altered along with refactor; would a separate patch be better ?

It doesn't actually change anything as that's just the max plane
height for older platforms, so anything taller would have been
already been rejected earlier.

I suppose I could have added the explicit limit first, and then
did the extraction. But seems harmless enough as is, so kept it
like this but adjusted the commit message a bit to highlight this
fact a little better.

> Leave it your judgement. Overall logic looks Good to me.
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_fbc.c | 27 ++++++++++++++++++------
> >  1 file changed, 20 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index cf5750ed4681..47b715e5d533 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -201,17 +201,30 @@ static unsigned int intel_fbc_cfb_stride(const struct
> > intel_plane_state *plane_s
> >  	return _intel_fbc_cfb_stride(display, width, stride);  }
> > 
> > -static unsigned int intel_fbc_cfb_size(const struct intel_plane_state
> > *plane_state)
> > +/*
> > + * Maximum height the hardware will compress, on HSW+
> > + * additional lines (up to the actual plane height) will
> > + * remain uncompressed.
> > + */
> > +static unsigned int intel_fbc_max_cfb_height(struct intel_display
> > +*display)
> >  {
> > -	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> > >dev);
> > -	int height = drm_rect_height(&plane_state->uapi.src) >> 16;
> > +	struct drm_i915_private *i915 = to_i915(display->drm);
> > 
> >  	if (DISPLAY_VER(display) >= 8)
> > -		height = min(height, 2560);
> > -	else if (DISPLAY_VER(display) == 7)
> > -		height = min(height, 2048);
> > +		return 2560;
> > +	else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915))
> > +		return 2048;
> > +	else
> > +		return 1536;
> > +}
> > 
> > -	return height * intel_fbc_cfb_stride(plane_state);
> > +static unsigned int intel_fbc_cfb_size(const struct intel_plane_state
> > +*plane_state) {
> > +	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> > >dev);
> > +	unsigned int height = drm_rect_height(&plane_state->uapi.src) >> 16;
> > +
> > +	return min(height, intel_fbc_max_cfb_height(display)) *
> > +		intel_fbc_cfb_stride(plane_state);
> >  }
> > 
> >  static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state
> > *plane_state)
> > --
> > 2.44.2
> 

-- 
Ville Syrjälä
Intel

[PATCH 12/20] drm/i915/fbc: Extract _intel_fbc_cfb_size()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the lower level stuff out from intel_fbc_cfb_size() into
a separate function that doesn't depend on the plane_state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 47b715e5d533..293e1a3b9a9d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -218,13 +218,18 @@ static unsigned int intel_fbc_max_cfb_height(struct intel_display *display)
 		return 1536;
 }
 
+static unsigned int _intel_fbc_cfb_size(struct intel_display *display,
+					unsigned int height, unsigned int stride)
+{
+	return min(height, intel_fbc_max_cfb_height(display)) * stride;
+}
+
 static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state)
 {
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int height = drm_rect_height(&plane_state->uapi.src) >> 16;
 
-	return min(height, intel_fbc_max_cfb_height(display)) *
-		intel_fbc_cfb_stride(plane_state);
+	return _intel_fbc_cfb_size(display, height, intel_fbc_cfb_stride(plane_state));
 }
 
 static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state)
-- 
2.44.2

RE: [PATCH 12/20] drm/i915/fbc: Extract _intel_fbc_cfb_size()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 12/20] drm/i915/fbc: Extract _intel_fbc_cfb_size()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the lower level stuff out from intel_fbc_cfb_size() into a separate function
> that doesn't depend on the plane_state.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 47b715e5d533..293e1a3b9a9d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -218,13 +218,18 @@ static unsigned int intel_fbc_max_cfb_height(struct
> intel_display *display)
>  		return 1536;
>  }
> 
> +static unsigned int _intel_fbc_cfb_size(struct intel_display *display,
> +					unsigned int height, unsigned int stride)
> {
> +	return min(height, intel_fbc_max_cfb_height(display)) * stride; }
> +
>  static unsigned int intel_fbc_cfb_size(const struct intel_plane_state
> *plane_state)  {
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
>  	unsigned int height = drm_rect_height(&plane_state->uapi.src) >> 16;
> 
> -	return min(height, intel_fbc_max_cfb_height(display)) *
> -		intel_fbc_cfb_stride(plane_state);
> +	return _intel_fbc_cfb_size(display, height,
> +intel_fbc_cfb_stride(plane_state));
>  }
> 
>  static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state
> *plane_state)
> --
> 2.44.2

[PATCH 13/20] drm/i915/fbc: Extract intel_fbc_cfb_cpp()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract a helper to determine the CFB bytes per pixel value.
Currently this is always 4, but that could change in the
future.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 293e1a3b9a9d..a0e539bc80f1 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -140,20 +140,24 @@ static unsigned int intel_fbc_plane_stride(const struct intel_plane_state *plane
 	return stride;
 }
 
+static unsigned int intel_fbc_cfb_cpp(void)
+{
+	return 4; /* FBC always 4 bytes per pixel */
+}
+
 /* plane stride based cfb stride in bytes, assuming 1:1 compression limit */
 static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *plane_state)
 {
-	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
+	unsigned int cpp = intel_fbc_cfb_cpp();
 
 	return intel_fbc_plane_stride(plane_state) * cpp;
 }
 
 /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */
 static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display,
-					   unsigned int width)
+					   unsigned int cpp, unsigned int width)
 {
 	unsigned int limit = 4; /* 1:4 compression limit is the worst case */
-	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
 	unsigned int height = 4; /* FBC segment is 4 lines */
 	unsigned int stride;
 
@@ -179,7 +183,8 @@ static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display,
 
 /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */
 static unsigned int _intel_fbc_cfb_stride(struct intel_display *display,
-					  unsigned int width, unsigned int stride)
+					  unsigned int cpp, unsigned int width,
+					  unsigned int stride)
 {
 	/*
 	 * At least some of the platforms require each 4 line segment to
@@ -187,7 +192,7 @@ static unsigned int _intel_fbc_cfb_stride(struct intel_display *display,
 	 * that regardless of the compression limit we choose later.
 	 */
 	if (DISPLAY_VER(display) >= 9)
-		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display, width));
+		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display, cpp, width));
 	else
 		return stride;
 }
@@ -197,8 +202,9 @@ static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_s
 	struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);
 	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
 	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
+	unsigned int cpp = intel_fbc_cfb_cpp();
 
-	return _intel_fbc_cfb_stride(display, width, stride);
+	return _intel_fbc_cfb_stride(display, cpp, width, stride);
 }
 
 /*
-- 
2.44.2

RE: [PATCH 13/20] drm/i915/fbc: Extract intel_fbc_cfb_cpp()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 13/20] drm/i915/fbc: Extract intel_fbc_cfb_cpp()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Extract a helper to determine the CFB bytes per pixel value.
> Currently this is always 4, but that could change in the future.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 18 ++++++++++++------
>  1 file changed, 12 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 293e1a3b9a9d..a0e539bc80f1 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -140,20 +140,24 @@ static unsigned int intel_fbc_plane_stride(const struct
> intel_plane_state *plane
>  	return stride;
>  }
> 
> +static unsigned int intel_fbc_cfb_cpp(void) {
> +	return 4; /* FBC always 4 bytes per pixel */ }
> +
>  /* plane stride based cfb stride in bytes, assuming 1:1 compression limit */  static
> unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state
> *plane_state)  {
> -	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
> +	unsigned int cpp = intel_fbc_cfb_cpp();
> 
>  	return intel_fbc_plane_stride(plane_state) * cpp;  }
> 
>  /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */
> static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display,
> -					   unsigned int width)
> +					   unsigned int cpp, unsigned int width)
>  {
>  	unsigned int limit = 4; /* 1:4 compression limit is the worst case */
> -	unsigned int cpp = 4; /* FBC always 4 bytes per pixel */
>  	unsigned int height = 4; /* FBC segment is 4 lines */
>  	unsigned int stride;
> 
> @@ -179,7 +183,8 @@ static unsigned int skl_fbc_min_cfb_stride(struct
> intel_display *display,
> 
>  /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */  static
> unsigned int _intel_fbc_cfb_stride(struct intel_display *display,
> -					  unsigned int width, unsigned int stride)
> +					  unsigned int cpp, unsigned int width,
> +					  unsigned int stride)
>  {
>  	/*
>  	 * At least some of the platforms require each 4 line segment to @@ -
> 187,7 +192,7 @@ static unsigned int _intel_fbc_cfb_stride(struct intel_display
> *display,
>  	 * that regardless of the compression limit we choose later.
>  	 */
>  	if (DISPLAY_VER(display) >= 9)
> -		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display,
> width));
> +		return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display,
> cpp,
> +width));
>  	else
>  		return stride;
>  }
> @@ -197,8 +202,9 @@ static unsigned int intel_fbc_cfb_stride(const struct
> intel_plane_state *plane_s
>  	struct intel_display *display = to_intel_display(plane_state->uapi.plane-
> >dev);
>  	unsigned int stride = intel_fbc_plane_cfb_stride(plane_state);
>  	unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16;
> +	unsigned int cpp = intel_fbc_cfb_cpp();
> 
> -	return _intel_fbc_cfb_stride(display, width, stride);
> +	return _intel_fbc_cfb_stride(display, cpp, width, stride);
>  }
> 
>  /*
> --
> 2.44.2

[PATCH 14/20] drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Allow the code to declare roughly how much stolen memory
should remain available for the CFB. Since we don't know
the actual resolutions that will eventually be used simply
assume that the maximum plane size (with no extra stride
padding) is enough, with 1:1 compression ratio limit.

This should be useful for the fbdev code to determine
whether to allocate/keep the fbdev framebuffer in stolen
or not.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 17 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_fbc.h |  1 +
 2 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index a0e539bc80f1..efe0a554a281 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1911,6 +1911,23 @@ static int intel_sanitize_fbc_option(struct intel_display *display)
 	return 0;
 }
 
+unsigned int intel_fbc_preferred_cfb_size(struct intel_display *display)
+{
+	unsigned int cpp, width, height, stride;
+
+	if (!HAS_FBC(display))
+		return 0;
+
+	intel_fbc_max_plane_size(display, &width, &height);
+
+	cpp = intel_fbc_cfb_cpp();
+
+	/* assume stride matches width to keep this simple */
+	stride = _intel_fbc_cfb_stride(display, cpp, width, width * cpp);
+
+	return _intel_fbc_cfb_size(display, height, stride);
+}
+
 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)
 {
 	plane->fbc = fbc;
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index 834b271505b1..40d8efec6d9d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -46,6 +46,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv,
 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
 void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);
 void intel_fbc_reset_underrun(struct intel_display *display);
+unsigned int intel_fbc_preferred_cfb_size(struct intel_display *display);
 void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
 void intel_fbc_debugfs_register(struct intel_display *display);
 
-- 
2.44.2

RE: [PATCH 14/20] drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 14/20] drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Allow the code to declare roughly how much stolen memory should remain
> available for the CFB. Since we don't know the actual resolutions that will
> eventually be used simply assume that the maximum plane size (with no extra
> stride
> padding) is enough, with 1:1 compression ratio limit.
> 
> This should be useful for the fbdev code to determine whether to allocate/keep
> the fbdev framebuffer in stolen or not.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 17 +++++++++++++++++
> drivers/gpu/drm/i915/display/intel_fbc.h |  1 +
>  2 files changed, 18 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a0e539bc80f1..efe0a554a281 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1911,6 +1911,23 @@ static int intel_sanitize_fbc_option(struct
> intel_display *display)
>  	return 0;
>  }
> 
> +unsigned int intel_fbc_preferred_cfb_size(struct intel_display
> +*display) {
> +	unsigned int cpp, width, height, stride;
> +
> +	if (!HAS_FBC(display))
> +		return 0;
> +
> +	intel_fbc_max_plane_size(display, &width, &height);
> +
> +	cpp = intel_fbc_cfb_cpp();
> +
> +	/* assume stride matches width to keep this simple */
> +	stride = _intel_fbc_cfb_stride(display, cpp, width, width * cpp);
> +
> +	return _intel_fbc_cfb_size(display, height, stride); }
> +
>  void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)  {
>  	plane->fbc = fbc;
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h
> b/drivers/gpu/drm/i915/display/intel_fbc.h
> index 834b271505b1..40d8efec6d9d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -46,6 +46,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv,
> void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);  void
> intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);  void
> intel_fbc_reset_underrun(struct intel_display *display);
> +unsigned int intel_fbc_preferred_cfb_size(struct intel_display
> +*display);
>  void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);  void
> intel_fbc_debugfs_register(struct intel_display *display);
> 
> --
> 2.44.2

[PATCH 15/20] drm/xe/fbdev: Fix BIOS FB vs.s stolen size checke

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Looks like stolen->size is in bytes, not pages. Remove the
bogus PAGE_SHIFT stuff.

Also for some rnadom reason xe rejects the FB if it takes up
exactly half of stolen, whereas i915 allows it to be used
in that case. Adjust xe to follow the i915 rule for consistency.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/xe/display/xe_plane_initial.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
index 5eccd6abb3ef..21965cc8a9ca 100644
--- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
+++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
@@ -110,7 +110,7 @@ initial_plane_bo(struct xe_device *xe,
 		 * features.
 		 */
 		if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
-		    plane_config->size * 2 >> PAGE_SHIFT >= stolen->size)
+		    plane_config->size * 2 > stolen->size)
 			return NULL;
 	}
 
-- 
2.44.2

RE: [PATCH 15/20] drm/xe/fbdev: Fix BIOS FB vs.s stolen size checke

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 15/20] drm/xe/fbdev: Fix BIOS FB vs.s stolen size checke

Nit: Typo in vs and check

> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Looks like stolen->size is in bytes, not pages. Remove the bogus PAGE_SHIFT stuff.
> 
> Also for some rnadom reason xe rejects the FB if it takes up exactly half of stolen,

Typo in random.

> whereas i915 allows it to be used in that case. Adjust xe to follow the i915 rule for
> consistency.

With the typos fixed,  Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/xe/display/xe_plane_initial.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c
> b/drivers/gpu/drm/xe/display/xe_plane_initial.c
> index 5eccd6abb3ef..21965cc8a9ca 100644
> --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
> +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
> @@ -110,7 +110,7 @@ initial_plane_bo(struct xe_device *xe,
>  		 * features.
>  		 */
>  		if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
> -		    plane_config->size * 2 >> PAGE_SHIFT >= stolen->size)
> +		    plane_config->size * 2 > stolen->size)
>  			return NULL;
>  	}
> 
> --
> 2.44.2

[PATCH 16/20] drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Consolidate the "should we allocate fbdev fb in stolen?"
check into a helper function. Makes it easier to change the
heuristics without having to change so many places.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 24 ++++++++++++-------
 drivers/gpu/drm/i915/display/intel_fbdev_fb.h |  5 +++-
 .../drm/i915/display/intel_plane_initial.c    | 10 +++-----
 3 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
index 497525ef9668..0a6445acb100 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
@@ -11,6 +11,19 @@
 #include "intel_display_types.h"
 #include "intel_fbdev_fb.h"
 
+bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
+				  unsigned int size)
+{
+	struct drm_i915_private *i915 = to_i915(display->drm);
+
+	/*
+	 * If the FB is too big, just don't use it since fbdev is not very
+	 * important and we should probably use that space with FBC or other
+	 * features.
+	 */
+	return i915->dsm.usable_size >= size * 2;
+}
+
 struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
 					       struct drm_fb_helper_surface_size *sizes)
 {
@@ -42,14 +55,9 @@ struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
 						  I915_BO_ALLOC_CONTIGUOUS |
 						  I915_BO_ALLOC_USER);
 	} else {
-		/*
-		 * If the FB is too big, just don't use it since fbdev is not very
-		 * important and we should probably use that space with FBC or other
-		 * features.
-		 *
-		 * Also skip stolen on MTL as Wa_22018444074 mitigation.
-		 */
-		if (!(IS_METEORLAKE(dev_priv)) && size * 2 < dev_priv->dsm.usable_size)
+		/* skip stolen on MTL as Wa_22018444074 mitigation */
+		if (!IS_METEORLAKE(dev_priv) &&
+		    intel_fbdev_fb_prefer_stolen(&dev_priv->display, size))
 			obj = i915_gem_object_create_stolen(dev_priv, size);
 		if (IS_ERR(obj))
 			obj = i915_gem_object_create_shmem(dev_priv, size);
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
index 4832fe688fbf..3b9033bd2160 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
@@ -6,16 +6,19 @@
 #ifndef __INTEL_FBDEV_FB_H__
 #define __INTEL_FBDEV_FB_H__
 
+#include <linux/types.h>
+
 struct drm_fb_helper;
 struct drm_fb_helper_surface_size;
 struct drm_i915_gem_object;
 struct drm_i915_private;
 struct fb_info;
 struct i915_vma;
+struct intel_display;
 
 struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
 					       struct drm_fb_helper_surface_size *sizes);
 int intel_fbdev_fb_fill_info(struct drm_i915_private *i915, struct fb_info *info,
 			     struct drm_i915_gem_object *obj, struct i915_vma *vma);
-
+bool intel_fbdev_fb_prefer_stolen(struct intel_display *display, unsigned int size);
 #endif
diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c b/drivers/gpu/drm/i915/display/intel_plane_initial.c
index ada1792df5b3..4622bb5f3426 100644
--- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
@@ -11,6 +11,7 @@
 #include "intel_display.h"
 #include "intel_display_types.h"
 #include "intel_fb.h"
+#include "intel_fbdev_fb.h"
 #include "intel_frontbuffer.h"
 #include "intel_plane_initial.h"
 
@@ -160,15 +161,10 @@ initial_plane_vma(struct drm_i915_private *i915,
 			mem->min_page_size);
 	size -= base;
 
-	/*
-	 * If the FB is too big, just don't use it since fbdev is not very
-	 * important and we should probably use that space with FBC or other
-	 * features.
-	 */
 	if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
 	    mem == i915->mm.stolen_region &&
-	    size * 2 > i915->dsm.usable_size) {
-		drm_dbg_kms(&i915->drm, "Initial FB size exceeds half of stolen, discarding\n");
+	    !intel_fbdev_fb_prefer_stolen(&i915->display, size)) {
+		drm_dbg_kms(&i915->drm, "Initial FB size uses too much stolen, discarding\n");
 		return NULL;
 	}
 
-- 
2.44.2

Re: [PATCH 16/20] drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()

[kernel test robot]

Hi Ville,

kernel test robot noticed the following build errors:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-xe/drm-xe-next drm-tip/drm-tip next-20240703]
[cannot apply to drm-intel/for-linux-next-fixes linus/master v6.10-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Ville-Syrjala/drm-i915-fbc-Extract-intel_fbc_has_fences/20240706-041642
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
patch link:    https://lore.kernel.org/r/20240705145254.3355-17-ville.syrjala%40linux.intel.com
patch subject: [PATCH 16/20] drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()
config: x86_64-randconfig-014-20240706 (https://download.01.org/0day-ci/archive/20240706/202407061958.ScN1NFtC-lkp@intel.com/config)
compiler: gcc-13 (Ubuntu 13.2.0-4ubuntu3) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240706/202407061958.ScN1NFtC-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202407061958.ScN1NFtC-lkp@intel.com/

All errors (new ones prefixed by >>, old ones prefixed by <<):

WARNING: modpost: missing MODULE_DESCRIPTION() in mm/kasan/kasan_test_module.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/ext4/ext4-inode-test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/fat/fat_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nfs/nfsv4.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp437.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp775.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp855.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp861.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp862.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp863.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp865.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp866.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp869.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp874.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp949.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_cp950.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_ascii.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_iso8859-2.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_iso8859-3.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_iso8859-4.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_iso8859-5.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_iso8859-13.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/mac-celtic.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/mac-centeuro.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/mac-iceland.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/nls/nls_ucs2_utils.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/cramfs/cramfs.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/hfs/hfs.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/qnx4/qnx4.o
WARNING: modpost: missing MODULE_DESCRIPTION() in fs/adfs/adfs.o
WARNING: modpost: missing MODULE_DESCRIPTION() in security/keys/trusted-keys/trusted.o
WARNING: modpost: missing MODULE_DESCRIPTION() in security/keys/encrypted-keys/encrypted-keys.o
WARNING: modpost: missing MODULE_DESCRIPTION() in crypto/xor.o
WARNING: modpost: missing MODULE_DESCRIPTION() in lib/kunit/kunit.o
WARNING: modpost: missing MODULE_DESCRIPTION() in lib/kunit/kunit-test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in lib/math/prime_numbers.o
WARNING: modpost: missing MODULE_DESCRIPTION() in lib/zlib_deflate/zlib_deflate.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08_i2c.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pinctrl/pinctrl-mcp23s08.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/video/backlight/platform_lcd.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/video/fbdev/matrox/matroxfb_accel.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/video/fbdev/matrox/matroxfb_DAC1064.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/video/fbdev/matrox/matroxfb_Ti3026.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/video/fbdev/vfb.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/acpi/platform_profile.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/clk/clk-gate_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/clk/clk-fractional-divider_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/virtio/virtio_dma_buf.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/regulator/max20411-regulator.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/regulator/rt4831-regulator.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/char/agp/intel-agp.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/char/agp/intel-gtt.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/char/agp/via-agp.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/char/tlclk.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_kunit_helpers.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_buddy_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_cmdline_parser_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_connector_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_damage_helper_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_dp_mst_helper_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_exec_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_format_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_framebuffer_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_gem_shmem_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_managed_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_mm_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_modes_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_plane_helper_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_probe_helper_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tests/drm_rect_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tiny/bochs.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/tiny/cirrus.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/gpu/drm/drm_panel_orientation_quirks.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/base/regmap/regmap-kunit.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/base/regmap/regmap-ram.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/base/regmap/regmap-raw-ram.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/arizona.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/pcf50633-gpio.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/dax/device_dax.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/dax/dax_cxl.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/scsi/scsi_common.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/scsi/BusLogic.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/scsi/aha1740.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/scsi/atp870u.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/input/touchscreen/cyttsp_i2c_common.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/input/tests/input_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/rtc/lib_test.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mmc/core/sdio_uart.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/ibm_rtl.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/firmware_attributes_class.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/platform/x86/siemens/simatic-ipc.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/devfreq/governor_performance.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/hwtracing/intel_th/intel_th_msu_sink.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/greybus/greybus.o
WARNING: modpost: missing MODULE_DESCRIPTION() in samples/kfifo/bytestream-example.o
WARNING: modpost: missing MODULE_DESCRIPTION() in samples/kfifo/dma-example.o
WARNING: modpost: missing MODULE_DESCRIPTION() in samples/kfifo/inttype-example.o
WARNING: modpost: missing MODULE_DESCRIPTION() in samples/kfifo/record-example.o
WARNING: modpost: missing MODULE_DESCRIPTION() in samples/kobject/kobject-example.o
WARNING: modpost: missing MODULE_DESCRIPTION() in samples/kobject/kset-example.o
>> ERROR: modpost: "intel_fbdev_fb_prefer_stolen" [drivers/gpu/drm/i915/i915.ko] undefined!

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 16/20] drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()

[Lucas De Marchi]

On Fri, Jul 05, 2024 at 05:52:50PM GMT, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
>Consolidate the "should we allocate fbdev fb in stolen?"
>check into a helper function. Makes it easier to change the
>heuristics without having to change so many places.
>
>Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>---
> drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 24 ++++++++++++-------
> drivers/gpu/drm/i915/display/intel_fbdev_fb.h |  5 +++-
> .../drm/i915/display/intel_plane_initial.c    | 10 +++-----
> 3 files changed, 23 insertions(+), 16 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
>index 497525ef9668..0a6445acb100 100644
>--- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
>+++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
>@@ -11,6 +11,19 @@
> #include "intel_display_types.h"
> #include "intel_fbdev_fb.h"
>
>+bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
>+				  unsigned int size)
>+{
>+	struct drm_i915_private *i915 = to_i915(display->drm);
>+
>+	/*
>+	 * If the FB is too big, just don't use it since fbdev is not very
>+	 * important and we should probably use that space with FBC or other
>+	 * features.
>+	 */
>+	return i915->dsm.usable_size >= size * 2;
>+}
>+
> struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> 					       struct drm_fb_helper_surface_size *sizes)
> {
>@@ -42,14 +55,9 @@ struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> 						  I915_BO_ALLOC_CONTIGUOUS |
> 						  I915_BO_ALLOC_USER);
> 	} else {
>-		/*
>-		 * If the FB is too big, just don't use it since fbdev is not very
>-		 * important and we should probably use that space with FBC or other
>-		 * features.
>-		 *
>-		 * Also skip stolen on MTL as Wa_22018444074 mitigation.
>-		 */
>-		if (!(IS_METEORLAKE(dev_priv)) && size * 2 < dev_priv->dsm.usable_size)
>+		/* skip stolen on MTL as Wa_22018444074 mitigation */
>+		if (!IS_METEORLAKE(dev_priv) &&

shouldn't this be inside intel_fbdev_fb_prefer_stolen()?

And also pull the same logic on the xe side a few patches after this.

Lucas De Marchi

>+		    intel_fbdev_fb_prefer_stolen(&dev_priv->display, size))
> 			obj = i915_gem_object_create_stolen(dev_priv, size);
> 		if (IS_ERR(obj))
> 			obj = i915_gem_object_create_shmem(dev_priv, size);
>diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
>index 4832fe688fbf..3b9033bd2160 100644
>--- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
>+++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
>@@ -6,16 +6,19 @@
> #ifndef __INTEL_FBDEV_FB_H__
> #define __INTEL_FBDEV_FB_H__
>
>+#include <linux/types.h>
>+
> struct drm_fb_helper;
> struct drm_fb_helper_surface_size;
> struct drm_i915_gem_object;
> struct drm_i915_private;
> struct fb_info;
> struct i915_vma;
>+struct intel_display;
>
> struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> 					       struct drm_fb_helper_surface_size *sizes);
> int intel_fbdev_fb_fill_info(struct drm_i915_private *i915, struct fb_info *info,
> 			     struct drm_i915_gem_object *obj, struct i915_vma *vma);
>-
>+bool intel_fbdev_fb_prefer_stolen(struct intel_display *display, unsigned int size);
> #endif
>diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c b/drivers/gpu/drm/i915/display/intel_plane_initial.c
>index ada1792df5b3..4622bb5f3426 100644
>--- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
>+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
>@@ -11,6 +11,7 @@
> #include "intel_display.h"
> #include "intel_display_types.h"
> #include "intel_fb.h"
>+#include "intel_fbdev_fb.h"
> #include "intel_frontbuffer.h"
> #include "intel_plane_initial.h"
>
>@@ -160,15 +161,10 @@ initial_plane_vma(struct drm_i915_private *i915,
> 			mem->min_page_size);
> 	size -= base;
>
>-	/*
>-	 * If the FB is too big, just don't use it since fbdev is not very
>-	 * important and we should probably use that space with FBC or other
>-	 * features.
>-	 */
> 	if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
> 	    mem == i915->mm.stolen_region &&
>-	    size * 2 > i915->dsm.usable_size) {
>-		drm_dbg_kms(&i915->drm, "Initial FB size exceeds half of stolen, discarding\n");
>+	    !intel_fbdev_fb_prefer_stolen(&i915->display, size)) {
>+		drm_dbg_kms(&i915->drm, "Initial FB size uses too much stolen, discarding\n");
> 		return NULL;
> 	}
>
>-- 
>2.44.2
>

Re: [PATCH 16/20] drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()

[Ville Syrjälä]

On Tue, Jul 09, 2024 at 03:28:15PM -0500, Lucas De Marchi wrote:
> On Fri, Jul 05, 2024 at 05:52:50PM GMT, Ville Syrjälä wrote:
> >From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> >Consolidate the "should we allocate fbdev fb in stolen?"
> >check into a helper function. Makes it easier to change the
> >heuristics without having to change so many places.
> >
> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >---
> > drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 24 ++++++++++++-------
> > drivers/gpu/drm/i915/display/intel_fbdev_fb.h |  5 +++-
> > .../drm/i915/display/intel_plane_initial.c    | 10 +++-----
> > 3 files changed, 23 insertions(+), 16 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> >index 497525ef9668..0a6445acb100 100644
> >--- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> >+++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> >@@ -11,6 +11,19 @@
> > #include "intel_display_types.h"
> > #include "intel_fbdev_fb.h"
> >
> >+bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
> >+				  unsigned int size)
> >+{
> >+	struct drm_i915_private *i915 = to_i915(display->drm);
> >+
> >+	/*
> >+	 * If the FB is too big, just don't use it since fbdev is not very
> >+	 * important and we should probably use that space with FBC or other
> >+	 * features.
> >+	 */
> >+	return i915->dsm.usable_size >= size * 2;
> >+}
> >+
> > struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> > 					       struct drm_fb_helper_surface_size *sizes)
> > {
> >@@ -42,14 +55,9 @@ struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> > 						  I915_BO_ALLOC_CONTIGUOUS |
> > 						  I915_BO_ALLOC_USER);
> > 	} else {
> >-		/*
> >-		 * If the FB is too big, just don't use it since fbdev is not very
> >-		 * important and we should probably use that space with FBC or other
> >-		 * features.
> >-		 *
> >-		 * Also skip stolen on MTL as Wa_22018444074 mitigation.
> >-		 */
> >-		if (!(IS_METEORLAKE(dev_priv)) && size * 2 < dev_priv->dsm.usable_size)
> >+		/* skip stolen on MTL as Wa_22018444074 mitigation */
> >+		if (!IS_METEORLAKE(dev_priv) &&
> 
> shouldn't this be inside intel_fbdev_fb_prefer_stolen()?

That would also apply it to the BIOS fb takeover, so change the
behaviour. The correct answer is likely just removing the MTL check
entirely, but I left that out for now to avoid too many functional
changes.

> 
> And also pull the same logic on the xe side a few patches after this.
> 
> Lucas De Marchi
> 
> >+		    intel_fbdev_fb_prefer_stolen(&dev_priv->display, size))
> > 			obj = i915_gem_object_create_stolen(dev_priv, size);
> > 		if (IS_ERR(obj))
> > 			obj = i915_gem_object_create_shmem(dev_priv, size);
> >diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
> >index 4832fe688fbf..3b9033bd2160 100644
> >--- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
> >+++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
> >@@ -6,16 +6,19 @@
> > #ifndef __INTEL_FBDEV_FB_H__
> > #define __INTEL_FBDEV_FB_H__
> >
> >+#include <linux/types.h>
> >+
> > struct drm_fb_helper;
> > struct drm_fb_helper_surface_size;
> > struct drm_i915_gem_object;
> > struct drm_i915_private;
> > struct fb_info;
> > struct i915_vma;
> >+struct intel_display;
> >
> > struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> > 					       struct drm_fb_helper_surface_size *sizes);
> > int intel_fbdev_fb_fill_info(struct drm_i915_private *i915, struct fb_info *info,
> > 			     struct drm_i915_gem_object *obj, struct i915_vma *vma);
> >-
> >+bool intel_fbdev_fb_prefer_stolen(struct intel_display *display, unsigned int size);
> > #endif
> >diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> >index ada1792df5b3..4622bb5f3426 100644
> >--- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
> >+++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> >@@ -11,6 +11,7 @@
> > #include "intel_display.h"
> > #include "intel_display_types.h"
> > #include "intel_fb.h"
> >+#include "intel_fbdev_fb.h"
> > #include "intel_frontbuffer.h"
> > #include "intel_plane_initial.h"
> >
> >@@ -160,15 +161,10 @@ initial_plane_vma(struct drm_i915_private *i915,
> > 			mem->min_page_size);
> > 	size -= base;
> >
> >-	/*
> >-	 * If the FB is too big, just don't use it since fbdev is not very
> >-	 * important and we should probably use that space with FBC or other
> >-	 * features.
> >-	 */
> > 	if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
> > 	    mem == i915->mm.stolen_region &&
> >-	    size * 2 > i915->dsm.usable_size) {
> >-		drm_dbg_kms(&i915->drm, "Initial FB size exceeds half of stolen, discarding\n");
> >+	    !intel_fbdev_fb_prefer_stolen(&i915->display, size)) {
> >+		drm_dbg_kms(&i915->drm, "Initial FB size uses too much stolen, discarding\n");
> > 		return NULL;
> > 	}
> >
> >-- 
> >2.44.2
> >

-- 
Ville Syrjälä
Intel

RE: [PATCH 16/20] drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 16/20] drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Consolidate the "should we allocate fbdev fb in stolen?"
> check into a helper function. Makes it easier to change the heuristics without
> having to change so many places.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 24 ++++++++++++-------
> drivers/gpu/drm/i915/display/intel_fbdev_fb.h |  5 +++-
>  .../drm/i915/display/intel_plane_initial.c    | 10 +++-----
>  3 files changed, 23 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> index 497525ef9668..0a6445acb100 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> @@ -11,6 +11,19 @@
>  #include "intel_display_types.h"
>  #include "intel_fbdev_fb.h"
> 
> +bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
> +				  unsigned int size)
> +{
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
> +	/*
> +	 * If the FB is too big, just don't use it since fbdev is not very
> +	 * important and we should probably use that space with FBC or other
> +	 * features.
> +	 */
> +	return i915->dsm.usable_size >= size * 2; }
> +
>  struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
>  					       struct drm_fb_helper_surface_size
> *sizes)  { @@ -42,14 +55,9 @@ struct intel_framebuffer
> *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> 
> I915_BO_ALLOC_CONTIGUOUS |
>  						  I915_BO_ALLOC_USER);
>  	} else {
> -		/*
> -		 * If the FB is too big, just don't use it since fbdev is not very
> -		 * important and we should probably use that space with FBC or
> other
> -		 * features.
> -		 *
> -		 * Also skip stolen on MTL as Wa_22018444074 mitigation.
> -		 */
> -		if (!(IS_METEORLAKE(dev_priv)) && size * 2 < dev_priv-
> >dsm.usable_size)
> +		/* skip stolen on MTL as Wa_22018444074 mitigation */
> +		if (!IS_METEORLAKE(dev_priv) &&

Its better to move this platform check as well to the helper.

Also maybe we can extend this to LNL+ as well given the limitations (can be a separate change though).
Thoughts ?

> +		    intel_fbdev_fb_prefer_stolen(&dev_priv->display, size))
>  			obj = i915_gem_object_create_stolen(dev_priv, size);
>  		if (IS_ERR(obj))
>  			obj = i915_gem_object_create_shmem(dev_priv, size);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
> b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
> index 4832fe688fbf..3b9033bd2160 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.h
> @@ -6,16 +6,19 @@
>  #ifndef __INTEL_FBDEV_FB_H__
>  #define __INTEL_FBDEV_FB_H__
> 
> +#include <linux/types.h>
> +
>  struct drm_fb_helper;
>  struct drm_fb_helper_surface_size;
>  struct drm_i915_gem_object;
>  struct drm_i915_private;
>  struct fb_info;
>  struct i915_vma;
> +struct intel_display;
> 
>  struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
>  					       struct drm_fb_helper_surface_size
> *sizes);  int intel_fbdev_fb_fill_info(struct drm_i915_private *i915, struct fb_info
> *info,
>  			     struct drm_i915_gem_object *obj, struct i915_vma
> *vma);
> -
> +bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
> +unsigned int size);
>  #endif
> diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c
> b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> index ada1792df5b3..4622bb5f3426 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> @@ -11,6 +11,7 @@
>  #include "intel_display.h"
>  #include "intel_display_types.h"
>  #include "intel_fb.h"
> +#include "intel_fbdev_fb.h"
>  #include "intel_frontbuffer.h"
>  #include "intel_plane_initial.h"
> 
> @@ -160,15 +161,10 @@ initial_plane_vma(struct drm_i915_private *i915,
>  			mem->min_page_size);
>  	size -= base;
> 
> -	/*
> -	 * If the FB is too big, just don't use it since fbdev is not very
> -	 * important and we should probably use that space with FBC or other
> -	 * features.
> -	 */
>  	if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
>  	    mem == i915->mm.stolen_region &&
> -	    size * 2 > i915->dsm.usable_size) {
> -		drm_dbg_kms(&i915->drm, "Initial FB size exceeds half of stolen,
> discarding\n");
> +	    !intel_fbdev_fb_prefer_stolen(&i915->display, size)) {
> +		drm_dbg_kms(&i915->drm, "Initial FB size uses too much stolen,
> +discarding\n");
>  		return NULL;
>  	}
> 
> --
> 2.44.2

[PATCH 17/20] drm/xe/fbdev: Extract intel_fbdev_fb_prefer_stolen()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the "should we keep the bios fb in stolen?" logic into
into a helper function, same as was done for i915. Gives us
a single place where to tweak the heuristics.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/xe/display/intel_fbdev_fb.c   | 18 ++++++++++++++++++
 drivers/gpu/drm/xe/display/xe_plane_initial.c |  8 ++------
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
index 816ad13821a8..f7905b382d06 100644
--- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
+++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
@@ -11,6 +11,24 @@
 #include "xe_gt.h"
 #include "xe_ttm_stolen_mgr.h"
 
+bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
+				  unsigned int size)
+{
+	struct xe_device *xe = to_xe_device(display->drm);
+	struct ttm_resource_manager *stolen;
+
+	stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
+	if (!stolen)
+		return false;
+
+	/*
+	 * If the FB is too big, just don't use it since fbdev is not very
+	 * important and we should probably use that space with FBC or other
+	 * features.
+	 */
+	return stolen->size >= size * 2;
+}
+
 struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
 					       struct drm_fb_helper_surface_size *sizes)
 {
diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c b/drivers/gpu/drm/xe/display/xe_plane_initial.c
index 21965cc8a9ca..4c000e95aea5 100644
--- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
+++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
@@ -15,6 +15,7 @@
 #include "intel_display_types.h"
 #include "intel_fb.h"
 #include "intel_fb_pin.h"
+#include "intel_fbdev_fb.h"
 #include "intel_frontbuffer.h"
 #include "intel_plane_initial.h"
 #include "xe_bo.h"
@@ -104,13 +105,8 @@ initial_plane_bo(struct xe_device *xe,
 		phys_base = base;
 		flags |= XE_BO_FLAG_STOLEN;
 
-		/*
-		 * If the FB is too big, just don't use it since fbdev is not very
-		 * important and we should probably use that space with FBC or other
-		 * features.
-		 */
 		if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
-		    plane_config->size * 2 > stolen->size)
+		    !intel_fbdev_fb_prefer_stolen(&xe->display, plane_config->size))
 			return NULL;
 	}
 
-- 
2.44.2

RE: [PATCH 17/20] drm/xe/fbdev: Extract intel_fbdev_fb_prefer_stolen()

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 17/20] drm/xe/fbdev: Extract intel_fbdev_fb_prefer_stolen()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the "should we keep the bios fb in stolen?" logic into into a helper function,
> same as was done for i915. Gives us a single place where to tweak the heuristics.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/xe/display/intel_fbdev_fb.c   | 18 ++++++++++++++++++
>  drivers/gpu/drm/xe/display/xe_plane_initial.c |  8 ++------
>  2 files changed, 20 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> index 816ad13821a8..f7905b382d06 100644
> --- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> +++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> @@ -11,6 +11,24 @@
>  #include "xe_gt.h"
>  #include "xe_ttm_stolen_mgr.h"
> 
> +bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
> +				  unsigned int size)
> +{
> +	struct xe_device *xe = to_xe_device(display->drm);
> +	struct ttm_resource_manager *stolen;
> +
> +	stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
> +	if (!stolen)
> +		return false;
> +
> +	/*
> +	 * If the FB is too big, just don't use it since fbdev is not very
> +	 * important and we should probably use that space with FBC or other
> +	 * features.
> +	 */
> +	return stolen->size >= size * 2;
> +}
> +
>  struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
>  					       struct drm_fb_helper_surface_size
> *sizes)  { diff --git a/drivers/gpu/drm/xe/display/xe_plane_initial.c
> b/drivers/gpu/drm/xe/display/xe_plane_initial.c
> index 21965cc8a9ca..4c000e95aea5 100644
> --- a/drivers/gpu/drm/xe/display/xe_plane_initial.c
> +++ b/drivers/gpu/drm/xe/display/xe_plane_initial.c
> @@ -15,6 +15,7 @@
>  #include "intel_display_types.h"
>  #include "intel_fb.h"
>  #include "intel_fb_pin.h"
> +#include "intel_fbdev_fb.h"
>  #include "intel_frontbuffer.h"
>  #include "intel_plane_initial.h"
>  #include "xe_bo.h"
> @@ -104,13 +105,8 @@ initial_plane_bo(struct xe_device *xe,
>  		phys_base = base;
>  		flags |= XE_BO_FLAG_STOLEN;
> 
> -		/*
> -		 * If the FB is too big, just don't use it since fbdev is not very
> -		 * important and we should probably use that space with FBC or
> other
> -		 * features.
> -		 */
>  		if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
> -		    plane_config->size * 2 > stolen->size)
> +		    !intel_fbdev_fb_prefer_stolen(&xe->display, plane_config-
> >size))
>  			return NULL;
>  	}
> 
> --
> 2.44.2

[PATCH 18/20] drm/xe/fbdev: Use the same logic for fbdev stolen takever and fresh allocation

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently xe only checks that the BIOS FB doesn't take up too much
stolen memory, but does no such check when allocating a fresh FB
from stolen. Use the same rule for both, just like i915 does.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
index f7905b382d06..f67bc0fd803b 100644
--- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
+++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
@@ -17,6 +17,9 @@ bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
 	struct xe_device *xe = to_xe_device(display->drm);
 	struct ttm_resource_manager *stolen;
 
+	if (IS_DGFX(xe))
+		return false;
+
 	stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
 	if (!stolen)
 		return false;
@@ -55,7 +58,7 @@ struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
 	size = PAGE_ALIGN(size);
 	obj = ERR_PTR(-ENODEV);
 
-	if (!IS_DGFX(xe)) {
+	if (intel_fbdev_fb_prefer_stolen(&xe->display, size)) {
 		obj = xe_bo_create_pin_map(xe, xe_device_get_root_tile(xe),
 					   NULL, size,
 					   ttm_bo_type_kernel, XE_BO_FLAG_SCANOUT |
-- 
2.44.2

RE: [PATCH 18/20] drm/xe/fbdev: Use the same logic for fbdev stolen takever and fresh allocation

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 18/20] drm/xe/fbdev: Use the same logic for fbdev stolen
> takever and fresh allocation
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently xe only checks that the BIOS FB doesn't take up too much stolen
> memory, but does no such check when allocating a fresh FB from stolen. Use the
> same rule for both, just like i915 does.

Would be good to add restriction for LNL+ as well.

However, current change looks good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> index f7905b382d06..f67bc0fd803b 100644
> --- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> +++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> @@ -17,6 +17,9 @@ bool intel_fbdev_fb_prefer_stolen(struct intel_display
> *display,
>  	struct xe_device *xe = to_xe_device(display->drm);
>  	struct ttm_resource_manager *stolen;
> 
> +	if (IS_DGFX(xe))
> +		return false;
> +
>  	stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
>  	if (!stolen)
>  		return false;
> @@ -55,7 +58,7 @@ struct intel_framebuffer *intel_fbdev_fb_alloc(struct
> drm_fb_helper *helper,
>  	size = PAGE_ALIGN(size);
>  	obj = ERR_PTR(-ENODEV);
> 
> -	if (!IS_DGFX(xe)) {
> +	if (intel_fbdev_fb_prefer_stolen(&xe->display, size)) {
>  		obj = xe_bo_create_pin_map(xe, xe_device_get_root_tile(xe),
>  					   NULL, size,
>  					   ttm_bo_type_kernel,
> XE_BO_FLAG_SCANOUT |
> --
> 2.44.2

[PATCH 19/20] drm/i915/fbdev: Adjust fbdev stolen mem usage heuristic

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Replace the "1/2 of stolen size" fbdev fb size heuristic with
something a bit more clever, that is ask the FBC code how much
stolen mem it would like to have avaialable for its CFB use.

TODO:
- This doesn't account for the fact that FBC's idea
  usable stolen size might differ from other users of stolen
- Would be nice to share the code with xe, but need to
  figure out how to abstract the stolen size and
  dgpu/lmem stuff

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
index 0a6445acb100..29f3241c9270 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
@@ -16,12 +16,11 @@ bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
 {
 	struct drm_i915_private *i915 = to_i915(display->drm);
 
-	/*
-	 * If the FB is too big, just don't use it since fbdev is not very
-	 * important and we should probably use that space with FBC or other
-	 * features.
-	 */
-	return i915->dsm.usable_size >= size * 2;
+	if (size > i915->dsm.usable_size)
+		return false;
+
+	/* try to ensure FBC has enough stolen to do its job well */
+	return i915->dsm.usable_size - size >= intel_fbc_preferred_cfb_size(&i915->display);
 }
 
 struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
-- 
2.44.2

RE: [PATCH 19/20] drm/i915/fbdev: Adjust fbdev stolen mem usage heuristic

[Shankar, Uma]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 19/20] drm/i915/fbdev: Adjust fbdev stolen mem usage heuristic
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Replace the "1/2 of stolen size" fbdev fb size heuristic with something a bit more
> clever, that is ask the FBC code how much stolen mem it would like to have
> avaialable for its CFB use.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> TODO:
> - This doesn't account for the fact that FBC's idea
>   usable stolen size might differ from other users of stolen
> - Would be nice to share the code with xe, but need to
>   figure out how to abstract the stolen size and
>   dgpu/lmem stuff
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbdev_fb.c | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> index 0a6445acb100..29f3241c9270 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev_fb.c
> @@ -16,12 +16,11 @@ bool intel_fbdev_fb_prefer_stolen(struct intel_display
> *display,  {
>  	struct drm_i915_private *i915 = to_i915(display->drm);
> 
> -	/*
> -	 * If the FB is too big, just don't use it since fbdev is not very
> -	 * important and we should probably use that space with FBC or other
> -	 * features.
> -	 */
> -	return i915->dsm.usable_size >= size * 2;
> +	if (size > i915->dsm.usable_size)
> +		return false;
> +
> +	/* try to ensure FBC has enough stolen to do its job well */
> +	return i915->dsm.usable_size - size >=
> +intel_fbc_preferred_cfb_size(&i915->display);
>  }
> 
>  struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> --
> 2.44.2

[PATCH 20/20] drm/xe/fbdev: Adjust fbdev stolen mem usage heuristic

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Replace the "1/2 of stolen size" fbdev fb size heuristic with
something a bit more clever, that is ask the FBC code how much
stolen mem it would like to have avaialable for its CFB use.

TODO:
- This doesn't account for the fact that FBC's idea
  usable stolen size might differ from other users of stolen
- Would be nice to share the code with i915, but need to
  figure out how to abstract the stolen size and
  dgpu/lmem stuff

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
index f67bc0fd803b..62e1d176b07f 100644
--- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
+++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
@@ -24,12 +24,11 @@ bool intel_fbdev_fb_prefer_stolen(struct intel_display *display,
 	if (!stolen)
 		return false;
 
-	/*
-	 * If the FB is too big, just don't use it since fbdev is not very
-	 * important and we should probably use that space with FBC or other
-	 * features.
-	 */
-	return stolen->size >= size * 2;
+	if (size > stolen->size)
+		return false;
+
+	/* try to ensure FBC has enough stolen to do its job well */
+	return stolen->size - size >= intel_fbc_preferred_cfb_size(&xe->display);
 }
 
 struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
-- 
2.44.2

RE: [PATCH 20/20] drm/xe/fbdev: Adjust fbdev stolen mem usage heuristic

[Shankar, Uma]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 20/20] drm/xe/fbdev: Adjust fbdev stolen mem usage heuristic
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Replace the "1/2 of stolen size" fbdev fb size heuristic with something a bit more
> clever, that is ask the FBC code how much stolen mem it would like to have
> avaialable for its CFB use.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> TODO:
> - This doesn't account for the fact that FBC's idea
>   usable stolen size might differ from other users of stolen
> - Would be nice to share the code with i915, but need to
>   figure out how to abstract the stolen size and
>   dgpu/lmem stuff
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/xe/display/intel_fbdev_fb.c | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> index f67bc0fd803b..62e1d176b07f 100644
> --- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> +++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
> @@ -24,12 +24,11 @@ bool intel_fbdev_fb_prefer_stolen(struct intel_display
> *display,
>  	if (!stolen)
>  		return false;
> 
> -	/*
> -	 * If the FB is too big, just don't use it since fbdev is not very
> -	 * important and we should probably use that space with FBC or other
> -	 * features.
> -	 */
> -	return stolen->size >= size * 2;
> +	if (size > stolen->size)
> +		return false;
> +
> +	/* try to ensure FBC has enough stolen to do its job well */
> +	return stolen->size - size >=
> +intel_fbc_preferred_cfb_size(&xe->display);
>  }
> 
>  struct intel_framebuffer *intel_fbdev_fb_alloc(struct drm_fb_helper *helper,
> --
> 2.44.2

✗ Fi.CI.CHECKPATCH: warning for drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage

[Patchwork]

== Series Details ==

Series: drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage
URL   : https://patchwork.freedesktop.org/series/135800/
State : warning

== Summary ==

Error: dim checkpatch failed
1548cd572c1d drm/i915/fbc: Extract intel_fbc_has_fences()
7aedff05b81d drm/i915/fbc: Convert to intel_display, mostly
-:72: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__fbc_id' - possible side-effects?
#72: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:64:
+#define for_each_fbc_id(__display, __fbc_id) \
 	for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS; (__fbc_id)++) \
+		for_each_if(DISPLAY_RUNTIME_INFO(__display)->fbc_mask & BIT(__fbc_id))

-:80: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#80: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:68:
+#define for_each_intel_fbc(__display, __fbc, __fbc_id) \
+	for_each_fbc_id((__display), (__fbc_id)) \
+		for_each_if((__fbc) = (__display)->fbc[(__fbc_id)])

-:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#80: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:68:
+#define for_each_intel_fbc(__display, __fbc, __fbc_id) \
+	for_each_fbc_id((__display), (__fbc_id)) \
+		for_each_if((__fbc) = (__display)->fbc[(__fbc_id)])

-:80: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__fbc_id' - possible side-effects?
#80: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:68:
+#define for_each_intel_fbc(__display, __fbc, __fbc_id) \
+	for_each_fbc_id((__display), (__fbc_id)) \
+		for_each_if((__fbc) = (__display)->fbc[(__fbc_id)])

-:679: WARNING:LONG_LINE: line length of 200 exceeds 100 columns
#679: FILE: drivers/gpu/drm/i915/display/intel_fbc.c:842:
+			      "not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size);

total: 1 errors, 1 warnings, 3 checks, 1268 lines checked
e2f3b9389a34 drm/i915/fbc: s/_intel_fbc_cfb_stride()/intel_fbc_plane_cfb_stride()/
c44349a28111 drm/i915/fbc: Extract intel_fbc_max_plane_size()
17cacd8430ef drm/i915/fbc: Extract intel_fbc_max_surface_size()
30df06a66ac5 drm/i915/fbc: s/intel_fbc_hw_tracking_covers_screen()/intel_fbc_surface_size_ok()/
42bd62db5206 drm/i915/fbc: Adjust g4x+ platform checks
d1483dbe647c drm/i915/fbc: Extract _intel_fbc_cfb_stride()
18f5e36ac652 drm/i915/fbc: s/lines/height/
044ee0a89fff drm/i915/fbc: Reoder CFB max height platform checks
a5e6fc71bbbc drm/i915/fbc: Extract intel_fbc_max_cfb_height()
4d539cf61e6c drm/i915/fbc: Extract _intel_fbc_cfb_size()
5b3fefb53338 drm/i915/fbc: Extract intel_fbc_cfb_cpp()
93866e28ed1b drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()
d55ab16969e1 drm/xe/fbdev: Fix BIOS FB vs.s stolen size checke
cf0af2d009d4 drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()
c41f30ea8cf4 drm/xe/fbdev: Extract intel_fbdev_fb_prefer_stolen()
d41a06193f6d drm/xe/fbdev: Use the same logic for fbdev stolen takever and fresh allocation
d768e216f464 drm/i915/fbdev: Adjust fbdev stolen mem usage heuristic
bafb123f903f drm/xe/fbdev: Adjust fbdev stolen mem usage heuristic

✗ Fi.CI.SPARSE: warning for drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage

[Patchwork]

== Series Details ==

Series: drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage
URL   : https://patchwork.freedesktop.org/series/135800/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 9507 bytes --]

== Series Details ==

Series: drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage
URL   : https://patchwork.freedesktop.org/series/135800/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15036 -> Patchwork_135800v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/index.html

Participating hosts (40 -> 39)
------------------------------

  Additional (2): bat-adlp-9 bat-adlp-6 
  Missing    (3): fi-cfl-8109u fi-snb-2520m fi-kbl-8809g 

Known issues
------------

  Here are the changes found in Patchwork_135800v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@debugfs_test@basic-hwmon:
    - bat-adlp-9:         NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@debugfs_test@basic-hwmon.html
    - bat-adlp-6:         NOTRUN -> [SKIP][2] ([i915#9318])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@debugfs_test@basic-hwmon.html

  * igt@gem_lmem_swapping@basic:
    - bat-adlp-9:         NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@random-engines:
    - bat-adlp-6:         NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_tiled_pread_basic:
    - bat-adlp-6:         NOTRUN -> [SKIP][5] ([i915#3282])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@gem_tiled_pread_basic.html
    - bat-adlp-9:         NOTRUN -> [SKIP][6] ([i915#3282])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-adlp-9:         NOTRUN -> [SKIP][7] ([i915#6621])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@i915_pm_rps@basic-api.html
    - bat-adlp-6:         NOTRUN -> [SKIP][8] ([i915#6621])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@i915_pm_rps@basic-api.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - bat-adlp-9:         NOTRUN -> [SKIP][9] ([i915#4103]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-adlp-6:         NOTRUN -> [SKIP][10] ([i915#4103]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-adlp-6:         NOTRUN -> [SKIP][11] ([i915#3555] / [i915#3840])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@kms_dsc@dsc-basic.html
    - bat-adlp-9:         NOTRUN -> [SKIP][12] ([i915#3555] / [i915#3840])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-adlp-6:         NOTRUN -> [SKIP][13]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@kms_force_connector_basic@force-load-detect.html
    - bat-adlp-9:         NOTRUN -> [SKIP][14]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-adlp-9:         NOTRUN -> [SKIP][15] ([i915#9812])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr@psr-primary-page-flip@edp-1:
    - bat-jsl-3:          [PASS][16] -> [SKIP][17] ([i915#9688]) +3 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/bat-jsl-3/igt@kms_psr@psr-primary-page-flip@edp-1.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-jsl-3/igt@kms_psr@psr-primary-page-flip@edp-1.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-adlp-9:         NOTRUN -> [SKIP][18] ([i915#1072] / [i915#9673] / [i915#9732]) +3 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-adlp-9:         NOTRUN -> [SKIP][19] ([i915#3555])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@kms_setmode@basic-clone-single-crtc.html
    - bat-adlp-6:         NOTRUN -> [SKIP][20] ([i915#3555])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-adlp-9:         NOTRUN -> [SKIP][21] ([i915#3291] / [i915#3708]) +2 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-9/igt@prime_vgem@basic-fence-read.html
    - bat-adlp-6:         NOTRUN -> [SKIP][22] ([i915#3291] / [i915#3708]) +2 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/bat-adlp-6/igt@prime_vgem@basic-fence-read.html

  
#### Possible fixes ####

  * igt@i915_module_load@reload:
    - fi-kbl-7567u:       [DMESG-WARN][23] ([i915#180] / [i915#1982] / [i915#9925]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/fi-kbl-7567u/igt@i915_module_load@reload.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/fi-kbl-7567u/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@sanitycheck:
    - fi-kbl-7567u:       [DMESG-WARN][25] ([i915#11328]) -> [PASS][26] +80 other tests pass
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/fi-kbl-7567u/igt@i915_selftest@live@sanitycheck.html

  * igt@kms_busy@basic@flip:
    - fi-kbl-7567u:       [DMESG-WARN][27] ([i915#180]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/fi-kbl-7567u/igt@kms_busy@basic@flip.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/fi-kbl-7567u/igt@kms_busy@basic@flip.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - fi-kbl-7567u:       [DMESG-WARN][29] ([i915#10062] / [i915#180] / [i915#9925]) -> [PASS][30] +1 other test pass
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/fi-kbl-7567u/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/fi-kbl-7567u/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - fi-kbl-7567u:       [DMESG-WARN][31] ([i915#180] / [i915#9925]) -> [PASS][32] +37 other tests pass
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10062]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10062
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#11328]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11328
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9925]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9925


Build changes
-------------

  * Linux: CI_DRM_15036 -> Patchwork_135800v1

  CI-20190529: 20190529
  CI_DRM_15036: cdd1a80a2d16d5213af20a29eb7570a7651db7dc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7916: 971cfc9d6afc8242db25d1eabd4ae00890d9144a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_135800v1: cdd1a80a2d16d5213af20a29eb7570a7651db7dc @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/index.html

[-- Attachment #2: Type: text/html, Size: 11800 bytes --]

✗ Fi.CI.IGT: failure for drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 73285 bytes --]

== Series Details ==

Series: drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage
URL   : https://patchwork.freedesktop.org/series/135800/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15036_full -> Patchwork_135800v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_135800v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_135800v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (9 -> 9)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_135800v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_big@single:
    - shard-tglu:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-tglu-3/igt@gem_exec_big@single.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-6/igt@gem_exec_big@single.html

  * igt@gem_exec_schedule@wide@rcs0:
    - shard-mtlp:         NOTRUN -> [DMESG-WARN][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gem_exec_schedule@wide@rcs0.html

  * igt@gem_exec_suspend@basic-s0@lmem0:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@gem_exec_suspend@basic-s0@lmem0.html

  * igt@kms_flip@flip-vs-wf_vblank-interruptible@a-vga1:
    - shard-snb:          [PASS][5] -> [INCOMPLETE][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-snb7/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-vga1.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-snb6/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-vga1.html

  
Known issues
------------

  Here are the changes found in Patchwork_135800v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-reloc-keep-cache:
    - shard-dg1:          NOTRUN -> [SKIP][7] ([i915#8411])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@api_intel_bb@blit-reloc-keep-cache.html

  * igt@device_reset@cold-reset-bound:
    - shard-tglu:         NOTRUN -> [SKIP][8] ([i915#11078])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@device_reset@cold-reset-bound.html

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-dg1:          NOTRUN -> [SKIP][9] ([i915#11078])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@drm_fdinfo@busy-idle@vcs1:
    - shard-dg1:          NOTRUN -> [SKIP][10] ([i915#8414]) +5 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@drm_fdinfo@busy-idle@vcs1.html

  * igt@drm_fdinfo@idle@rcs0:
    - shard-rkl:          NOTRUN -> [FAIL][11] ([i915#7742])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@drm_fdinfo@idle@rcs0.html

  * igt@drm_fdinfo@most-busy-idle-check-all@vecs1:
    - shard-dg2:          NOTRUN -> [SKIP][12] ([i915#8414]) +13 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@drm_fdinfo@most-busy-idle-check-all@vecs1.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-tglu:         NOTRUN -> [SKIP][13] ([i915#3555] / [i915#9323])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-mtlp:         NOTRUN -> [SKIP][14] ([i915#7697])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gem_close_race@multigpu-basic-process.html
    - shard-rkl:          NOTRUN -> [SKIP][15] ([i915#7697])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_create@create-ext-set-pat:
    - shard-dg2:          NOTRUN -> [SKIP][16] ([i915#8562])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_persistence@hang:
    - shard-mtlp:         NOTRUN -> [SKIP][17] ([i915#8555])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gem_ctx_persistence@hang.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-tglu:         NOTRUN -> [SKIP][18] ([i915#280])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_eio@hibernate:
    - shard-rkl:          NOTRUN -> [ABORT][19] ([i915#7975] / [i915#8213])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@gem_eio@hibernate.html

  * igt@gem_exec_balancer@bonded-pair:
    - shard-dg2:          NOTRUN -> [SKIP][20] ([i915#4771])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@gem_exec_balancer@bonded-pair.html
    - shard-dg1:          NOTRUN -> [SKIP][21] ([i915#4771])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@gem_exec_balancer@bonded-pair.html

  * igt@gem_exec_balancer@noheartbeat:
    - shard-dg2:          NOTRUN -> [SKIP][22] ([i915#8555])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@gem_exec_balancer@noheartbeat.html

  * igt@gem_exec_balancer@parallel-contexts:
    - shard-rkl:          NOTRUN -> [SKIP][23] ([i915#4525])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@gem_exec_balancer@parallel-contexts.html

  * igt@gem_exec_balancer@sliced:
    - shard-dg2:          NOTRUN -> [SKIP][24] ([i915#4812])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@gem_exec_balancer@sliced.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-mtlp:         NOTRUN -> [SKIP][25] ([i915#4473] / [i915#4771])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none:
    - shard-dg1:          NOTRUN -> [SKIP][26] ([i915#3539] / [i915#4852]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_exec_fair@basic-none.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][27] ([i915#2842])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-glk8/igt@gem_exec_fair@basic-none-rrul@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglu:         NOTRUN -> [FAIL][28] ([i915#2842])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][29] -> [FAIL][30] ([i915#2842])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_flush@basic-uc-ro-default:
    - shard-dg2:          NOTRUN -> [SKIP][31] ([i915#3539] / [i915#4852]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@gem_exec_flush@basic-uc-ro-default.html

  * igt@gem_exec_reloc@basic-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][32] ([i915#3281]) +2 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@gem_exec_reloc@basic-cpu.html

  * igt@gem_exec_reloc@basic-wc-read:
    - shard-dg1:          NOTRUN -> [SKIP][33] ([i915#3281]) +4 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@gem_exec_reloc@basic-wc-read.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - shard-rkl:          NOTRUN -> [SKIP][34] ([i915#3281]) +2 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_exec_schedule@deep@rcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][35] ([i915#4537])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gem_exec_schedule@deep@rcs0.html

  * igt@gem_exec_schedule@preempt-queue-contexts:
    - shard-dg1:          NOTRUN -> [SKIP][36] ([i915#4812])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_exec_schedule@preempt-queue-contexts.html

  * igt@gem_fence_thrash@bo-write-verify-threaded-none:
    - shard-dg2:          NOTRUN -> [SKIP][37] ([i915#4860])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@gem_fence_thrash@bo-write-verify-threaded-none.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][38] ([i915#4860])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html

  * igt@gem_lmem_swapping@heavy-multi@lmem0:
    - shard-dg2:          [PASS][39] -> [FAIL][40] ([i915#10378])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-5/igt@gem_lmem_swapping@heavy-multi@lmem0.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-11/igt@gem_lmem_swapping@heavy-multi@lmem0.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0:
    - shard-dg1:          NOTRUN -> [SKIP][41] ([i915#4565])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_lmem_swapping@heavy-verify-multi-ccs@lmem0.html

  * igt@gem_lmem_swapping@heavy-verify-multi@lmem0:
    - shard-dg1:          NOTRUN -> [FAIL][42] ([i915#10378])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@gem_lmem_swapping@heavy-verify-multi@lmem0.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][43] ([i915#4613]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@gem_lmem_swapping@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@verify-ccs:
    - shard-glk:          NOTRUN -> [SKIP][44] ([i915#4613]) +3 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-glk4/igt@gem_lmem_swapping@verify-ccs.html

  * igt@gem_mmap_gtt@big-bo-tiledy:
    - shard-dg2:          NOTRUN -> [SKIP][45] ([i915#4077]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@gem_mmap_gtt@big-bo-tiledy.html

  * igt@gem_mmap_gtt@cpuset-basic-small-copy-odd:
    - shard-mtlp:         NOTRUN -> [SKIP][46] ([i915#4077]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gem_mmap_gtt@cpuset-basic-small-copy-odd.html

  * igt@gem_mmap_wc@copy:
    - shard-dg2:          NOTRUN -> [SKIP][47] ([i915#4083]) +2 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@gem_mmap_wc@copy.html

  * igt@gem_mmap_wc@set-cache-level:
    - shard-mtlp:         NOTRUN -> [SKIP][48] ([i915#4083])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-1/igt@gem_mmap_wc@set-cache-level.html

  * igt@gem_mmap_wc@write-cpu-read-wc-unflushed:
    - shard-dg1:          NOTRUN -> [SKIP][49] ([i915#4083]) +7 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@gem_mmap_wc@write-cpu-read-wc-unflushed.html

  * igt@gem_partial_pwrite_pread@reads-uncached:
    - shard-mtlp:         NOTRUN -> [SKIP][50] ([i915#3282]) +1 other test skip
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-1/igt@gem_partial_pwrite_pread@reads-uncached.html

  * igt@gem_pread@bench:
    - shard-rkl:          NOTRUN -> [SKIP][51] ([i915#3282]) +5 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@gem_pread@bench.html

  * igt@gem_pwrite_snooped:
    - shard-dg1:          NOTRUN -> [SKIP][52] ([i915#3282]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_pwrite_snooped.html

  * igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#4270]) +2 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-rkl:          NOTRUN -> [SKIP][54] ([i915#4270]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-tglu:         NOTRUN -> [SKIP][55] ([i915#4270])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-stale-ctx-execution:
    - shard-dg1:          NOTRUN -> [SKIP][56] ([i915#4270]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_pxp@verify-pxp-stale-ctx-execution.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][57] ([i915#8428]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][58] ([i915#5190] / [i915#8428]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html

  * igt@gem_render_tiled_blits@basic:
    - shard-dg1:          NOTRUN -> [SKIP][59] ([i915#4079]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_render_tiled_blits@basic.html

  * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
    - shard-rkl:          NOTRUN -> [SKIP][60] ([i915#8411]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][61] ([i915#3297]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-dg1:          NOTRUN -> [SKIP][62] ([i915#3297])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-mtlp:         NOTRUN -> [SKIP][63] ([i915#3297])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@gen7_exec_parse@chained-batch:
    - shard-mtlp:         NOTRUN -> [SKIP][64] +4 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@gen7_exec_parse@chained-batch.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-rkl:          NOTRUN -> [SKIP][65] ([i915#2527])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@bb-chained:
    - shard-dg1:          NOTRUN -> [SKIP][66] ([i915#2527]) +2 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@gen9_exec_parse@bb-chained.html

  * igt@gen9_exec_parse@bb-start-param:
    - shard-dg2:          NOTRUN -> [SKIP][67] ([i915#2856])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@gen9_exec_parse@bb-start-param.html

  * igt@gen9_exec_parse@unaligned-jump:
    - shard-tglu:         NOTRUN -> [SKIP][68] ([i915#2527] / [i915#2856])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@gen9_exec_parse@unaligned-jump.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-dg1:          [PASS][69] -> [ABORT][70] ([i915#9820])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg1-15/igt@i915_module_load@reload-with-fault-injection.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-13/igt@i915_module_load@reload-with-fault-injection.html
    - shard-mtlp:         [PASS][71] -> [INCOMPLETE][72] ([i915#9849])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-5/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rps@basic-api:
    - shard-dg1:          NOTRUN -> [SKIP][73] ([i915#6621])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@i915_pm_rps@basic-api.html
    - shard-dg2:          NOTRUN -> [SKIP][74] ([i915#6621])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@i915_pm_rps@basic-api.html

  * igt@i915_pm_sseu@full-enable:
    - shard-tglu:         NOTRUN -> [SKIP][75] ([i915#4387])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@i915_pm_sseu@full-enable.html

  * igt@i915_query@query-topology-coherent-slice-mask:
    - shard-mtlp:         NOTRUN -> [SKIP][76] ([i915#6188])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@i915_query@query-topology-coherent-slice-mask.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-rkl:          NOTRUN -> [FAIL][77] ([i915#10031] / [i915#11279])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-x-tiled-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][78] ([i915#4212])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][79] ([i915#4212])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_addfb_basic@basic-x-tiled-legacy.html
    - shard-dg1:          NOTRUN -> [SKIP][80] ([i915#4212])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_addfb_basic@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-rkl:          NOTRUN -> [SKIP][81] ([i915#3826])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-edp-1-4-rc-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][82] ([i915#8709]) +2 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-edp-1-4-rc-ccs.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][83] ([i915#8709]) +11 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-rkl:          NOTRUN -> [SKIP][84] ([i915#5286]) +3 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-180:
    - shard-dg1:          NOTRUN -> [SKIP][85] ([i915#4538] / [i915#5286]) +3 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-tglu:         NOTRUN -> [SKIP][86] ([i915#5286]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][87] ([i915#3638]) +2 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][88] ([i915#3638]) +1 other test skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-mtlp:         NOTRUN -> [SKIP][89] ([i915#6187])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][90] ([i915#4538] / [i915#5190]) +2 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg2:          NOTRUN -> [SKIP][91] ([i915#5190])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][92] ([i915#4538]) +3 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_joiner@basic:
    - shard-tglu:         NOTRUN -> [SKIP][93] ([i915#10656])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_big_joiner@basic.html

  * igt@kms_big_joiner@basic-force-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][94] ([i915#10656]) +1 other test skip
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@kms_big_joiner@basic-force-joiner.html

  * igt@kms_big_joiner@invalid-modeset:
    - shard-dg1:          NOTRUN -> [SKIP][95] ([i915#10656])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_big_joiner@invalid-modeset.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][96] ([i915#10307] / [i915#10434] / [i915#6095]) +5 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][97] ([i915#6095]) +87 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][98] ([i915#6095]) +11 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][99] ([i915#10307] / [i915#6095]) +165 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-3/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][100] ([i915#6095]) +75 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-13/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][101] ([i915#6095]) +11 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [SKIP][102] +124 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-glk4/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition:
    - shard-dg1:          NOTRUN -> [SKIP][103] ([i915#3742])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#7213]) +3 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html

  * igt@kms_cdclk@plane-scaling:
    - shard-rkl:          NOTRUN -> [SKIP][105] ([i915#3742])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
    - shard-mtlp:         NOTRUN -> [SKIP][106] ([i915#7828]) +2 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html

  * igt@kms_chamelium_edid@dp-edid-read:
    - shard-dg2:          NOTRUN -> [SKIP][107] ([i915#7828]) +2 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@kms_chamelium_edid@dp-edid-read.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][108] ([i915#7828]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html

  * igt@kms_chamelium_frames@hdmi-frame-dump:
    - shard-rkl:          NOTRUN -> [SKIP][109] ([i915#7828]) +5 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_chamelium_frames@hdmi-frame-dump.html

  * igt@kms_chamelium_hpd@dp-hpd-after-suspend:
    - shard-dg1:          NOTRUN -> [SKIP][110] ([i915#7828]) +4 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-dg2:          NOTRUN -> [SKIP][111] ([i915#7118] / [i915#9424])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][112] ([i915#3116])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-mtlp:         NOTRUN -> [SKIP][113] ([i915#3299])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@lic-type-1:
    - shard-dg1:          NOTRUN -> [SKIP][114] ([i915#9424])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_content_protection@lic-type-1.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-mtlp:         NOTRUN -> [SKIP][115] ([i915#3359]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-max-size:
    - shard-dg2:          NOTRUN -> [SKIP][116] ([i915#3555])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_cursor_crc@cursor-onscreen-max-size.html
    - shard-dg1:          NOTRUN -> [SKIP][117] ([i915#3555]) +2 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_cursor_crc@cursor-onscreen-max-size.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][118] ([i915#11453]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-128x42:
    - shard-mtlp:         NOTRUN -> [SKIP][119] ([i915#8814])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-1/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-rkl:          NOTRUN -> [SKIP][120] ([i915#3555]) +1 other test skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][121] ([i915#11453]) +1 other test skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_cursor_crc@cursor-sliding-512x170.html
    - shard-dg1:          NOTRUN -> [SKIP][122] ([i915#11453])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_edge_walk@256x256-top-edge@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][123] -> [DMESG-FAIL][124] ([i915#118])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-glk2/igt@kms_cursor_edge_walk@256x256-top-edge@pipe-a-hdmi-a-1.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-glk8/igt@kms_cursor_edge_walk@256x256-top-edge@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][125] +9 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
    - shard-mtlp:         NOTRUN -> [SKIP][126] ([i915#9809]) +1 other test skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-tglu:         NOTRUN -> [SKIP][127] ([i915#4103])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-dg1:          NOTRUN -> [SKIP][128] ([i915#4103] / [i915#4213])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-dg2:          NOTRUN -> [SKIP][129] ([i915#9833])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
    - shard-dg1:          NOTRUN -> [SKIP][130] ([i915#9723])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][131] ([i915#3804])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_aux_dev:
    - shard-dg2:          [PASS][132] -> [SKIP][133] ([i915#1257])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@kms_dp_aux_dev.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_dp_aux_dev.html

  * igt@kms_fbcon_fbt@psr:
    - shard-rkl:          NOTRUN -> [SKIP][134] ([i915#3955])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_fbcon_fbt@psr.html

  * igt@kms_feature_discovery@chamelium:
    - shard-rkl:          NOTRUN -> [SKIP][135] ([i915#4854])
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-3x:
    - shard-rkl:          NOTRUN -> [SKIP][136] ([i915#1839])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@psr2:
    - shard-dg1:          NOTRUN -> [SKIP][137] ([i915#658]) +1 other test skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_feature_discovery@psr2.html
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#658])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-absolute-wf_vblank-interruptible:
    - shard-mtlp:         NOTRUN -> [SKIP][139] ([i915#3637])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-rmfb-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][140] ([i915#3637])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-dg1:          NOTRUN -> [SKIP][141] ([i915#9934]) +5 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1:
    - shard-snb:          [PASS][142] -> [FAIL][143] ([i915#2122]) +1 other test fail
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-snb2/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-snb7/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a2:
    - shard-dg2:          NOTRUN -> [FAIL][144] ([i915#2122])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@kms_flip@flip-vs-absolute-wf_vblank@a-hdmi-a2.html

  * igt@kms_flip@flip-vs-fences:
    - shard-dg2:          NOTRUN -> [SKIP][145] ([i915#8381])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-7/igt@kms_flip@flip-vs-fences.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][146] ([i915#8810])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][147] ([i915#2672]) +1 other test skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
    - shard-dg1:          NOTRUN -> [SKIP][148] ([i915#2587] / [i915#2672]) +1 other test skip
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][149] ([i915#2672] / [i915#3555])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-dg2:          [PASS][150] -> [FAIL][151] ([i915#6880])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-2p-rte:
    - shard-dg2:          NOTRUN -> [SKIP][152] ([i915#5354]) +14 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-2p-rte.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][153] ([i915#8708]) +2 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][154] ([i915#1825]) +7 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][155] ([i915#8708]) +11 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render:
    - shard-dg1:          NOTRUN -> [SKIP][156] +31 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][157] ([i915#3458]) +5 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][158] ([i915#3458]) +13 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
    - shard-tglu:         NOTRUN -> [SKIP][159] +21 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][160] ([i915#8708]) +2 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#1825]) +26 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
    - shard-rkl:          NOTRUN -> [SKIP][162] ([i915#3023]) +14 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html

  * igt@kms_getfb@getfb-reject-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][163] ([i915#6118])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_getfb@getfb-reject-ccs.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-dg1:          NOTRUN -> [SKIP][164] ([i915#433])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@invalid-hdr:
    - shard-tglu:         NOTRUN -> [SKIP][165] ([i915#3555] / [i915#8228])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@static-toggle:
    - shard-dg1:          NOTRUN -> [SKIP][166] ([i915#3555] / [i915#8228]) +1 other test skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_hdr@static-toggle.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][167] ([i915#3555] / [i915#8228]) +1 other test skip
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-rkl:          NOTRUN -> [SKIP][168] ([i915#6301]) +1 other test skip
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-dg2:          NOTRUN -> [SKIP][169] +5 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][170] ([i915#10647]) +1 other test fail
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-glk8/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_lowres@tiling-none@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][171] ([i915#10226] / [i915#3582]) +2 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html

  * igt@kms_plane_lowres@tiling-none@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][172] ([i915#3582])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_plane_lowres@tiling-none@pipe-d-edp-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#9423]) +3 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-c-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][174] ([i915#9423]) +7 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-c-hdmi-a-1.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-a-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][175] ([i915#9423]) +7 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-a-hdmi-a-4.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#5176] / [i915#9423]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-a-hdmi-a-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][177] ([i915#5235] / [i915#9423] / [i915#9728]) +3 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][178] ([i915#5235]) +7 other tests skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_plane_scaling@planes-downscale-factor-0-25@pipe-c-hdmi-a-4.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][179] ([i915#5235] / [i915#9423]) +15 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][180] ([i915#5235]) +2 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][181] ([i915#3555] / [i915#5235])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-d-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][182] ([i915#5235]) +5 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-b-hdmi-a-2.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-tglu:         NOTRUN -> [SKIP][183] ([i915#9685])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         [PASS][184] -> [FAIL][185] ([i915#9295])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-tglu-10/igt@kms_pm_dc@dc6-dpms.html
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-8/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-dg1:          NOTRUN -> [SKIP][186] ([i915#9340])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-dg1:          NOTRUN -> [SKIP][187] ([i915#8430])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-mtlp:         NOTRUN -> [SKIP][188] ([i915#9519])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-rkl:          [PASS][189] -> [SKIP][190] ([i915#9519]) +1 other test skip
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-rkl-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
    - shard-dg2:          [PASS][191] -> [SKIP][192] ([i915#9519])
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@pm-caching:
    - shard-dg1:          NOTRUN -> [SKIP][193] ([i915#4077]) +5 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_pm_rpm@pm-caching.html

  * igt@kms_psr2_sf@cursor-plane-update-sf:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([i915#11520])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_psr2_sf@cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf:
    - shard-dg2:          NOTRUN -> [SKIP][195] ([i915#11520]) +1 other test skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_psr2_sf@fbc-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
    - shard-rkl:          NOTRUN -> [SKIP][196] ([i915#11520]) +2 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area:
    - shard-dg1:          NOTRUN -> [SKIP][197] ([i915#11520]) +2 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_psr2_sf@plane-move-sf-dmg-area.html

  * igt@kms_psr@fbc-psr2-cursor-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][198] ([i915#1072] / [i915#9732]) +7 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@kms_psr@fbc-psr2-cursor-mmap-gtt.html

  * igt@kms_psr@fbc-psr2-primary-blt:
    - shard-rkl:          NOTRUN -> [SKIP][199] ([i915#1072] / [i915#9732]) +14 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_psr@fbc-psr2-primary-blt.html

  * igt@kms_psr@pr-basic:
    - shard-mtlp:         NOTRUN -> [SKIP][200] ([i915#9688]) +4 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_psr@pr-basic.html

  * igt@kms_psr@psr-sprite-mmap-gtt@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][201] ([i915#4077] / [i915#9688])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_psr@psr-sprite-mmap-gtt@edp-1.html

  * igt@kms_psr@psr2-primary-render:
    - shard-tglu:         NOTRUN -> [SKIP][202] ([i915#9732]) +4 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_psr@psr2-primary-render.html

  * igt@kms_psr@psr2-sprite-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][203] ([i915#1072] / [i915#9732]) +15 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_psr@psr2-sprite-mmap-gtt.html

  * igt@kms_rotation_crc@exhaust-fences:
    - shard-dg1:          NOTRUN -> [SKIP][204] ([i915#4884])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_rotation_crc@exhaust-fences.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-tglu:         NOTRUN -> [SKIP][205] ([i915#5289])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          NOTRUN -> [SKIP][206] ([i915#5289])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
    - shard-snb:          [PASS][207] -> [FAIL][208] ([i915#9196])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-snb4/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-snb2/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
    - shard-tglu:         [PASS][209] -> [FAIL][210] ([i915#9196])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-tglu-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html

  * igt@kms_vrr@max-min:
    - shard-dg1:          NOTRUN -> [SKIP][211] ([i915#9906])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_vrr@max-min.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-rkl:          NOTRUN -> [SKIP][212] ([i915#9906])
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-dg1:          NOTRUN -> [SKIP][213] ([i915#2437] / [i915#9412])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@kms_writeback@writeback-check-output-xrgb2101010.html
    - shard-glk:          NOTRUN -> [SKIP][214] ([i915#2437])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-glk8/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-rkl:          NOTRUN -> [SKIP][215] ([i915#2437] / [i915#9412])
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
    - shard-mtlp:         NOTRUN -> [SKIP][216] ([i915#2437] / [i915#9412])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-3/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@perf@global-sseu-config:
    - shard-dg2:          NOTRUN -> [SKIP][217] ([i915#7387])
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@perf@global-sseu-config.html

  * igt@perf_pmu@busy-double-start@vecs1:
    - shard-dg2:          [PASS][218] -> [FAIL][219] ([i915#4349]) +3 other tests fail
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@perf_pmu@busy-double-start@vecs1.html
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@perf_pmu@busy-double-start@vecs1.html

  * igt@prime_vgem@basic-read:
    - shard-rkl:          NOTRUN -> [SKIP][220] ([i915#3291] / [i915#3708])
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-3/igt@prime_vgem@basic-read.html

  * igt@prime_vgem@fence-write-hang:
    - shard-dg1:          NOTRUN -> [SKIP][221] ([i915#3708])
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-16/igt@prime_vgem@fence-write-hang.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-dg1:          NOTRUN -> [SKIP][222] ([i915#4818])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@tools_test@sysfs_l3_parity.html
    - shard-dg2:          NOTRUN -> [SKIP][223] ([i915#4818])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-1/igt@tools_test@sysfs_l3_parity.html

  
#### Possible fixes ####

  * igt@drm_fdinfo@most-busy-check-all@rcs0:
    - shard-rkl:          [FAIL][224] ([i915#7742]) -> [PASS][225]
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-rkl-5/igt@drm_fdinfo@most-busy-check-all@rcs0.html
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-5/igt@drm_fdinfo@most-busy-check-all@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-rkl:          [FAIL][226] ([i915#2842]) -> [PASS][227]
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-rkl-3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_lmem_swapping@basic@lmem0:
    - shard-dg2:          [FAIL][228] ([i915#10378]) -> [PASS][229]
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@gem_lmem_swapping@basic@lmem0.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg1:          [TIMEOUT][230] ([i915#5493]) -> [PASS][231]
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-edp-1-linear:
    - shard-mtlp:         [INCOMPLETE][232] -> [PASS][233]
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-mtlp-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-edp-1-linear.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-mtlp-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-c-edp-1-linear.html

  * igt@kms_cursor_legacy@torture-move@pipe-a:
    - shard-dg1:          [DMESG-WARN][234] ([i915#10166]) -> [PASS][235]
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg1-16/igt@kms_cursor_legacy@torture-move@pipe-a.html
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg1-17/igt@kms_cursor_legacy@torture-move@pipe-a.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1:
    - shard-snb:          [FAIL][236] ([i915#2122]) -> [PASS][237]
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-snb7/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-snb5/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_flip@dpms-vs-vblank-race@b-vga1:
    - shard-snb:          [FAIL][238] ([i915#10826]) -> [PASS][239]
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-snb7/igt@kms_flip@dpms-vs-vblank-race@b-vga1.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-snb6/igt@kms_flip@dpms-vs-vblank-race@b-vga1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff:
    - shard-snb:          [SKIP][240] -> [PASS][241]
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff.html
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-snb4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-onoff.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg2:          [SKIP][242] ([i915#9519]) -> [PASS][243]
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-7/igt@kms_pm_rpm@modeset-lpsp.html
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp.html
    - shard-rkl:          [SKIP][244] ([i915#9519]) -> [PASS][245] +3 other tests pass
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp.html
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-4/igt@kms_pm_rpm@modeset-lpsp.html

  
#### Warnings ####

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-rkl:          [ABORT][246] ([i915#9697]) -> [ABORT][247] ([i915#9820])
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-rkl-3/igt@i915_module_load@reload-with-fault-injection.html
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-rkl-4/igt@i915_module_load@reload-with-fault-injection.html

  * igt@kms_content_protection@type1:
    - shard-dg2:          [SKIP][248] ([i915#7118] / [i915#7162] / [i915#9424]) -> [SKIP][249] ([i915#7118] / [i915#9424])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@kms_content_protection@type1.html
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-offscreen-512x512:
    - shard-dg2:          [SKIP][250] ([i915#11453] / [i915#3359]) -> [SKIP][251] ([i915#11453]) +1 other test skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@kms_cursor_crc@cursor-offscreen-512x512.html
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_cursor_crc@cursor-offscreen-512x512.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-dg2:          [SKIP][252] ([i915#11453]) -> [SKIP][253] ([i915#11453] / [i915#3359]) +1 other test skip
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-5/igt@kms_cursor_crc@cursor-onscreen-512x170.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-11/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_psr@psr2-primary-mmap-gtt:
    - shard-dg2:          [SKIP][254] ([i915#1072] / [i915#9673] / [i915#9732]) -> [SKIP][255] ([i915#1072] / [i915#9732]) +16 other tests skip
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@kms_psr@psr2-primary-mmap-gtt.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-8/igt@kms_psr@psr2-primary-mmap-gtt.html

  * igt@kms_psr@psr2-primary-page-flip:
    - shard-dg2:          [SKIP][256] ([i915#1072] / [i915#9732]) -> [SKIP][257] ([i915#1072] / [i915#9673] / [i915#9732]) +4 other tests skip
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-5/igt@kms_psr@psr2-primary-page-flip.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-11/igt@kms_psr@psr2-primary-page-flip.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-dg2:          [SKIP][258] ([i915#11131] / [i915#4235] / [i915#5190]) -> [SKIP][259] ([i915#11131] / [i915#5190])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-11/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-dg2:          [SKIP][260] ([i915#11131]) -> [SKIP][261] ([i915#11131] / [i915#4235])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15036/shard-dg2-5/igt@kms_rotation_crc@sprite-rotation-270.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/shard-dg2-11/igt@kms_rotation_crc@sprite-rotation-270.html

  
  [i915#10031]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10031
  [i915#10166]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10166
  [i915#10226]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10226
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10826
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11131
  [i915#11279]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11279
  [i915#11453]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11453
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/118
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#2122]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2122
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3359]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3359
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3582
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3826]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3826
  [i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/433
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
  [i915#4473]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4473
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4565]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4818
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4884]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4884
  [i915#5176]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5176
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6118
  [i915#6187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6187
  [i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7162
  [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
  [i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7742
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8810]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8810
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
  [i915#9295]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9295
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9673
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9697
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9728]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9728
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
  [i915#9820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9820
  [i915#9833]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9833
  [i915#9849]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9849
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_15036 -> Patchwork_135800v1

  CI-20190529: 20190529
  CI_DRM_15036: cdd1a80a2d16d5213af20a29eb7570a7651db7dc @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7916: 971cfc9d6afc8242db25d1eabd4ae00890d9144a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_135800v1: cdd1a80a2d16d5213af20a29eb7570a7651db7dc @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_135800v1/index.html

[-- Attachment #2: Type: text/html, Size: 89822 bytes --]

Re: [PATCH 00/20] drm/{i915,xe}: FBC cleanups + tweak fbdev stolen usage

[Ville Syrjälä]

On Fri, Jul 05, 2024 at 05:52:34PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Here's an idea for a slightly better heuristic to answer
> the "should fbdev use stolen or not?" question.
> 
> Ended up with a pile of refactoring and cleanups in
> the FBC code as a result.
> 
> Ville Syrjälä (20):
>   drm/i915/fbc: Extract intel_fbc_has_fences()
>   drm/i915/fbc: Convert to intel_display, mostly
>   drm/i915/fbc: s/_intel_fbc_cfb_stride()/intel_fbc_plane_cfb_stride()/
>   drm/i915/fbc: Extract intel_fbc_max_plane_size()
>   drm/i915/fbc: Extract intel_fbc_max_surface_size()
>   drm/i915/fbc:
>     s/intel_fbc_hw_tracking_covers_screen()/intel_fbc_surface_size_ok()/
>   drm/i915/fbc: Adjust g4x+ platform checks
>   drm/i915/fbc: Extract _intel_fbc_cfb_stride()
>   drm/i915/fbc: s/lines/height/
>   drm/i915/fbc: Reoder CFB max height platform checks
>   drm/i915/fbc: Extract intel_fbc_max_cfb_height()
>   drm/i915/fbc: Extract _intel_fbc_cfb_size()
>   drm/i915/fbc: Extract intel_fbc_cfb_cpp()

Pushed all the FBC code refactoring. Thanks for the reviews.

>   drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()
>   drm/xe/fbdev: Fix BIOS FB vs.s stolen size checke
>   drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()
>   drm/xe/fbdev: Extract intel_fbdev_fb_prefer_stolen()
>   drm/xe/fbdev: Use the same logic for fbdev stolen takever and fresh
>     allocation
>   drm/i915/fbdev: Adjust fbdev stolen mem usage heuristic
>   drm/xe/fbdev: Adjust fbdev stolen mem usage heuristic

Left out the rest for now. This should go in after the more
urgent LNL/etc. stolen issues are sorted.

> 
>  .../drm/i915/display/intel_display_debugfs.c  |   4 +-
>  .../drm/i915/display/intel_display_driver.c   |   4 +-
>  drivers/gpu/drm/i915/display/intel_fbc.c      | 564 ++++++++++--------
>  drivers/gpu/drm/i915/display/intel_fbc.h      |  14 +-
>  drivers/gpu/drm/i915/display/intel_fbdev_fb.c |  23 +-
>  drivers/gpu/drm/i915/display/intel_fbdev_fb.h |   5 +-
>  .../drm/i915/display/intel_fifo_underrun.c    |   2 +-
>  .../drm/i915/display/intel_modeset_setup.c    |   2 +-
>  .../drm/i915/display/intel_plane_initial.c    |  10 +-
>  drivers/gpu/drm/xe/display/intel_fbdev_fb.c   |  22 +-
>  drivers/gpu/drm/xe/display/xe_plane_initial.c |   8 +-
>  11 files changed, 389 insertions(+), 269 deletions(-)
> 
> -- 
> 2.44.2

-- 
Ville Syrjälä
Intel