From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2D8ACF34AE for ; Thu, 3 Oct 2024 14:33:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E4F410E86D; Thu, 3 Oct 2024 14:33:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Rf6hWAxy"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.14]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7808C10E867 for ; Thu, 3 Oct 2024 14:32:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727965979; x=1759501979; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=3QSWSF7FOFfF1XnhVgRzYaL3JLhnuVkLG0zCU295vX0=; b=Rf6hWAxy/Be40f381JgFtvIP7Fzo5V3PzxP3QZuD9LC+XoqCHsiGpwYP yDOK9QqbBhKokESTdthZO3PkCcFIrzeUeS+nBUUHcgnNZgOBgIi69LP7y aJQJRW2+VBmrpAaJaKjV1d04/xeJOm54IPfAOu1vJ+zpwNLO+4N4yRGPG /I4qLj2Zenb6bARo2veQHqA/9SRgJLm4W0NBXWs6gntY4ICNu9UmUobX+ nphXTMrpwA1HvHkLHtCVrF4zuumooY8CAc7Uu6Alyu3wfv4aJWv2TnK22 Ez9FxmRMQjBokUPFDku8QaxMag2qa8BBQH+Itd01rMyi8t4CLsPTNtbkY w==; X-CSE-ConnectionGUID: vLtn0R1qTRmfbtvErPaKJw== X-CSE-MsgGUID: 10w8oF/sTZeJZfqAoXTrPg== X-IronPort-AV: E=McAfee;i="6700,10204,11214"; a="27337639" X-IronPort-AV: E=Sophos;i="6.11,174,1725346800"; d="scan'208";a="27337639" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Oct 2024 07:32:59 -0700 X-CSE-ConnectionGUID: Rb+9H3SqRE61saPoyQeGaQ== X-CSE-MsgGUID: X1PXfKoLTGem3rpd0KKFLw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,174,1725346800"; d="scan'208";a="74463556" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 03 Oct 2024 07:32:57 -0700 Received: by stinkbox (sSMTP sendmail emulation); Thu, 03 Oct 2024 17:32:56 +0300 Date: Thu, 3 Oct 2024 17:32:56 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Matt Roper Cc: Sai Teja Pottumuttu , intel-gfx@lists.freedesktop.org, ville.syrjala@intel.com Subject: Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks Message-ID: References: <20241003090341.3140997-1-sai.teja.pottumuttu@intel.com> <20241003142237.GK5725@mdroper-desk1.amr.corp.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20241003142237.GK5725@mdroper-desk1.amr.corp.intel.com> X-Patchwork-Hint: comment X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote: > On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote: > > On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote: > > > With ICL, we have a way to check if gamma and csc are enabled on > > > a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well > > > along with the existing BOTTOM_COLOR checks. > > > > > > BSpec: 7463, 7466 > > > Signed-off-by: Sai Teja Pottumuttu > > > --- > > > drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++-- > > > 1 file changed, 22 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c > > > index 50f41aeb3c28..1bf36898dc7e 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_color.c > > > +++ b/drivers/gpu/drm/i915/display/intel_color.c > > > @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state) > > > crtc_state->csc_enable = true; > > > } > > > > > > +static void icl_get_config(struct intel_crtc_state *crtc_state) > > > +{ > > > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > > + struct drm_i915_private *i915 = to_i915(crtc->base.dev); > > > + u32 bottom_color; > > > + > > > + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc); > > > + crtc_state->csc_mode = ilk_read_csc_mode(crtc); > > > + > > > + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe)); > > > + > > > + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) || > > > + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE)) > > > + crtc_state->gamma_enable = true; > > > + > > > + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) || > > > + (crtc_state->csc_mode & ICL_CSC_ENABLE)) > > > + crtc_state->csc_enable = true; > > > > We don't use the old per-plane/bottom color way of enabling these. > > So this is not right. > > I think that's the reason for the patch --- today we use > skl_get_config() which *only* checks the bottom color settings. And > that approach is documented as being deprecated (although still > supported on current platforms). > > If we're reading out pre-OS state programmed by the vbios, we probably > need to handle whichever approach it took, right? Or are we sanitizing > this away to "off" somewhere that makes it okay to miss what was > programmed? I think we're not doing anything. I suppose some kind of assert_legacy_color_stuff_is_off() thing somewhere could be a decent addition. -- Ville Syrjälä Intel