Re: [PATCH 4/5] drm/i915/irq: hide display_irqs_enabled access

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Fri, Nov 15, 2024 at 03:13:31PM +0200, Jani Nikula wrote:
> On Thu, 14 Nov 2024, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > On Mon, Nov 11, 2024 at 07:53:33PM +0200, Jani Nikula wrote:
> >> Move the check for display_irqs_enabled within vlv_display_irq_reset()
> >> and vlv_display_irq_postinstall() to avoid looking at struct
> >> intel_display members within i915 core irq code.
> >> 
> >> Within display irq code, vlv_display_irq_reset() may need to be called
> >> with !display_irqs_enabled, so add a small wrapper.
> >> 
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/display/intel_display_irq.c | 15 ++++++++++++---
> >>  drivers/gpu/drm/i915/i915_irq.c                  | 12 ++++--------
> >>  2 files changed, 16 insertions(+), 11 deletions(-)
> >> 
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> >> index e1547ebce60e..d5458b0d976b 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> >> @@ -1479,7 +1479,7 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
> >>  		schedule_work(&display->irq.vblank_dc_work);
> >>  }
> >>  
> >> -void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> >> +static void _vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> >>  {
> >>  	struct intel_uncore *uncore = &dev_priv->uncore;
> >>  
> >> @@ -1497,6 +1497,12 @@ void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> >>  	dev_priv->irq_mask = ~0u;
> >>  }
> >>  
> >> +void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> >> +{
> >> +	if (dev_priv->display.irq.display_irqs_enabled)
> >> +		_vlv_display_irq_reset(dev_priv);
> >> +}
> >> +
> >>  void i9xx_display_irq_reset(struct drm_i915_private *i915)
> >>  {
> >>  	if (I915_HAS_HOTPLUG(i915)) {
> >> @@ -1516,6 +1522,9 @@ void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
> >>  	u32 enable_mask;
> >>  	enum pipe pipe;
> >>  
> >> +	if (!dev_priv->display.irq.display_irqs_enabled)
> >> +		return;
> >
> > I got confused here. this likely deserves a separate patch?
> 
> I thought I explained it in the commit message. The check is being moved
> from the callers to the callees. But for vlv_display_irq_reset() we also
> need to be able to call without the check, so that gets an additional
> wrapper.

doh!

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> BR,
> Jani.
> 
> >
> >> +
> >>  	pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
> >>  
> >>  	i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
> >> @@ -1694,7 +1703,7 @@ void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv)
> >>  	dev_priv->display.irq.display_irqs_enabled = true;
> >>  
> >>  	if (intel_irqs_enabled(dev_priv)) {
> >> -		vlv_display_irq_reset(dev_priv);
> >> +		_vlv_display_irq_reset(dev_priv);
> >>  		vlv_display_irq_postinstall(dev_priv);
> >>  	}
> >>  }
> >> @@ -1709,7 +1718,7 @@ void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv)
> >>  	dev_priv->display.irq.display_irqs_enabled = false;
> >>  
> >>  	if (intel_irqs_enabled(dev_priv))
> >> -		vlv_display_irq_reset(dev_priv);
> >> +		_vlv_display_irq_reset(dev_priv);
> >>  }
> >>  
> >>  void ilk_de_irq_postinstall(struct drm_i915_private *i915)
> >> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> >> index f75cbf5b8a1c..7920ad9585ae 100644
> >> --- a/drivers/gpu/drm/i915/i915_irq.c
> >> +++ b/drivers/gpu/drm/i915/i915_irq.c
> >> @@ -658,8 +658,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv)
> >>  	gen5_gt_irq_reset(to_gt(dev_priv));
> >>  
> >>  	spin_lock_irq(&dev_priv->irq_lock);
> >> -	if (dev_priv->display.irq.display_irqs_enabled)
> >> -		vlv_display_irq_reset(dev_priv);
> >> +	vlv_display_irq_reset(dev_priv);
> >>  	spin_unlock_irq(&dev_priv->irq_lock);
> >>  }
> >>  
> >> @@ -723,8 +722,7 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
> >>  	gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
> >>  
> >>  	spin_lock_irq(&dev_priv->irq_lock);
> >> -	if (dev_priv->display.irq.display_irqs_enabled)
> >> -		vlv_display_irq_reset(dev_priv);
> >> +	vlv_display_irq_reset(dev_priv);
> >>  	spin_unlock_irq(&dev_priv->irq_lock);
> >>  }
> >>  
> >> @@ -740,8 +738,7 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
> >>  	gen5_gt_irq_postinstall(to_gt(dev_priv));
> >>  
> >>  	spin_lock_irq(&dev_priv->irq_lock);
> >> -	if (dev_priv->display.irq.display_irqs_enabled)
> >> -		vlv_display_irq_postinstall(dev_priv);
> >> +	vlv_display_irq_postinstall(dev_priv);
> >>  	spin_unlock_irq(&dev_priv->irq_lock);
> >>  
> >>  	intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
> >> @@ -794,8 +791,7 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv)
> >>  	gen8_gt_irq_postinstall(to_gt(dev_priv));
> >>  
> >>  	spin_lock_irq(&dev_priv->irq_lock);
> >> -	if (dev_priv->display.irq.display_irqs_enabled)
> >> -		vlv_display_irq_postinstall(dev_priv);
> >> +	vlv_display_irq_postinstall(dev_priv);
> >>  	spin_unlock_irq(&dev_priv->irq_lock);
> >>  
> >>  	intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
> >> -- 
> >> 2.39.5
> >> 
> 
> -- 
> Jani Nikula, Intel