From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Souza, Jose" Subject: Re: [PATCH 3/5] drm/i915/psr: Do not print last attempted entry or exit in PSR debugfs while in PSR2 Date: Tue, 11 Dec 2018 14:01:01 +0000 Message-ID: References: <20181204230032.6352-1-jose.souza@intel.com> <20181204230032.6352-3-jose.souza@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0034875994==" Return-path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8B3426E1B1 for ; Tue, 11 Dec 2018 14:01:05 +0000 (UTC) In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "intel-gfx@lists.freedesktop.org" , "Pandiyan, Dhinakaran" Cc: "Vivi, Rodrigo" List-Id: intel-gfx@lists.freedesktop.org --===============0034875994== Content-Language: en-US Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="=-afX2twf4CzvRVDruX+kC" --=-afX2twf4CzvRVDruX+kC Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2018-12-10 at 23:03 -0800, Dhinakaran Pandiyan wrote: > On Tue, 2018-12-04 at 15:00 -0800, Jos=C3=A9 Roberto de Souza wrote: > > PSR2 only trigger interruptions for AUX error, so let's not print > > useless information in debugsfs. > > Also adding a comment to intel_psr_irq_handler() about that. >=20 > The code still allows the enabling of interrupt debugging for PSR2. > Fix > that to reject debugfs writes? Done >=20 >=20 > > Cc: Rodrigo Vivi > > Cc: Dhinakaran Pandiyan > > Signed-off-by: Jos=C3=A9 Roberto de Souza > > --- > > drivers/gpu/drm/i915/i915_debugfs.c | 2 +- > > drivers/gpu/drm/i915/intel_psr.c | 1 + > > 2 files changed, 2 insertions(+), 1 deletion(-) > >=20 > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > > b/drivers/gpu/drm/i915/i915_debugfs.c > > index 86303ba02666..505d93b31eb6 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -2760,7 +2760,7 @@ static int i915_edp_psr_status(struct > > seq_file > > *m, void *data) > > seq_printf(m, "Performance counter: %u\n", val); > > } > > =20 > > - if (psr->debug & I915_PSR_DEBUG_IRQ) { > > + if ((psr->debug & I915_PSR_DEBUG_IRQ) && !psr->psr2_enabled) { > > seq_printf(m, "Last attempted entry at: %lld\n", > > psr->last_entry_attempt); > > seq_printf(m, "Last exit at: %lld\n", psr->last_exit); > > diff --git a/drivers/gpu/drm/i915/intel_psr.c > > b/drivers/gpu/drm/i915/intel_psr.c > > index 15a2121aa64f..85349a57689c 100644 > > --- a/drivers/gpu/drm/i915/intel_psr.c > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > @@ -203,6 +203,7 @@ void intel_psr_irq_handler(struct > > drm_i915_private *dev_priv, u32 psr_iir) > > mask |=3D EDP_PSR_ERROR(shift); > > } > > =20 > > + /* PSR2 don't trigger PRE_ENTRY and POST_EXIT > > interruptions */ > > if (psr_iir & EDP_PSR_PRE_ENTRY(shift)) { > > dev_priv->psr.last_entry_attempt =3D time_ns; > > DRM_DEBUG_KMS("[transcoder %s] PSR entry > > attempt in 2 vblanks\n", --=-afX2twf4CzvRVDruX+kC Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEVNG051EijGa0MiaQVenbO/mOWkkFAlwPwxsACgkQVenbO/mO Wkkxpgf7BHd5h2o0mCa+L3LOHf1OW8PK363r06U6aS1bzpYbyB3fNszeGioiRmMU 6WDpJ+DsKY+LscJEZqxCzcxjBMOQzKIQ2mkqwRUNMRVv90Ss9y1YNzM4dnqCxVMU bVqWlxw1MuYKY3rLq+Hf4E1NSHl+3ZLgijoJlm0T5xKMjNJVVNL0TSsn1t4lbkhQ bxgfYhS6t00jo8nj26SGojsaf2eq1L0W2fs5BYkf0m5Q2T/rMuP2NWqNKtub+TJ/ mkBYsgjTpI/NKZ4m1yLo7aZ1mC0DeJwKvloVAuw5MJDixJwK7XDMfl/pCN7BoTGG /olrPLCr7KdULryvvv6ioEJZjcjRDg== =R+85 -----END PGP SIGNATURE----- --=-afX2twf4CzvRVDruX+kC-- --===============0034875994== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== --===============0034875994==--