From: Jani Nikula <jani.nikula@linux.intel.com>
To: Uma Shankar <uma.shankar@intel.com>,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com,
pekka.paalanen@collabora.com, contact@emersion.fr,
harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com,
sebastian.wick@redhat.com, shashank.sharma@amd.com,
swati2.sharma@intel.com, alex.hung@amd.com,
Uma Shankar <uma.shankar@intel.com>
Subject: Re: [v5 08/24] drm/i915: Add intel_color_op
Date: Fri, 04 Jul 2025 15:36:52 +0300 [thread overview]
Message-ID: <a1041449fc842bbda7760833b45bc96d15c641d6@intel.com> (raw)
In-Reply-To: <20250702091936.3004854-9-uma.shankar@intel.com>
On Wed, 02 Jul 2025, Uma Shankar <uma.shankar@intel.com> wrote:
> From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>
> Add data structure to store intel specific details of colorop
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
> .../drm/i915/display/intel_display_types.h | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index ce45261c4a8f..4b5124a08cc9 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1560,6 +1560,10 @@ struct intel_plane {
> #define to_intel_framebuffer(fb) \
> container_of_const((fb), struct intel_framebuffer, base)
>
> +#define intel_fb_obj(x) ((x) ? to_intel_bo((x)->obj[0]) : NULL)
> +#define to_intel_plane_colorop(x) container_of(x, struct intel_plane_colorop, base)
> +#define to_intel_colorop_state(x) container_of(x, struct intel_plane_colorop_state, uapi)
I think this makes further refactoring harder. Please make them proper
functions instead, not even static inlines.
See what I've done for intel_global_state stuff.
> +
> struct intel_hdmi {
> i915_reg_t hdmi_reg;
> struct {
> @@ -1932,6 +1936,21 @@ struct intel_dp_mst_encoder {
> struct intel_connector *connector;
> };
>
> +struct intel_plane_colorop {
> + struct drm_colorop base;
> + enum intel_color_block id;
> +};
> +
> +struct intel_plane_colorop_state {
> + struct drm_colorop_state uapi;
> +
> + /* TODO: Add hw implementation */
> + struct {
> + bool active, enable;
> + struct drm_property_blob *data;
> + } hw;
> +};
> +
> static inline struct intel_encoder *
> intel_attached_encoder(struct intel_connector *connector)
> {
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-07-04 12:37 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-02 9:19 [v5 00/24] Plane Color Pipeline support for Intel platforms Uma Shankar
2025-07-02 9:19 ` [v5 01/24] [NOT FOR REVIEW] drm: AMD series squashed Uma Shankar
2025-07-02 9:19 ` [v5 02/24] drm: Add Color lut range attributes Uma Shankar
2025-07-02 9:19 ` [v5 03/24] drm: Add Color ops capability property Uma Shankar
2025-07-02 9:19 ` [v5 04/24] drm: Add 1D LUT multi-segmented color op Uma Shankar
2025-07-02 9:19 ` [v5 05/24] drm: Define helper to initialize segmented 1D LUT Uma Shankar
2025-07-02 9:19 ` [v5 06/24] drm: Add helper to extract lut from struct drm_color_lut_32 Uma Shankar
2025-07-02 9:19 ` [v5 07/24] drm/i915: Add identifiers for intel color blocks Uma Shankar
2025-07-04 12:35 ` Jani Nikula
2025-07-02 9:19 ` [v5 08/24] drm/i915: Add intel_color_op Uma Shankar
2025-07-04 12:36 ` Jani Nikula [this message]
2025-07-02 9:19 ` [v5 09/24] drm/i915/color: Add helper to create intel colorop Uma Shankar
2025-07-04 12:37 ` Jani Nikula
2025-07-02 9:19 ` [v5 10/24] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2025-07-04 12:39 ` Jani Nikula
2025-07-02 9:19 ` [v5 11/24] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
2025-07-04 12:41 ` Jani Nikula
2025-07-02 9:19 ` [v5 12/24] drm/i915/color: Add framework to program CSC Uma Shankar
2025-07-02 9:19 ` [v5 13/24] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
2025-07-04 12:42 ` Jani Nikula
2025-07-02 9:19 ` [v5 14/24] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
2025-07-02 9:19 ` [v5 15/24] drm/i915/color: Preserve sign bit when int_bits is Zero Uma Shankar
2025-07-02 9:19 ` [v5 16/24] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
2025-07-02 9:19 ` [v5 17/24] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2025-07-02 9:19 ` [v5 18/24] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2025-07-02 9:19 ` [v5 19/24] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2025-07-02 9:19 ` [v5 20/24] drm/i915/color: Program Pre-CSC registers Uma Shankar
2025-07-02 9:19 ` [v5 21/24] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2025-07-02 9:19 ` [v5 22/24] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2025-07-02 9:19 ` [v5 23/24] drm/i915/color: Create color pipeline with multisegmented LUT Uma Shankar
2025-07-02 9:19 ` [v5 24/24] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar
2025-07-02 10:34 ` ✓ i915.CI.BAT: success for Plane Color Pipeline support for Intel platforms (rev5) Patchwork
2025-07-03 3:05 ` ✗ i915.CI.Full: failure " Patchwork
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