Re: [PATCH 07/20] drm/i915/wm: use generic poll_timeout_us() instead of wait_for()

["Hogander, Jouni" <jouni.hogander@intel.com>]

On Thu, 2025-08-28 at 15:20 +0300, Jani Nikula wrote:
> Prefer generic poll helpers over i915 custom helpers.
> 
> The functional change is losing the exponentially growing sleep of
> wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us.
> 
> Use an arbitrary constant 500 us sleep instead. The timeout remains
> at 3
> ms.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/i9xx_wm.c | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c
> b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 591acce2a4b1..060aff765994 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -3,6 +3,8 @@
>   * Copyright © 2023 Intel Corporation
>   */
>  
> +#include <linux/iopoll.h>
> +
>  #include "soc/intel_dram.h"
>  
>  #include "i915_drv.h"
> @@ -112,6 +114,7 @@ static const struct cxsr_latency
> *pnv_get_cxsr_latency(struct intel_display *dis
>  static void chv_set_memory_dvfs(struct intel_display *display, bool
> enable)
>  {
>  	u32 val;
> +	int ret;
>  
>  	vlv_punit_get(display->drm);
>  
> @@ -124,8 +127,10 @@ static void chv_set_memory_dvfs(struct
> intel_display *display, bool enable)
>  	val |= FORCE_DDR_FREQ_REQ_ACK;
>  	vlv_punit_write(display->drm, PUNIT_REG_DDR_SETUP2, val);
>  
> -	if (wait_for((vlv_punit_read(display->drm,
> PUNIT_REG_DDR_SETUP2) &
> -		      FORCE_DDR_FREQ_REQ_ACK) == 0, 3))
> +	ret = poll_timeout_us(val = vlv_punit_read(display->drm,
> PUNIT_REG_DDR_SETUP2),
> +			      (val & FORCE_DDR_FREQ_REQ_ACK) == 0,
> +			      500, 3000, false);
> +	if (ret)
>  		drm_err(display->drm,
>  			"timed out waiting for Punit DDR DVFS
> request\n");
>  
> @@ -3905,6 +3910,7 @@ static void vlv_wm_get_hw_state(struct
> intel_display *display)
>  	struct vlv_wm_values *wm = &display->wm.vlv;
>  	struct intel_crtc *crtc;
>  	u32 val;
> +	int ret;
>  
>  	vlv_read_wm_values(display, wm);
>  
> @@ -3931,8 +3937,10 @@ static void vlv_wm_get_hw_state(struct
> intel_display *display)
>  		val |= FORCE_DDR_FREQ_REQ_ACK;
>  		vlv_punit_write(display->drm, PUNIT_REG_DDR_SETUP2,
> val);
>  
> -		if (wait_for((vlv_punit_read(display->drm,
> PUNIT_REG_DDR_SETUP2) &
> -			      FORCE_DDR_FREQ_REQ_ACK) == 0, 3)) {
> +		ret = poll_timeout_us(val = vlv_punit_read(display-
> >drm, PUNIT_REG_DDR_SETUP2),
> +				      (val & FORCE_DDR_FREQ_REQ_ACK)
> == 0,
> +				      500, 3000, false);
> +		if (ret) {
>  			drm_dbg_kms(display->drm,
>  				    "Punit not acking DDR DVFS
> request, "
>  				    "assuming DDR DVFS is
> disabled\n");