From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBD9AC433F5 for ; Wed, 29 Sep 2021 12:00:31 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 70EB561409 for ; Wed, 29 Sep 2021 12:00:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 70EB561409 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C31C6EA45; Wed, 29 Sep 2021 12:00:30 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id A5FE76EA45; Wed, 29 Sep 2021 12:00:28 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10121"; a="204410750" X-IronPort-AV: E=Sophos;i="5.85,332,1624345200"; d="scan'208";a="204410750" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2021 05:00:28 -0700 X-IronPort-AV: E=Sophos;i="5.85,332,1624345200"; d="scan'208";a="538788801" Received: from jmaugusx-mobl1.gar.corp.intel.com (HELO [10.249.254.159]) ([10.249.254.159]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2021 05:00:26 -0700 Message-ID: From: Thomas =?ISO-8859-1?Q?Hellstr=F6m?= To: Matthew Auld , intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Date: Wed, 29 Sep 2021 14:00:24 +0200 In-Reply-To: <20210927114114.152310-13-matthew.auld@intel.com> References: <20210927114114.152310-1-matthew.auld@intel.com> <20210927114114.152310-13-matthew.auld@intel.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [Intel-gfx] [PATCH v5 13/13] drm/i915/ttm: enable shmem tt backend X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 2021-09-27 at 12:41 +0100, Matthew Auld wrote: > Turn on the shmem tt backend, and enable shrinking. > > Signed-off-by: Matthew Auld > Cc: Thomas Hellström > --- >  drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 1 + >  1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > index 46d57541c0b2..4ae630fbc5cd 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c > @@ -1093,6 +1093,7 @@ static u64 i915_ttm_mmap_offset(struct > drm_i915_gem_object *obj) >   >  static const struct drm_i915_gem_object_ops i915_gem_ttm_obj_ops = { >         .name = "i915_gem_object_ttm", > +       .flags = I915_GEM_OBJECT_IS_SHRINKABLE, >   >         .get_pages = i915_ttm_get_pages, >         .put_pages = i915_ttm_put_pages, Reviewed-by: Thomas Hellström Now that BAT is running a DG1 again, it might be worth to give the series a rerun. Perhaps with the "rework object initialization slightly" as a HAX patch to unblock the mman + following selftest. /Thomas