From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7B1D5D2A532 for ; Thu, 4 Dec 2025 20:29:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AD71B10E9BC; Thu, 4 Dec 2025 20:29:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; secure) header.d=mailbox.org header.i=@mailbox.org header.b="HWvzvG/b"; dkim-atps=neutral Received: from mout-p-101.mailbox.org (mout-p-101.mailbox.org [80.241.56.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8DF9F10E050; Wed, 3 Dec 2025 15:18:21 +0000 (UTC) Received: from smtp202.mailbox.org (smtp202.mailbox.org [IPv6:2001:67c:2050:b231:465::202]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-101.mailbox.org (Postfix) with ESMTPS id 4dM1Vf2198z9sjZ; Wed, 3 Dec 2025 16:18:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1764775098; h=from:from:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2aZUkHtkSK0oCrh4KpajSb66h7yNzcpGmeYAya58G6Y=; b=HWvzvG/bIkZHelt1pMkEtQNl8S6CqFby2URUKUUB07VYVfokbK9e15c3hxNjrr2apm3gGU YzAzMoDBLbpqjeJn90QGuW5OEM8jI+eXSoxAx0au7bP21OFfTtjYCnZEKJwkIbxeLYBzYR 6MaxFz8QiEe42Y36Ebyj9spKVnNl76pzgSyFrCfM0XCOolUvjsPkrSCKh9oGnmMsvtZUiT PDREL5YP68E4h0sr5phE6b8dzbAUDaBM+MrmvfsvSn47mOuJF17yaV9mdFydPwPMsK0dy3 5PW54Z9r1eqMoINlPTuwQLazqXFxAlJH8p/UjnW8L0Hv0sf1nAnLJbljJUVaMA== Message-ID: Subject: Re: [PATCH v2 8/8] drm/xe: Use dma_fence_test_signaled_flag() From: Philipp Stanner To: Christian =?ISO-8859-1?Q?K=F6nig?= , Philipp Stanner , Sumit Semwal , Gustavo Padovan , Felix Kuehling , Alex Deucher , David Airlie , Simona Vetter , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , Huang Rui , Matthew Auld , Matthew Brost , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Lucas De Marchi , Thomas =?ISO-8859-1?Q?Hellstr=F6m?= Cc: linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Date: Wed, 03 Dec 2025 16:18:06 +0100 In-Reply-To: References: <20251201105011.19386-2-phasta@kernel.org> <20251201105011.19386-10-phasta@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MBO-RS-ID: 2d25109a1dd7c0ac011 X-MBO-RS-META: u6d8mbjai1kb5wbkyqh941df6oh6is5g X-Mailman-Approved-At: Thu, 04 Dec 2025 20:29:30 +0000 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: phasta@kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, 2025-12-03 at 14:15 +0100, Christian K=C3=B6nig wrote: > On 12/1/25 11:50, Philipp Stanner wrote: > > There is a new dma_fence helper which simplifies testing for a fence's > > signaled_flag. Use it in xe. > >=20 > > Signed-off-by: Philipp Stanner >=20 > Acked-by: Christian K=C3=B6nig This series would then be completely reviewed, it seems. So one could push it. Question is just who and where, and what to do about the merge conflict with intel. Matthew? P. >=20 > > --- > > =C2=A0drivers/gpu/drm/xe/xe_exec_queue.c | 9 +++------ > > =C2=A0drivers/gpu/drm/xe/xe_pt.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 | 3 +-- > > =C2=A0drivers/gpu/drm/xe/xe_sched_job.c=C2=A0 | 2 +- > > =C2=A03 files changed, 5 insertions(+), 9 deletions(-) > >=20 > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe= _exec_queue.c > > index cb5f204c08ed..06736f52fbaa 100644 > > --- a/drivers/gpu/drm/xe/xe_exec_queue.c > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c > > @@ -1037,8 +1037,7 @@ struct dma_fence *xe_exec_queue_last_fence_get(st= ruct xe_exec_queue *q, > > =C2=A0 > > =C2=A0 xe_exec_queue_last_fence_lockdep_assert(q, vm); > > =C2=A0 > > - if (q->last_fence && > > - =C2=A0=C2=A0=C2=A0 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fen= ce->flags)) > > + if (q->last_fence && dma_fence_test_signaled_flag(q->last_fence)) > > =C2=A0 xe_exec_queue_last_fence_put(q, vm); > > =C2=A0 > > =C2=A0 fence =3D q->last_fence ? q->last_fence : dma_fence_get_stub(); > > @@ -1064,8 +1063,7 @@ struct dma_fence *xe_exec_queue_last_fence_get_fo= r_resume(struct xe_exec_queue * > > =C2=A0 > > =C2=A0 lockdep_assert_held_write(&q->hwe->hw_engine_group->mode_sem); > > =C2=A0 > > - if (q->last_fence && > > - =C2=A0=C2=A0=C2=A0 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fen= ce->flags)) > > + if (q->last_fence && dma_fence_test_signaled_flag(q->last_fence)) > > =C2=A0 xe_exec_queue_last_fence_put_unlocked(q); > > =C2=A0 > > =C2=A0 fence =3D q->last_fence ? q->last_fence : dma_fence_get_stub(); > > @@ -1106,8 +1104,7 @@ int xe_exec_queue_last_fence_test_dep(struct xe_e= xec_queue *q, struct xe_vm *vm) > > =C2=A0 > > =C2=A0 fence =3D xe_exec_queue_last_fence_get(q, vm); > > =C2=A0 if (fence) { > > - err =3D test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) ? > > - 0 : -ETIME; > > + err =3D dma_fence_test_signaled_flag(fence) ? 0 : -ETIME; > > =C2=A0 dma_fence_put(fence); > > =C2=A0 } > > =C2=A0 > > diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c > > index 07f96bda638a..1ca2dec18e51 100644 > > --- a/drivers/gpu/drm/xe/xe_pt.c > > +++ b/drivers/gpu/drm/xe/xe_pt.c > > @@ -1208,8 +1208,7 @@ static bool no_in_syncs(struct xe_sync_entry *syn= cs, u32 num_syncs) > > =C2=A0 for (i =3D 0; i < num_syncs; i++) { > > =C2=A0 struct dma_fence *fence =3D syncs[i].fence; > > =C2=A0 > > - if (fence && !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, > > - =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 &fence->flags)) > > + if (fence && !dma_fence_test_signaled_flag(fence)) > > =C2=A0 return false; > > =C2=A0 } > > =C2=A0 > > diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_= sched_job.c > > index d21bf8f26964..1c9ba49a325b 100644 > > --- a/drivers/gpu/drm/xe/xe_sched_job.c > > +++ b/drivers/gpu/drm/xe/xe_sched_job.c > > @@ -188,7 +188,7 @@ static bool xe_fence_set_error(struct dma_fence *fe= nce, int error) > > =C2=A0 bool signaled; > > =C2=A0 > > =C2=A0 spin_lock_irqsave(fence->lock, irq_flags); > > - signaled =3D test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags); > > + signaled =3D dma_fence_test_signaled_flag(fence); > > =C2=A0 if (!signaled) > > =C2=A0 dma_fence_set_error(fence, error); > > =C2=A0 spin_unlock_irqrestore(fence->lock, irq_flags); >=20