intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Deak, Imre" <imre.deak@intel.com>
Subject: Re: [PATCH 43/50] drm/i915/dp: Use int for DSC slice count variables
Date: Tue, 9 Dec 2025 17:30:31 +0000	[thread overview]
Message-ID: <a9ac77f3cbf6bee8e393ca8ed7f83df6c5890718.camel@intel.com> (raw)
In-Reply-To: <20251127175023.1522538-44-imre.deak@intel.com>

On Thu, 2025-11-27 at 19:50 +0200, Imre Deak wrote:
> There is no reason to use the more specific u8 type for slice count
> variables, use the more generic int type instead.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++------
>  1 file changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 79b87bc041a75..1d9a130bd4060 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -962,7 +962,7 @@ static int intel_dp_dsc_min_slice_count(const
> struct intel_connector *connector,
>  					int mode_clock, int
> mode_hdisplay)
>  {
>  	struct intel_display *display = to_intel_display(connector);
> -	u8 min_slice_count;
> +	int min_slice_count;
>  	int max_slice_width;
>  	int tp_rgb_yuv444;
>  	int tp_yuv422_420;
> @@ -1007,7 +1007,7 @@ static int intel_dp_dsc_min_slice_count(const
> struct intel_connector *connector,
>  	 * slice and VDSC engine, whenever we approach close enough
> to max CDCLK
>  	 */
>  	if (mode_clock >= ((display->cdclk.max_cdclk_freq * 85) /
> 100))
> -		min_slice_count = max_t(u8, min_slice_count, 2);
> +		min_slice_count = max(min_slice_count, 2);
>  
>  	max_slice_width = drm_dp_dsc_sink_max_slice_width(connector-
> >dp.dsc_dpcd);
>  	if (max_slice_width < DP_DSC_MIN_SLICE_WIDTH_VALUE) {
> @@ -1017,9 +1017,8 @@ static int intel_dp_dsc_min_slice_count(const
> struct intel_connector *connector,
>  		return 0;
>  	}
>  	/* Also take into account max slice width */
> -	min_slice_count = max_t(u8, min_slice_count,
> -				DIV_ROUND_UP(mode_hdisplay,
> -					     max_slice_width));
> +	min_slice_count = max(min_slice_count,
> +			      DIV_ROUND_UP(mode_hdisplay,
> max_slice_width));
>  
>  	return min_slice_count;
>  }
> @@ -1037,7 +1036,7 @@ u8 intel_dp_dsc_get_slice_count(const struct
> intel_connector *connector,
>  
>  	/* Find the closest match to the valid slice count values */
>  	for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) {
> -		u8 test_slice_count = valid_dsc_slicecount[i] *
> num_joined_pipes;
> +		int test_slice_count = valid_dsc_slicecount[i] *
> num_joined_pipes;
>  
>  		/*
>  		 * 3 DSC Slices per pipe need 3 DSC engines, which
> is supported only


  reply	other threads:[~2025-12-09 17:30 UTC|newest]

Thread overview: 137+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-27 17:49 [PATCH 00/50] drm/i915/dp: Clean up link BW/DSC slice config computation Imre Deak
2025-11-27 17:49 ` [PATCH 01/50] drm/dp: Parse all DSC slice count caps for eDP 1.5 Imre Deak
2025-12-08 11:24   ` Luca Coelho
2025-12-08 12:36     ` Imre Deak
2025-11-27 17:49 ` [PATCH 02/50] drm/dp: Add drm_dp_dsc_sink_slice_count_mask() Imre Deak
2025-12-09  8:48   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 03/50] drm/i915/dp: Fix DSC sink's slice count capability check Imre Deak
2025-12-09  8:51   ` Luca Coelho
2025-12-09  9:53     ` Imre Deak
2025-12-09 11:14       ` Luca Coelho
2025-11-27 17:49 ` [PATCH 04/50] drm/i915/dp: Return a fixed point BPP value from intel_dp_output_bpp() Imre Deak
2025-12-09  9:10   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 05/50] drm/i915/dp: Use a mode's crtc_clock vs. clock during state computation Imre Deak
2025-12-09 12:51   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 06/50] drm/i915/dp: Factor out intel_dp_link_bw_overhead() Imre Deak
2025-12-09 12:52   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 07/50] drm/i915/dp: Fix BW check in is_bw_sufficient_for_dsc_config() Imre Deak
2025-12-09 12:53   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 08/50] drm/i915/dp: Use the effective data rate for DP BW calculation Imre Deak
2025-12-10 12:48   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 09/50] drm/i915/dp: Use the effective data rate for DP compressed " Imre Deak
2025-12-10 12:50   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 10/50] drm/i915/dp: Account with MST, SSC BW overhead for uncompressed DP-MST stream BW Imre Deak
2025-12-10 13:08   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 11/50] drm/i915/dp: Account with DSC BW overhead for compressed DP-SST " Imre Deak
2025-12-10 13:39   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 12/50] drm/i915/dp: Account with pipe joiner max compressed BPP limit for DP-MST and eDP Imre Deak
2025-12-10 14:29   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 13/50] drm/i915/dp: Drop unused timeslots param from dsc_compute_link_config() Imre Deak
2025-12-10 14:31   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 14/50] drm/i915/dp: Factor out align_max_sink_dsc_input_bpp() Imre Deak
2025-12-12 15:41   ` Govindapillai, Vinod
2025-12-15  7:46   ` Luca Coelho
2025-12-15 11:53     ` Imre Deak
2025-12-15 12:02       ` Luca Coelho
2025-12-15 12:33         ` Imre Deak
2025-11-27 17:49 ` [PATCH 15/50] drm/i915/dp: Factor out align_max_vesa_compressed_bpp_x16() Imre Deak
2025-12-12 15:46   ` Govindapillai, Vinod
2025-12-15  7:49   ` Luca Coelho
2025-12-15 12:00     ` Imre Deak
2025-12-15 12:08       ` Luca Coelho
2025-12-15 12:24         ` Imre Deak
2025-11-27 17:49 ` [PATCH 16/50] drm/i915/dp: Fail state computation for invalid min/max link BPP values Imre Deak
2025-12-12 15:48   ` Govindapillai, Vinod
2025-12-15  7:51   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 17/50] drm/i915/dp: Fail state computation for invalid max throughput BPP value Imre Deak
2025-12-12 15:51   ` Govindapillai, Vinod
2025-12-15  7:51   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 18/50] drm/i915/dp: Fail state computation for invalid max sink compressed " Imre Deak
2025-12-12 15:52   ` Govindapillai, Vinod
2025-12-15  7:52   ` Luca Coelho
2025-11-27 17:49 ` [PATCH 19/50] drm/i915/dp: Fail state computation for invalid DSC source input BPP values Imre Deak
2025-12-11  8:29   ` Govindapillai, Vinod
2025-11-27 17:49 ` [PATCH 20/50] drm/i915/dp: Align min/max DSC input BPPs to sink caps Imre Deak
2025-12-11  8:51   ` Govindapillai, Vinod
2025-11-27 17:49 ` [PATCH 21/50] drm/i915/dp: Align min/max compressed BPPs when calculating BPP limits Imre Deak
2025-12-12  9:17   ` Govindapillai, Vinod
2025-12-12 11:09     ` Imre Deak
2025-11-27 17:49 ` [PATCH 22/50] drm/i915/dp: Drop intel_dp parameter from intel_dp_compute_config_link_bpp_limits() Imre Deak
2025-12-12  9:23   ` Govindapillai, Vinod
2025-11-27 17:49 ` [PATCH 23/50] drm/i915/dp: Pass intel_output_format to intel_dp_dsc_sink_{min_max}_compressed_bpp() Imre Deak
2025-12-12  9:27   ` Govindapillai, Vinod
2025-11-27 17:49 ` [PATCH 24/50] drm/i915/dp: Pass mode clock to dsc_throughput_quirk_max_bpp_x16() Imre Deak
2025-12-12  9:31   ` Govindapillai, Vinod
2025-11-27 17:49 ` [PATCH 25/50] drm/i915/dp: Factor out compute_min_compressed_bpp_x16() Imre Deak
2025-12-12  9:39   ` Govindapillai, Vinod
2025-12-12 11:01     ` Imre Deak
2025-12-12 11:41       ` Govindapillai, Vinod
2025-11-27 17:49 ` [PATCH 26/50] drm/i915/dp: Factor out compute_max_compressed_bpp_x16() Imre Deak
2025-12-12  9:50   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 27/50] drm/i915/dp: Add intel_dp_mode_valid_with_dsc() Imre Deak
2025-12-12 11:43   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 28/50] drm/i915/dp: Unify detect and compute time DSC mode BW validation Imre Deak
2025-12-12 14:29   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 29/50] drm/i915/dp: Use helpers to align min/max compressed BPPs Imre Deak
2025-12-12 14:34   ` Govindapillai, Vinod
2025-12-12 14:39   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 30/50] drm/i915/dp: Simplify computing DSC BPPs for eDP Imre Deak
2025-12-12 14:45   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 31/50] drm/i915/dp: Simplify computing DSC BPPs for DP-SST Imre Deak
2025-12-12 14:59   ` Govindapillai, Vinod
2025-12-12 18:41     ` Imre Deak
2025-11-27 17:50 ` [PATCH 32/50] drm/i915/dp: Simplify computing forced DSC BPP " Imre Deak
2025-12-12 15:21   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 33/50] drm/i915/dp: Unify computing compressed BPP for DP-SST and eDP Imre Deak
2025-12-12 15:38   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 34/50] drm/i915/dp: Simplify eDP vs. DP compressed BPP computation Imre Deak
2025-12-12 15:39   ` Govindapillai, Vinod
2025-11-27 17:50 ` [PATCH 35/50] drm/i915/dp: Simplify computing the DSC compressed BPP for DP-MST Imre Deak
2025-12-08 13:08   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 36/50] drm/i915/dsc: Track the detaild DSC slice configuration Imre Deak
2025-12-09  8:24   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 37/50] drm/i915/dsc: Track the DSC stream count in the DSC slice config state Imre Deak
2025-12-09  8:28   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 38/50] drm/i915/dsi: Move initialization of DSI DSC streams-per-pipe to fill_dsc() Imre Deak
2025-12-09  8:47   ` Hogander, Jouni
2025-12-09 10:38     ` Imre Deak
2025-12-09 11:37       ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 39/50] drm/i915/dsi: Track the detailed DSC slice configuration Imre Deak
2025-12-09 12:43   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 40/50] drm/i915/dp: " Imre Deak
2025-12-09 14:06   ` Hogander, Jouni
2025-12-09 14:30     ` Imre Deak
2025-12-09 17:50       ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 41/50] drm/i915/dsc: Switch to using intel_dsc_line_slice_count() Imre Deak
2025-12-09 17:14   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 42/50] drm/i915/dp: Factor out intel_dp_dsc_min_slice_count() Imre Deak
2025-12-09 17:26   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 43/50] drm/i915/dp: Use int for DSC slice count variables Imre Deak
2025-12-09 17:30   ` Hogander, Jouni [this message]
2025-11-27 17:50 ` [PATCH 44/50] drm/i915/dp: Rename test_slice_count to slices_per_line Imre Deak
2025-12-09 17:34   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 45/50] drm/i915/dp: Simplify the DSC slice config loop's slices-per-pipe iteration Imre Deak
2025-12-10 12:38   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 46/50] drm/i915/dsc: Add intel_dsc_get_slice_config() Imre Deak
2025-12-10 14:06   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 47/50] drm/i915/dsi: Use intel_dsc_get_slice_config() Imre Deak
2025-12-10 14:44   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 48/50] drm/i915/dp: Unify DP and eDP slice count computation Imre Deak
2025-12-11  6:48   ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 49/50] drm/i915/dp: Add intel_dp_dsc_get_slice_config() Imre Deak
2025-12-11  6:55   ` Hogander, Jouni
2025-12-11  9:52     ` Imre Deak
2025-12-12 18:17   ` [PATCH v2 " Imre Deak
2025-12-15  6:06     ` Hogander, Jouni
2025-11-27 17:50 ` [PATCH 50/50] drm/i915/dp: Use intel_dp_dsc_get_slice_config() Imre Deak
2025-12-11  6:59   ` Hogander, Jouni
2025-12-11 10:23     ` Imre Deak
2025-12-12 18:03       ` Imre Deak
2025-12-12 18:17   ` [PATCH v2 " Imre Deak
2025-11-28 16:20 ` [CI 09/50] drm/i915/dp: Use the effective data rate for DP compressed BW calculation Imre Deak
2025-12-12 13:23   ` Govindapillai, Vinod
2025-11-28 18:48 ` ✗ i915.CI.BAT: failure for drm/i915/dp: Clean up link BW/DSC slice config computation Patchwork
2025-11-28 20:49   ` Imre Deak
2025-12-01  9:46 ` ✗ i915.CI.Full: " Patchwork
2025-12-12 20:01 ` ✓ i915.CI.BAT: success for drm/i915/dp: Clean up link BW/DSC slice config computation (rev3) Patchwork
2025-12-13  4:00 ` ✓ i915.CI.Full: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a9ac77f3cbf6bee8e393ca8ed7f83df6c5890718.camel@intel.com \
    --to=jouni.hogander@intel.com \
    --cc=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).