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CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:CYYPR11MB8430.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230040)(366016)(1800799024)(376014); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?kE3Z7Itx9hxQub+h4iDlEtYM3ZBU9Rnr4NhQyPKFtlVItcQuUT4FjcyR2vKL?= =?us-ascii?Q?m6aRE5a2Xwt4kHfgPYMsEYj7rnljmjqb3riQ8pso6IgWuLZ9sYRtIx72xohU?= =?us-ascii?Q?WQCj/dllp1WDsz8vEBwcEhYc0itNUMLc3nE3Ln4T0EsQzzo53PrPRHYjiwUN?= =?us-ascii?Q?PT0x/VUpgG0762qmIXElXvXahVWXLXubikXgBWoBtxn945epzAJW6qOoV7d4?= =?us-ascii?Q?6h8FCGerAKC/nz/tVFo5iex5KJoGdKMtHNCANO3yGOpk9K81a8qntqxyF4j9?= =?us-ascii?Q?z+1zyIgs7jHPUbXOZu51IkNHIZL7aCCiY78pvGgU/bYmPLqOaq6jIRiBbnRE?= =?us-ascii?Q?xs9V7JfACB1AbCmp34CKF8uKZ/tQoihc76JEfoqrT4A7DtcDGN3I8YYQorG2?= =?us-ascii?Q?aHrCf80hlc2ZPfsXCnucrAUEuGLHUWo9zSz6/WZyhC6ZVufTeJoUf9h/fW/Y?= =?us-ascii?Q?/V3M0DayEawvqRF+EBvDCYcm3jWXXT04EpX0p7Q/WItcvREZFY5WCSGBus/H?= =?us-ascii?Q?eg6e0Saa2e92Nnu3EHTA85x0tGO0+jSx24fXLXuIveJ+b0fjQ+7HYkG3dSSI?= =?us-ascii?Q?KMlrZendcGNSd/YRTlViUrCZ6lC4DY9Eyu35r+o3jnvA6pniJdWusHsfUXPJ?= =?us-ascii?Q?nE3Ya2yf5VLjzciMwLyCDHfsMeEFer7WmWCGF4fyCVBRMpi0Kki2gn3R4AMZ?= =?us-ascii?Q?J1Mpkemydip1U4rXf6vH8ohjcc4APz9nxKr654znaN1jykk+0B/ZAneSxCNQ?= =?us-ascii?Q?kQIfGWHxyCascZBjV8S6GFEhBzAZLk0kyJ3CqouVZ+LIoPFkmghQv4AFC7tr?= =?us-ascii?Q?ziXS7eY/E9uKxIwP6xJX8w1t5kagUNSK2XrJGHdKxEgukMq05Dny0yeflebE?= =?us-ascii?Q?OGuOg9j8xSHdCQQLRS93iohgUa1ftrgF/TYJ3TZdR7ssvUAa3OGuPJQmWW7J?= =?us-ascii?Q?7gPT4SbOPdeSjMLYnbCLJIj7yc69bbwInUXqcglvkDkyJefQLfXSvzDEDv4L?= =?us-ascii?Q?qjrcdXU1vJxvyArSSMygNm47/n1zdwPvGAnGRaB5Lj/r6Bu3qi/iYUWhoK0l?= =?us-ascii?Q?hpiXuzNUHCXhKozhqRHseTsrnrb/pYOGTb8P/nfSFSvjSXiqmY5LQcT5gdiG?= =?us-ascii?Q?b5Snqq8h3jRV7PZJHtpJDKX5CB4bc147I4o01WgEzXFrGgUt1Kc7PbzhuJDN?= =?us-ascii?Q?359/tRSIl3AtuiJdBAdqtmm/0eVoUxlpdNZ/2Om2pgMQ5m5CLDRG3vrGqYVc?= =?us-ascii?Q?Hyw3Cg1BOvbkpXyLtZ8+x5E3V/hwWE5GUoZlM8h//dQSZG54sg9ksgYFyvAz?= =?us-ascii?Q?qjz7WC1QEqTuEg7YSADlybCUWfEXjeA9DY09axkKz4wsfsABODxvGQu5b8Zu?= =?us-ascii?Q?yJHhRM5B8aSD+aqF4TxmRp8362Qr/CRFwrLJtsZhfpa8WeHSwMPyKpPlQetk?= =?us-ascii?Q?HCJtWdao0GVWjivphFJmqbq3d3vR6wndsHSS8BwZFWoPmZ3NNKE4K8+Mgjuq?= =?us-ascii?Q?GCsM1hmLl2Skqo8y+dhkUN+HdBKMqyHovtPeVD0/I9Zw5/VHnym2qF58f51k?= =?us-ascii?Q?mkKJ9GmH6ObOjYs6OXKCTgC5hn9cJVRbQvvvOa0IChJ8PPIIyk0i0KXM1bjH?= =?us-ascii?Q?uQ=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: b28b8638-117b-4406-12cd-08ddad172619 X-MS-Exchange-CrossTenant-AuthSource: CYYPR11MB8430.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jun 2025 20:48:29.3388 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: d1LmvsOnJahKwRvxUI70Hi20WsPM6guMG09MdIjGLZjq8UY0rBjd4rRqV48jh7zzKNbWE7IJpWOo18L19AO1FQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR11MB8591 X-OriginatorOrg: intel.com X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Jun 05, 2025 at 01:29:33PM +0300, Jani Nikula wrote: > Only use the ms granularity wait in snb_pcode_write_timeout(), primarily > to better align with the xe driver, which also only has the millisecond > wait. > > Use an arbitrary 250 us fast wait before the specified ms wait, and have > snb_pcode_write() default to 1 ms. > > This means snb_pcode_write() and snb_pcode_write_timeout() will always > be sleeping functions. There should not be any atomic users for pcode > writes though, and any display code using pcode via xe has already been > non-atomic. The uncore wait will do a might_sleep() annotation that > should catch any problems. Reviewed-by: Rodrigo Vivi > > Signed-off-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 5 ++--- > drivers/gpu/drm/i915/display/intel_display_power_well.c | 3 +-- > drivers/gpu/drm/i915/intel_pcode.c | 5 ++--- > drivers/gpu/drm/i915/intel_pcode.h | 5 ++--- > drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h | 6 ++---- > 5 files changed, 9 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index f0c673e40ce5..7ad506da7d3d 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -2147,7 +2147,7 @@ static void bxt_set_cdclk(struct intel_display *display, > */ > ret = snb_pcode_write_timeout(&dev_priv->uncore, > HSW_PCODE_DE_WRITE_FREQ_REQ, > - 0x80000000, 150, 2); > + 0x80000000, 2); > > if (ret) { > drm_err(display->drm, > @@ -2187,8 +2187,7 @@ static void bxt_set_cdclk(struct intel_display *display, > */ > ret = snb_pcode_write_timeout(&dev_priv->uncore, > HSW_PCODE_DE_WRITE_FREQ_REQ, > - cdclk_config->voltage_level, > - 150, 2); > + cdclk_config->voltage_level, 2); > } > if (ret) { > drm_err(display->drm, > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c > index 02e3c22be21e..e60f60ddbff7 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > @@ -485,8 +485,7 @@ static void icl_tc_cold_exit(struct intel_display *display) > int ret, tries = 0; > > while (1) { > - ret = snb_pcode_write_timeout(&i915->uncore, ICL_PCODE_EXIT_TCCOLD, 0, > - 250, 1); > + ret = snb_pcode_write(&i915->uncore, ICL_PCODE_EXIT_TCCOLD, 0); > if (ret != -EAGAIN || ++tries == 3) > break; > msleep(1); > diff --git a/drivers/gpu/drm/i915/intel_pcode.c b/drivers/gpu/drm/i915/intel_pcode.c > index 3db2ba439bb5..b7e9b4ee1425 100644 > --- a/drivers/gpu/drm/i915/intel_pcode.c > +++ b/drivers/gpu/drm/i915/intel_pcode.c > @@ -110,13 +110,12 @@ int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1) > } > > int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, > - int fast_timeout_us, int slow_timeout_ms) > + int timeout_ms) > { > int err; > > mutex_lock(&uncore->i915->sb_lock); > - err = __snb_pcode_rw(uncore, mbox, &val, NULL, > - fast_timeout_us, slow_timeout_ms, false); > + err = __snb_pcode_rw(uncore, mbox, &val, NULL, 250, timeout_ms, false); > mutex_unlock(&uncore->i915->sb_lock); > > if (err) { > diff --git a/drivers/gpu/drm/i915/intel_pcode.h b/drivers/gpu/drm/i915/intel_pcode.h > index 8d2198e29422..401ce27f72d4 100644 > --- a/drivers/gpu/drm/i915/intel_pcode.h > +++ b/drivers/gpu/drm/i915/intel_pcode.h > @@ -11,10 +11,9 @@ > struct intel_uncore; > > int snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1); > -int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, > - int fast_timeout_us, int slow_timeout_ms); > +int snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int timeout_ms); > #define snb_pcode_write(uncore, mbox, val) \ > - snb_pcode_write_timeout(uncore, mbox, val, 500, 0) > + snb_pcode_write_timeout((uncore), (mbox), (val), 1) > > int skl_pcode_request(struct intel_uncore *uncore, u32 mbox, u32 request, > u32 reply_mask, u32 reply, int timeout_base_ms); > diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h > index a473aa6697d0..32da708680c2 100644 > --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h > +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h > @@ -10,11 +10,9 @@ > #include "xe_pcode.h" > > static inline int > -snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, > - int fast_timeout_us, int slow_timeout_ms) > +snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val, int timeout_ms) > { > - return xe_pcode_write_timeout(__compat_uncore_to_tile(uncore), mbox, val, > - slow_timeout_ms ?: 1); > + return xe_pcode_write_timeout(__compat_uncore_to_tile(uncore), mbox, val, timeout_ms); > } > > static inline int > -- > 2.39.5 >